sdrangel

Autor	SHA1	Wiadomość	Data
f4exb	61a16eade9	Use always 16 bit DSP on Tx side	2018-01-22 10:46:57 +01:00
f4exb	bacc6659b0	24 bit DSP: use a different define for Tx chain so that it can stay on 16 bit DSP	2018-01-22 03:00:08 +01:00
f4exb	732561152b	24 bit DSP fix	2018-01-22 02:49:06 +01:00
f4exb	ad219d50cc	Implemented 24 bit internal DSP (with bugs ...)	2018-01-21 21:48:36 +01:00
f4exb	08ce7f423b	Templatize the accumulator type of integer half-band filters (non SIMD)	2018-01-21 19:39:51 +01:00
f4exb	3a3d8e3dcb	activated compiler warnings	2017-05-25 20:13:34 +02:00
f4exb	3479559859	Tx support: optimize final interpolator stages	2017-01-03 23:25:20 +01:00
f4exb	fa0afb6c92	Tx support: implemented final interpolation stage in FileSink plugin	2017-01-02 03:14:46 +01:00