Wykres commitów

1389 Commity (3e5bcf7e0092dde05ccff0b21fc5f1a3e1fda69a)

Autor SHA1 Wiadomość Data
f4exb 9f48378677 Channel analyzer NG: return of the lock status indicator and PLL frequency shift for PSK modulated signals 2018-05-18 19:03:54 +02:00
f4exb 6d95c04076 ChannelAnalyzerNG: fixed FLL and removed IIR and FIR kit that is now useless 2018-05-18 02:36:29 +02:00
f4exb e723764376 New PLL: removed locked status heuristics for order > 1 2018-05-17 02:35:06 +02:00
f4exb d29958d51f Added a frequency lock loop 2018-05-17 01:05:48 +02:00
f4exb c495f82235 Imported Iowa Hills Software IIR and FIR calculator 2018-05-17 00:09:56 +02:00
f4exb d38d926a87 New PLL: simple FLL code to be put in its own class later 2018-05-16 18:53:16 +02:00
f4exb a1a2078d7d New PLL: experimental lock condition algorithm based on phi hat averaging (2) + FLL input and locking mechanixm 2018-05-16 14:20:26 +02:00
f4exb 10c56fc47a New PLL: experimental lock condition algorithm based on phi hat averaging 2018-05-16 08:42:08 +02:00
f4exb 660d8d22ae New PLL: heuristics to find locked state 2018-05-16 01:57:16 +02:00
f4exb bb2d530122 New PLL: phase lock status draft 2018-05-15 19:40:53 +02:00
f4exb cf5901f82c Moving average with variable history size 2018-05-15 01:03:43 +02:00
f4exb 68c50769fe New PLL: implemented trick on the phase comparator for M-ary PSK operation 2018-05-14 19:14:30 +02:00
f4exb 21840c5dd3 AM demod: synchronous AM: implemented sidebands selection 2018-05-13 22:30:50 +02:00
f4exb e9f64a05f2 AM demod: basic synchronous AM detection option 2018-05-13 17:27:24 +02:00
f4exb 1549ecaa0f New PLL with complex signal input and w, zeta, K parameters 2018-05-13 08:55:14 +02:00
f4exb 65df319167 RTL-SDR: fixed inf/sup decimators (2) 2018-05-12 08:05:46 +02:00
f4exb f4ac9bf114 RTL-SDR: fixed inf/sup decimators 2018-05-12 07:25:53 +02:00
f4exb 3ae7cda9be ChanelAnalyzerNG: added PLL option 2018-05-12 06:01:54 +02:00
f4exb d9d69c2060
Merge branch 'dev' into dev 2018-05-11 10:11:28 +02:00
beta-tester 15078c9c07 modified unique file name 2018-05-11 09:08:20 +02:00
f4exb 50c868562a Decimators simplification 2018-05-11 00:48:37 +02:00
f4exb 4bb749ce65 Inf/Sup frequency shift scheme change to set bandwidth closer to device center frequency 2018-05-10 22:17:39 +02:00
f4exb fd4d2bb64f Common static function to calculate device center frequency from all contributing parameters 2018-05-10 11:47:13 +02:00
f4exb 1fadbf3b8a Inf/Sup decimators fix (4): added decimators by 64 2018-05-10 10:07:42 +02:00
f4exb 41319b63e5 Inf/Sup decimators fix (3): all decimators but by 64 2018-05-10 04:37:51 +02:00
f4exb f99f7cd598 Inf/Sup decimators fix (2): decimators by 4 2018-05-10 02:51:45 +02:00
f4exb 6841bf3efa Center decimator by 2 optimization 2018-05-10 02:26:38 +02:00
f4exb 0e55accd0f Inf/Sup decimators fix (1): decimators by 2 2018-05-10 02:14:16 +02:00
f4exb 0981d04904 File record default file name fix (1) 2018-05-08 11:03:09 +02:00
f4exb 0c946d86e2 Use unified even/odd half band decimator 2018-05-08 01:35:08 +02:00
f4exb 56c0aaedcd Mag AGC: corrected step calculation. Added method to combine step up and down smoothing 2018-05-06 02:39:39 +02:00
f4exb a6792ebad7 Windows build fixes 2018-05-05 17:21:11 +02:00
f4exb 17aa15c4d0 Unified the even/odd integer halfband filters 2018-05-02 14:00:03 +02:00
f4exb 058f3d5af8 RTLSDR: optimized decimator 2018-05-02 00:24:50 +02:00
f4exb 19c32b4354 Removed 24/16 bit differentiation on Decimator instantiation where possible 2018-05-01 23:57:12 +02:00
f4exb 4924e3edbd Down channelizer optimization: use even/odd technique halfband filter 2018-05-01 22:02:30 +02:00
f4exb a81e2f297a Benchmarking: added int to float decimation 2018-05-01 19:49:47 +02:00
f4exb efa168ec77 Floating point to floating point decimator optimization using the even/odd algorithm 2018-04-30 11:08:08 +02:00
f4exb 48cc6df8a7 Floating point to integer decimator optimization using the even/odd algorithm 2018-04-29 22:56:34 +02:00
f4exb 1213ad2a71 Simplified float halfband filters with unique class for floating point 2018-04-29 11:48:46 +02:00
f4exb 9c49be1313 Removed intrinsics completely from IntHalfbandFilterEO2 2018-04-29 11:38:42 +02:00
f4exb d735025c6c With global adoption of even/odd decimators the accu type must be 32 not 64 bits 2018-04-29 10:38:25 +02:00
f4exb 2252dcb06a Do not use intrinsics at all for IntHalfbandFilterEO1 2018-04-29 10:37:36 +02:00
f4exb b23d1f6a63 Optimization: always use the even/odd decimators 2018-04-28 05:08:01 +02:00
f4exb 27623709f0 Rewrite of decimator ifdefs 2018-04-28 03:04:34 +02:00
f4exb 33e171bd9b Moving average: fixed initialization 2018-04-27 20:40:17 +02:00
f4exb 2427c885f7 Benchmarking: added option to deactivate SIMD for decimators 2018-04-26 22:45:47 +02:00
f4exb 17ea5f29b3 Benchmarking: added float->float decimators and corresponding benchmark test 2018-04-25 18:01:01 +02:00
f4exb b03e9c59cb Benchmarking: implemented decimator float to int test 2018-04-25 01:44:54 +02:00
f4exb 2efa7ab594 DSD demod: allow use of audio rates that are integer multiples of 8k other than 48k (x2,3,4,5) 2018-04-23 01:04:47 +02:00