kopia lustrzana https://github.com/f4exb/sdrangel
Tx support: optimize final interpolator stages
rodzic
9b72a3c064
commit
3479559859
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@ -18,6 +18,18 @@
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#include "dsp/hbfiltertraits.h"
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const int16_t HBFIRFilterTraits<16>::hbMod[16+6] = {
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15,16,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,0,1,2
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};
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const int32_t HBFIRFilterTraits<16>::hbCoeffs[4] = {
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//* Firwin as in https://www.dsprelated.com/showcode/270.php */
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(int32_t)(-0.0052391810630145274965685509016566356877 * (1 << hbShift)),
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(int32_t)(0.0232111017863650750947535073009930783883 * (1 << hbShift)),
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(int32_t)(-0.0761058457486735451258397233686991967261 * (1 << hbShift)),
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(int32_t)(0.3076987787367443383246268240327481180429 * (1 << hbShift)),
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};
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const int16_t HBFIRFilterTraits<32>::hbMod[32+6] = {
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31,32,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19, 20,21,22,
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23,24,25,26,27,28,29,30,31,32,0,1,2
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@ -31,6 +31,15 @@ struct HBFIRFilterTraits
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{
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};
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template<>
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struct HBFIRFilterTraits<16>
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{
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static const int32_t hbOrder = 16;
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static const int32_t hbShift = 14;
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static const int16_t hbMod[16+6];
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static const int32_t hbCoeffs[4] __attribute__ ((aligned (16)));
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};
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template<>
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struct HBFIRFilterTraits<32>
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{
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@ -24,7 +24,9 @@
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#include "dsp/inthalfbandfilterdb.h"
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#endif
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#define INTERPOLATORS_HB_FILTER_ORDER 64
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#define INTERPOLATORS_HB_FILTER_ORDER_FIRST 64
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#define INTERPOLATORS_HB_FILTER_ORDER_SECOND 32
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#define INTERPOLATORS_HB_FILTER_ORDER_NEXT 16
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template<uint SdrBits, uint OutputBits>
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struct interpolation_shifts
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@ -113,19 +115,19 @@ public:
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private:
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#ifdef USE_SSE4_1
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator2; // 1st stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator4; // 2nd stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator8; // 3rd stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator16; // 4th stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator32; // 5th stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator64; // 6th stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER_FIRST> m_interpolator2; // 1st stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER_SECOND> m_interpolator4; // 2nd stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER_NEXT> m_interpolator8; // 3rd stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER_NEXT> m_interpolator16; // 4th stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER_NEXT> m_interpolator32; // 5th stages
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IntHalfbandFilterEO1<INTERPOLATORS_HB_FILTER_ORDER_NEXT> m_interpolator64; // 6th stages
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#else
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator2; // 1st stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator4; // 2nd stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator8; // 3rd stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator16; // 4th stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator32; // 5th stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER> m_interpolator64; // 6th stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER_FIRST> m_interpolator2; // 1st stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER_SECOND> m_interpolator4; // 2nd stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER_NEXT> m_interpolator8; // 3rd stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER_NEXT> m_interpolator16; // 4th stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER_NEXT> m_interpolator32; // 5th stages
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IntHalfbandFilterDB<INTERPOLATORS_HB_FILTER_ORDER_NEXT> m_interpolator64; // 6th stages
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#endif
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};
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