kopia lustrzana https://github.com/f4exb/sdrangel
85 wiersze
2.4 KiB
C
85 wiersze
2.4 KiB
C
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///////////////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2015 F4EXB //
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// written by Edouard Griffiths //
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// //
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// This program is free software; you can redistribute it and/or modify //
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// it under the terms of the GNU General Public License as published by //
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// the Free Software Foundation as version 3 of the License, or //
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// //
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// This program is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY; without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License V3 for more details. //
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// //
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// You should have received a copy of the GNU General Public License //
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// along with this program. If not, see <http://www.gnu.org/licenses/>. //
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///////////////////////////////////////////////////////////////////////////////////
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#ifndef PLUGINS_CHANNEL_BFM_RDSDEMOD_H_
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#define PLUGINS_CHANNEL_BFM_RDSDEMOD_H_
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#include <QObject>
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//#include "util/udpsink.h" // UDP debug
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#include "dsp/dsptypes.h"
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class RDSDemod : public QObject
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{
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Q_OBJECT
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public:
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RDSDemod();
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~RDSDemod();
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void setSampleRate(int srate);
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bool process(Real rdsSample, bool &bit);
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struct{
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Real acc;
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Real qua;
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Real fclk;
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} m_report;
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protected:
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bool biphase(Real acc, bool &bit, Real d_cphi);
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Real filter_lp_2400_iq(Real in, int iqIndex);
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Real filter_lp_pll(Real input);
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int sign(Real a);
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private:
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struct
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{
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double subcarr_phi;
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Real subcarr_bb[2];
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double clock_offset;
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double clock_phi;
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double prev_clock_phi;
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Real lo_clock;
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Real prev_lo_clock;
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Real prev_bb;
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double d_cphi;
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Real acc;
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int numsamples;
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Real prev_acc;
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int counter;
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int reading_frame;
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int tot_errs[2];
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int dbit;
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} m_parms;
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Real m_xv[2][2+1];
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Real m_yv[2][2+1];
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Real m_xw[1+1];
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Real m_yw[1+1];
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Real m_prev;
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int m_srate;
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//UDPSink<Real> m_udpDebug; // UDP debug
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static const Real m_pllBeta;
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static const Real m_fsc;
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};
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#endif /* PLUGINS_CHANNEL_BFM_RDSDEMOD_H_ */
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