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<H1>Re: New Interface sanei_pa4s2...</H1>
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<STRONG>From:</STRONG> Jochen Eisinger (<A HREF="mailto:jochen.eisinger@gmx.net?Subject=Re:%20New%20Interface%20sanei_pa4s2...&In-Reply-To=&lt;393E0C5F.FEE11DB@gmx.net&gt;"><EM>jochen.eisinger@gmx.net</EM></A>)<BR>
<STRONG>Date:</STRONG> Wed Jun 07 2000 - 01:48:31 PDT
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Petter Reinholdtsen wrote:
<BR>
<EM>&gt;
</EM><BR>
<EM>&gt; Is this chipset API enough for the backend to only implement the
</EM><BR>
<EM>&gt; high-level functionallity, and not require any hw access?
</EM><BR>
<EM>&gt;
</EM><BR>
This depends on what you mean withhw access. This interface gives an
<BR>
backend easy access to the registers of a A4S2 chipset so the backend
<BR>
needs not to use inb/outb. But the backend still cares about what to
<BR>
send to the registers... To summarize this, the interface just cares
<BR>
about the low level protocoll.
<BR>
<P><P><EM>&gt;
</EM><BR>
<EM>&gt; After reading thru the source, it seems like a few of the functions
</EM><BR>
<EM>&gt; might be used to improve the pio API. It must be possible to make a
</EM><BR>
<EM>&gt; parport API that works on all platforms. Are the _epp functions
</EM><BR>
<EM>&gt; implementing the 'enhanced parport' mode? I've been reading about the
</EM><BR>
<P>They are taken from a VxD-driver and as far as I know, this driver only
<BR>
works when EPP/ECP mode is activated in the BIOS. So I don't think the
<BR>
implement this mode, they just use it...
<BR>
<P><EM>&gt; the Linux parport kernel API, and noticed support for epp, ecp and
</EM><BR>
<EM>&gt; nibble mode in this API. Would a sanei parport API with support for
</EM><BR>
<EM>&gt; such modes make it easier to support parport scanners?
</EM><BR>
<P>Again, I don't know. But I'll have a look at this API. :-)
<BR>
<P><EM>&gt;
</EM><BR>
<EM>&gt; Happy hacking,
</EM><BR>
<P>Thanks :-)
<BR>
<P>-- jochen
<BR>
<P><PRE>
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