kopia lustrzana https://gitlab.com/sane-project/backends
717 wiersze
20 KiB
C
717 wiersze
20 KiB
C
/* sane - Scanner Access Now Easy.
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Copyright (C) 2010-2013 Stéphane Voltz <stef.dev@free.fr>
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This file is part of the SANE package.
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston,
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MA 02111-1307, USA.
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As a special exception, the authors of SANE give permission for
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additional uses of the libraries contained in this release of SANE.
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The exception is that, if you link a SANE library with other files
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to produce an executable, this does not by itself cause the
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resulting executable to be covered by the GNU General Public
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License. Your use of that executable is in no way restricted on
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account of linking the SANE library code into it.
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This exception does not, however, invalidate any other reasons why
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the executable file might be covered by the GNU General Public
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License.
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If you submit changes to SANE to the maintainers to be included in
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a subsequent release, you agree by submitting the changes that
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those changes may be distributed with this exception intact.
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If you write modifications of your own for SANE, it is your choice
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whether to permit this exception to apply to your modifications.
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If you do not wish that, delete this exception notice.
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*/
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#include "genesys.h"
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#define REG01 0x01
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#define REG01_CISSET 0x80
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#define REG01_DOGENB 0x40
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#define REG01_DVDSET 0x20
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#define REG01_STAGGER 0x10
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#define REG01_COMPENB 0x08
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#define REG01_TRUEGRAY 0x04
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#define REG01_SHDAREA 0x02
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#define REG01_SCAN 0x01
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#define REG02 0x02
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#define REG02_NOTHOME 0x80
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#define REG02_ACDCDIS 0x40
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#define REG02_AGOHOME 0x20
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#define REG02_MTRPWR 0x10
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#define REG02_FASTFED 0x08
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#define REG02_MTRREV 0x04
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#define REG02_HOMENEG 0x02
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#define REG02_LONGCURV 0x01
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#define REG03 0x03
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#define REG03_LAMPDOG 0x80
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#define REG03_AVEENB 0x40
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#define REG03_XPASEL 0x20
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#define REG03_LAMPPWR 0x10
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#define REG03_LAMPTIM 0x0f
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#define REG04 0x04
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#define REG04_LINEART 0x80
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#define REG04_BITSET 0x40
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#define REG04_FILTER 0x30
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#define REG04_AFEMOD 0x07
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#define REG05 0x05
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#define REG05_DPIHW 0xc0
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#define REG05_DPIHW_600 0x00
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#define REG05_DPIHW_1200 0x40
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#define REG05_DPIHW_2400 0x80
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#define REG05_DPIHW_4800 0xc0
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#define REG05_MTLLAMP 0x30
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#define REG05_GMMENB 0x08
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#define REG05_ENB20M 0x04
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#define REG05_MTLBASE 0x03
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#define REG06 0x06
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#define REG06_SCANMOD 0xe0
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#define REG06S_SCANMOD 5
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#define REG06_PWRBIT 0x10
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#define REG06_GAIN4 0x08
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#define REG06_OPTEST 0x07
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#define REG07_LAMPSIM 0x80
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#define REG08_DRAM2X 0x80
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#define REG08_MPENB 0x20
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#define REG08_CIS_LINE 0x10
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#define REG08_IR2_ENB 0x08
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#define REG08_IR1_ENB 0x04
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#define REG08_ENB24M 0x01
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#define REG09_MCNTSET 0xc0
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#define REG09_EVEN1ST 0x20
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#define REG09_BLINE1ST 0x10
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#define REG09_BACKSCAN 0x08
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#define REG09_OUTINV 0x04
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#define REG09_SHORTTG 0x02
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#define REG09S_MCNTSET 6
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#define REG09S_CLKSET 4
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#define REG0A 0x0a
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#define REG0A_SIFSEL 0xc0
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#define REG0AS_SIFSEL 6
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#define REG0A_SHEETFED 0x20
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#define REG0A_LPWMEN 0x10
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#define REG0B 0x0b
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#define REG0B_DRAMSEL 0x07
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#define REG0B_16M 0x01
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#define REG0B_64M 0x02
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#define REG0B_128M 0x03
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#define REG0B_256M 0x04
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#define REG0B_512M 0x05
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#define REG0B_1G 0x06
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#define REG0B_ENBDRAM 0x08
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#define REG0B_RFHDIS 0x10
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#define REG0B_CLKSET 0xe0
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#define REG0B_24MHZ 0x00
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#define REG0B_30MHZ 0x20
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#define REG0B_40MHZ 0x40
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#define REG0B_48MHZ 0x60
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#define REG0B_60MHZ 0x80
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#define REG0D 0x0d
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#define REG0D_MTRP_RDY 0x80
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#define REG0D_FULLSTP 0x10
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#define REG0D_CLRMCNT 0x04
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#define REG0D_CLRDOCJM 0x02
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#define REG0D_CLRLNCNT 0x01
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#define REG0F 0x0f
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#define REG16_CTRLHI 0x80
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#define REG16_TOSHIBA 0x40
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#define REG16_TGINV 0x20
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#define REG16_CK1INV 0x10
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#define REG16_CK2INV 0x08
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#define REG16_CTRLINV 0x04
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#define REG16_CKDIS 0x02
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#define REG16_CTRLDIS 0x01
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#define REG17_TGMODE 0xc0
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#define REG17_SNRSYN 0x0f
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#define REG18 0x18
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#define REG18_CNSET 0x80
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#define REG18_DCKSEL 0x60
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#define REG18_CKTOGGLE 0x10
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#define REG18_CKDELAY 0x0c
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#define REG18_CKSEL 0x03
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#define REG1A_SW2SET 0x80
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#define REG1A_SW1SET 0x40
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#define REG1A_MANUAL3 0x02
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#define REG1A_MANUAL1 0x01
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#define REG1A_CK4INV 0x08
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#define REG1A_CK3INV 0x04
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#define REG1A_LINECLP 0x02
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#define REG1C_TBTIME 0x07
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#define REG1D 0x1d
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#define REG1D_CK4LOW 0x80
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#define REG1D_CK3LOW 0x40
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#define REG1D_CK1LOW 0x20
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#define REG1D_LINESEL 0x1f
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#define REG1DS_LINESEL 0
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#define REG1E 0x1e
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#define REG1E_WDTIME 0xf0
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#define REG1ES_WDTIME 4
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#define REG1E_WDTIME 0xf0
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#define REG30 0x30
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#define REG31 0x31
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#define REG32 0x32
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#define REG32_GPIO16 0x80
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#define REG32_GPIO15 0x40
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#define REG32_GPIO14 0x20
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#define REG32_GPIO13 0x10
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#define REG32_GPIO12 0x08
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#define REG32_GPIO11 0x04
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#define REG32_GPIO10 0x02
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#define REG32_GPIO9 0x01
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#define REG33 0x33
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#define REG34 0x34
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#define REG35 0x35
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#define REG36 0x36
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#define REG37 0x37
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#define REG38 0x38
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#define REG39 0x39
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#define REG60 0x60
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#define REG60_LED4TG 0x80
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#define REG60_YENB 0x40
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#define REG60_YBIT 0x20
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#define REG60_ACYNCNRLC 0x10
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#define REG60_ENOFFSET 0x08
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#define REG60_LEDADD 0x04
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#define REG60_CK4ADC 0x02
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#define REG60_AUTOCONF 0x01
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#define REG80 0x80
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#define REG81 0x81
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#define REGA0 0xa0
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#define REGA0_FSTPSEL 0x28
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#define REGA0S_FSTPSEL 3
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#define REGA0_STEPSEL 0x03
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#define REGA0S_STEPSEL 0
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#define REGA1 0xa1
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#define REGA2 0xa2
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#define REGA3 0xa3
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#define REGA4 0xa4
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#define REGA5 0xa5
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#define REGA6 0xa6
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#define REGA7 0xa7
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#define REGA8 0xa8
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#define REGA9 0xa9
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#define REGAA 0xaa
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#define REGAB 0xab
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#define REGAC 0xac
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#define REGAD 0xad
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#define REGAE 0xae
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#define REGAF 0xaf
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#define REGB0 0xb0
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#define REGB1 0xb1
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#define REGB2 0xb2
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#define REGB2_Z1MOD 0x1f
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#define REGB3 0xb3
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#define REGB3_Z1MOD 0xff
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#define REGB4 0xb4
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#define REGB4_Z1MOD 0xff
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#define REGB5 0xb5
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#define REGB5_Z2MOD 0x1f
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#define REGB6 0xb6
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#define REGB6_Z2MOD 0xff
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#define REGB7 0xb7
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#define REGB7_Z2MOD 0xff
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#define REG100 0x100
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#define REG100_DOCSNR 0x80
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#define REG100_ADFSNR 0x40
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#define REG100_COVERSNR 0x20
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#define REG100_CHKVER 0x10
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#define REG100_DOCJAM 0x08
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#define REG100_HISPDFLG 0x04
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#define REG100_MOTMFLG 0x02
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#define REG100_DATAENB 0x01
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#define REG114 0x114
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#define REG115 0x115
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#define REG_LINCNT 0x25
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#define REG_MAXWD 0x28
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#define REG_DPISET 0x2c
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#define REG_FEEDL 0x3d
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#define REG_CK1MAP 0x74
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#define REG_CK3MAP 0x77
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#define REG_CK4MAP 0x7a
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#define REG_LPERIOD 0x7d
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#define REG_DUMMY 0x80
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#define REG_STRPIXEL 0x82
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#define REG_ENDPIXEL 0x85
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#define REG_EXPDMY 0x88
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#define REG_EXPR 0x8a
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#define REG_EXPG 0x8d
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#define REG_EXPB 0x90
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#define REG_SEGCNT 0x93
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#define REG_TG0CNT 0x96
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#define REG_SCANFED 0xa2
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#define REG_STEPNO 0xa4
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#define REG_FWDSTEP 0xa6
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#define REG_BWDSTEP 0xa8
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#define REG_FASTNO 0xaa
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#define REG_FSHDEC 0xac
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#define REG_FMOVNO 0xae
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#define REG_FMOVDEC 0xb0
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#define REG_Z1MOD 0xb2
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#define REG_Z2MOD 0xb5
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#define REG_TRUER 0x110
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#define REG_TRUEG 0x111
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#define REG_TRUEB 0x112
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/**
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* writable scanner registers */
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enum
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{
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reg_0x01 = 0,
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reg_0x02,
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reg_0x03,
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reg_0x04,
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reg_0x05,
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reg_0x06,
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reg_0x07,
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reg_0x08,
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reg_0x09,
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reg_0x0a,
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reg_0x0b,
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reg_0x0c,
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reg_0x11,
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reg_0x12,
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reg_0x13,
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reg_0x14,
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reg_0x15,
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reg_0x16,
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reg_0x17,
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reg_0x18,
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reg_0x19,
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reg_0x1a,
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reg_0x1b,
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reg_0x1c,
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reg_0x1d,
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reg_0x1e,
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reg_0x1f,
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reg_0x20,
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reg_0x21,
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reg_0x22,
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reg_0x23,
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reg_0x24,
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reg_0x25,
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reg_0x26,
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reg_0x27,
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reg_0x28,
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reg_0x29,
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reg_0x2a,
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reg_0x2b,
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reg_0x2c,
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reg_0x2d,
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reg_0x3b,
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reg_0x3c,
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reg_0x3d,
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reg_0x3e,
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reg_0x3f,
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reg_0x40,
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reg_0x41,
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reg_0x42,
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reg_0x43,
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reg_0x44,
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reg_0x45,
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reg_0x46,
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reg_0x47,
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reg_0x48,
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reg_0x49,
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reg_0x4f,
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reg_0x52,
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reg_0x53,
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reg_0x54,
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reg_0x55,
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reg_0x56,
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reg_0x57,
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reg_0x58,
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reg_0x59,
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reg_0x5a,
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reg_0x5b,
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reg_0x5c,
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reg_0x5f,
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reg_0x60,
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reg_0x61,
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reg_0x62,
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reg_0x63,
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reg_0x64,
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reg_0x65,
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reg_0x66,
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reg_0x67,
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reg_0x68,
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reg_0x69,
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reg_0x6a,
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reg_0x6b,
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reg_0x6c,
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reg_0x6d,
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reg_0x6e,
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reg_0x6f,
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reg_0x70,
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reg_0x71,
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reg_0x72,
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reg_0x73,
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reg_0x74,
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reg_0x75,
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reg_0x76,
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reg_0x77,
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reg_0x78,
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reg_0x79,
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reg_0x7a,
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reg_0x7b,
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reg_0x7c,
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reg_0x7d,
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reg_0x7e,
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reg_0x7f,
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reg_0x80,
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reg_0x81,
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reg_0x82,
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reg_0x83,
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reg_0x84,
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reg_0x85,
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reg_0x86,
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reg_0x87,
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reg_0x88,
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reg_0x89,
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reg_0x8a,
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reg_0x8b,
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reg_0x8c,
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reg_0x8d,
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reg_0x8e,
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reg_0x8f,
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reg_0x90,
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reg_0x91,
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reg_0x92,
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reg_0x93,
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reg_0x94,
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reg_0x95,
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reg_0x96,
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reg_0x97,
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reg_0x98,
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reg_0x99,
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reg_0x9a,
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reg_0x9b,
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reg_0x9c,
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reg_0x9d,
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reg_0x9e,
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reg_0x9f,
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reg_0xa0,
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reg_0xa1,
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reg_0xa2,
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reg_0xa3,
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reg_0xa4,
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reg_0xa5,
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reg_0xa6,
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reg_0xa7,
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reg_0xa8,
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reg_0xa9,
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reg_0xaa,
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reg_0xab,
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reg_0xac,
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reg_0xad,
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reg_0xae,
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reg_0xaf,
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reg_0xb0,
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reg_0xb1,
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reg_0xb2,
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reg_0xb3,
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reg_0xb4,
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reg_0xb5,
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reg_0xb6,
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reg_0xb7,
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reg_0xb8,
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reg_0xbb,
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reg_0xbc,
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reg_0xbd,
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reg_0xbe,
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reg_0xc3,
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reg_0xc4,
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reg_0xc5,
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reg_0xc6,
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reg_0xc7,
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reg_0xc8,
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reg_0xc9,
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reg_0xca,
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reg_0xcb,
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reg_0xcc,
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reg_0xcd,
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reg_0xce,
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reg_0xd0,
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reg_0xd1,
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reg_0xd2,
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reg_0xd3,
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reg_0xd4,
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reg_0xd5,
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reg_0xd6,
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reg_0xd7,
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reg_0xd8,
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reg_0xd9,
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reg_0xe0,
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reg_0xe1,
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reg_0xe2,
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reg_0xe3,
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reg_0xe4,
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reg_0xe5,
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reg_0xe6,
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reg_0xe7,
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reg_0xe8,
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reg_0xe9,
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reg_0xea,
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reg_0xeb,
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reg_0xec,
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reg_0xed,
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reg_0xee,
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reg_0xef,
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reg_0xf0,
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reg_0xf1,
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reg_0xf2,
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reg_0xf3,
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reg_0xf4,
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reg_0xf5,
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reg_0xf6,
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reg_0xf7,
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reg_0xf8,
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reg_0xf9,
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reg_0xfa,
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reg_0xfb,
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reg_0xfc,
|
|
reg_0xff,
|
|
GENESYS_GL124_MAX_REGS
|
|
};
|
|
|
|
#define SETREG(adr,val) {dev->reg[reg_##adr].address=adr;dev->reg[reg_##adr].value=val;}
|
|
|
|
typedef struct
|
|
{
|
|
uint8_t r31;
|
|
uint8_t r32;
|
|
uint8_t r33;
|
|
uint8_t r34;
|
|
uint8_t r35;
|
|
uint8_t r36;
|
|
uint8_t r38;
|
|
} Gpio_layout;
|
|
|
|
/** @brief gpio layout
|
|
* describes initial gpio settings for a given model
|
|
*/
|
|
static Gpio_layout gpios[]={
|
|
/* LiDE 110 */
|
|
{ /* 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x38 */
|
|
0x9f, 0x59, 0x01, 0x80, 0x5f, 0x01, 0x00
|
|
},
|
|
/* LiDE 210 */
|
|
{
|
|
0x9f, 0x59, 0x01, 0x80, 0x5f, 0x01, 0x00
|
|
},
|
|
};
|
|
|
|
typedef struct
|
|
{
|
|
uint8_t rd0;
|
|
uint8_t rd1;
|
|
uint8_t rd2;
|
|
uint8_t re0;
|
|
uint8_t re1;
|
|
uint8_t re2;
|
|
uint8_t re3;
|
|
uint8_t re4;
|
|
uint8_t re5;
|
|
uint8_t re6;
|
|
uint8_t re7;
|
|
} Memory_layout;
|
|
|
|
static Memory_layout layouts[]={
|
|
/* LIDE 110 */
|
|
{
|
|
0x0a, 0x15, 0x20,
|
|
0x00, 0xac, 0x08, 0x55, 0x08, 0x56, 0x0f, 0xff
|
|
},
|
|
/* LIDE 210 */
|
|
{
|
|
0x0a, 0x1f, 0x34,
|
|
0x01, 0x24, 0x08, 0x91, 0x08, 0x92, 0x0f, 0xff
|
|
}
|
|
};
|
|
|
|
/** @brief structure for sensor settings
|
|
* this structure describes the sensor settings to use for a given
|
|
* exposure. Data settings are identified by
|
|
* - sensor id
|
|
* - sensor hardware dpi
|
|
* - half ccd mode
|
|
*/
|
|
typedef struct {
|
|
int sensor_type; /**> sensor id */
|
|
int dpi; /**> maximum dpi for which data are valid */
|
|
int half_ccd; /**> half ccd mode */
|
|
int exposure; /**> exposure */
|
|
int ck1map; /**> CK1MAP */
|
|
int ck3map; /**> CK2MAP */
|
|
int ck4map; /**> CK3MAP */
|
|
int segcnt; /**> SEGCNT */
|
|
int tg0cnt; /**> TG0CNT */
|
|
int expdummy; /**> exposure dummy */
|
|
int expr; /**> initial red exposure */
|
|
int expg; /**> initial green exposure */
|
|
int expb; /**> initial blue exposure */
|
|
size_t *order; /**> order of sub-segments */
|
|
uint8_t reg18; /**> register 0x18 value */
|
|
uint8_t reg20; /**> register 0x20 value */
|
|
uint8_t reg61; /**> register 0x61 value */
|
|
uint8_t reg98; /**> register 0x98 value */
|
|
} Sensor_Profile;
|
|
|
|
static size_t order_01[]={0,1};
|
|
static size_t order_0213[]={0,2,1,3};
|
|
|
|
/* *INDENT-OFF* */
|
|
|
|
/**
|
|
* database of sensor profiles
|
|
*/
|
|
static Sensor_Profile sensors[]={
|
|
/* LiDE 110 */
|
|
{CIS_CANONLIDE110, 600, 1, 2768, 0x1e, 0x9f, 0x55, 2584, 154, 101, 388, 574, 393, NULL , 0x00, 0x0c, 0x20, 0x21},
|
|
{CIS_CANONLIDE110, 600, 0, 5360, 0x1e, 0x9f, 0x55, 5168, 163, 101, 388, 574, 393, NULL , 0x00, 0x0a, 0x20, 0x21},
|
|
{CIS_CANONLIDE110, 1200, 0, 10528, 0x1e, 0x9f, 0x55, 5168, 163, 101, 388, 574, 393, order_01 , 0x00, 0x08, 0x20, 0x22},
|
|
{CIS_CANONLIDE110, 2400, 0, 20864, 0x1e, 0x9f, 0x55, 5168, 163, 4679, 6839, 8401, 6859, order_0213, 0x00, 0x06, 0x20, 0x24},
|
|
|
|
/* LiDE 210 */
|
|
{CIS_CANONLIDE210, 600, 1, 2768, 0x1e, 0x9f, 0x55, 2584, 154, 101, 388, 574, 393, NULL , 0x00, 0x0c, 0x20, 0x21},
|
|
{CIS_CANONLIDE210, 600, 0, 5360, 0x1e, 0x9f, 0x55, 5168, 163, 101, 388, 574, 393, NULL , 0x00, 0x0a, 0x20, 0x21},
|
|
{CIS_CANONLIDE210, 1200, 0, 10528, 0x1e, 0x9f, 0x55, 5168, 163, 101, 388, 574, 393, order_01 , 0x00, 0x08, 0x20, 0x22},
|
|
{CIS_CANONLIDE210, 2400, 0, 20864, 0x1e, 0x9f, 0x55, 5168, 163, 4679, 6839, 8401, 6859, order_0213, 0x00, 0x06, 0x20, 0x24},
|
|
};
|
|
|
|
|
|
#define MOVE_DPI 200
|
|
#define MOVE_EXPOSURE 2304
|
|
|
|
static uint32_t lide210_fast[] = { 62496, 2343, 2343, 2343, 2343, 2343, 2343, 2343, 2343, 2051, 1432, 1372, 1323, 1280, 1246, 1216, 1188, 1163, 1142, 1121, 1101, 1084, 1068, 1051, 1036, 1020, 1007, 995, 983, 971, 959, 949, 938, 929, 917, 908, 900, 891, 882, 874, 866, 857, 849, 843, 835, 829, 821, 816, 808, 802, 795, 789, 784, 778, 773, 765, 760, 755, 749, 744, 739, 734, 731, 726, 721, 716, 711, 707, 702, 698, 693, 690, 685, 682, 677, 672, 669, 665, 662, 657, 654, 650, 647, 644, 639, 637, 632, 629, 626, 622, 619, 617, 614, 610, 607, 604, 601, 599, 595, 592, 589, 587, 584, 581, 579, 576, 572, 570, 567, 564, 562, 559, 557, 554, 552, 549, 547, 544, 542, 539, 538, 536, 533, 531, 529, 526, 524, 522, 519, 518, 516, 513, 511, 509, 506, 505, 503, 501, 498, 497, 495, 493, 491, 490, 487, 485, 483, 482, 480, 477, 476, 474, 472, 470, 469, 467, 465, 464, 462, 460, 458, 456, 455, 453, 451, 450, 448, 447, 445, 444, 442, 440, 439, 437, 436, 434, 433, 431, 430, 428, 427, 425, 423, 422, 420, 419, 417, 417, 415, 414, 413, 411, 410, 408, 407, 405, 404, 402, 401, 400, 399, 398, 396, 395, 393, 392, 391, 390, 389, 387, 386, 385, 383, 382, 381, 380, 379, 377, 376, 375, 374, 373, 371, 370, 369, 368, 367, 366, 364, 363, 363, 361, 360, 359, 358, 357, 356, 355, 353, 352, 352, 350, 349, 348, 347, 346, 345, 344, 343, 342, 341, 340, 339, 338, 335, 335, 0};
|
|
static uint32_t lide110_ok[] = { 62496, 2343, 2343, 2343, 2343, 2343, 2343, 2343, 2343, 2051, 1961, 1901, 1852, 1809, 1775, 1745, 1717, 1692, 1671, 1650, 1630, 1613, 1597,1580,1565,1549,1536,1524,1512,1500,1488,1478,1467,1458,1446,1437,1429,1420,1411,1403,1395,1386,1378,1372,1364,1358,1350,1345,1337,1331,1324,1318,1313,1307,1302,1294,1289,1284,1278,1273,1268,1263,1260,1255,1250,1245,1240,1236,1231,1227,1222,1219,1214,1211,1206,1201,1198,1194,1191,1186,1183,1179,1176,1173,1168,1166,1161,1158,1155,1151,1148,1146,1143,1139,1136,1133,1130,1128,1124,1121,1118,1116,1113,1110,1108,1105,1101,1099,1096,1093,1091,1088,1086,1083,1081,1078,1076,1073,1071,1068,1067,1065,1062,1060,1058,1055,1053,1051,1048,1047,1045,1042,1040,1038,1035,1034,1032,1030,1027,1026,1024,1022,1020,1019,1016,1014,1012,1011,1009,1006,1005,1003,1001,999,998,996,994,993,991,989,987,985,984,982,980,979,977,976,974,973,971,969,968,966,965,963,962,960,959,957,956,954,952,951,949,948,946,946,944,943,942,940,939,937,936,934,933,931,930,929,928,927,925,924,922,921,920,919,918,916,915,914,912,911,910,909,908,906,905,904,903,902,900,899,898,897,896,895,893,892,892,890,889,888,887,886,885,884,882,881,881,879,878,877,876,875,874,873,872,871,870,869,868,867,864,857, 849, 843, 835, 829, 821, 816, 808, 802, 795, 789, 784, 778, 773, 765, 760, 755, 749, 744, 739, 734, 731, 726, 721, 716, 711, 707, 702, 698, 693, 690, 685, 682, 677, 672, 669, 665, 662, 657, 654, 650, 647, 644, 639, 637, 632, 629, 626, 622, 619, 617, 614, 610, 607, 604, 601, 599, 595, 592, 589, 587, 584, 581, 579, 576, 572, 570, 567, 564, 562, 559, 557, 554, 552, 549, 547, 544, 542, 539, 538, 536, 533, 531, 529, 526, 524, 522, 519, 518, 516, 513, 511, 509, 506, 505, 503, 501, 498, 497, 495, 493, 491, 490, 487, 485, 483, 482, 480, 477, 476, 474, 472, 470, 469, 467, 465, 464, 462, 460, 458, 456, 455, 453, 451, 450, 448, 447, 445, 444, 442, 440, 439, 437, 436, 434, 433, 431, 430, 428, 427, 425, 423, 422, 420, 419, 417, 417, 415, 414, 413, 411, 410, 408, 407, 405, 404, 402, 401, 400, 399, 398, 396, 395, 393, 392, 391, 390, 389, 387, 386, 385, 383, 382, 381, 380, 379, 377, 376, 375, 374, 373, 371, 370, 369, 368, 367, 366, 364, 363, 363, 361, 360, 359, 358, 357, 356, 355, 353, 352, 352, 350, 349, 348, 347, 346, 345, 344, 343, 342, 341, 340, 339, 338, 335, 335, 0};
|
|
static uint32_t lide110_slow[] = { 62496, 7896, 2632, 0};
|
|
static uint32_t lide110_max[] = { 62496, 31296, 10432, 0};
|
|
static uint32_t lide210_max[] = { 62496, 31296, 20864, 10432, 0};
|
|
|
|
/**
|
|
* database of motor profiles
|
|
*/
|
|
|
|
|
|
/* NEXT LPERIOD=PREVIOUS*2-192 */
|
|
static Motor_Profile motors[]={
|
|
{MOTOR_CANONLIDE110, 2768, 0, lide210_fast},
|
|
{MOTOR_CANONLIDE110, 5360, 0, lide110_ok},
|
|
{MOTOR_CANONLIDE110, 10528, 1, lide110_slow},
|
|
{MOTOR_CANONLIDE110, 20864, 2, lide110_max},
|
|
{MOTOR_CANONLIDE210, 2768, 0, lide210_fast},
|
|
{MOTOR_CANONLIDE210, 5360, 0, lide110_ok},
|
|
{MOTOR_CANONLIDE210, 10528, 1, lide110_slow},
|
|
{MOTOR_CANONLIDE210, 20864, 2, lide210_max},
|
|
{0, 0, 0, NULL},
|
|
};
|
|
/* *INDENT-ON* */
|
|
|
|
#ifndef UNIT_TESTING
|
|
static
|
|
#endif
|
|
SANE_Status gl124_init_scan_regs (Genesys_Device * dev,
|
|
Genesys_Register_Set * reg,
|
|
float xres, /*dpi */
|
|
float yres, /*dpi */
|
|
float startx, /*optical_res, from dummy_pixel+1 */
|
|
float starty, /*base_ydpi, from home! */
|
|
float pixels,
|
|
float lines,
|
|
unsigned int depth,
|
|
unsigned int channels,
|
|
int color_filter, unsigned int flags);
|
|
|
|
#ifndef UNIT_TESTING
|
|
static
|
|
#endif
|
|
SANE_Status gl124_start_action (Genesys_Device * dev);
|
|
#ifndef UNIT_TESTING
|
|
static
|
|
#endif
|
|
SANE_Status
|
|
gl124_begin_scan (Genesys_Device * dev, Genesys_Register_Set * reg,
|
|
SANE_Bool start_motor);
|
|
#ifndef UNIT_TESTING
|
|
static
|
|
#endif
|
|
SANE_Status
|
|
gl124_end_scan (Genesys_Device * dev, Genesys_Register_Set * reg,
|
|
SANE_Bool check_stop);
|
|
#ifndef UNIT_TESTING
|
|
static
|
|
#endif
|
|
SANE_Status
|
|
gl124_slow_back_home (Genesys_Device * dev, SANE_Bool wait_until_home);
|
|
#ifndef UNIT_TESTING
|
|
static
|
|
#endif
|
|
SANE_Status gl124_init (Genesys_Device * dev);
|
|
#ifndef UNIT_TESTING
|
|
static
|
|
#endif
|
|
SANE_Status gl124_send_shading_data (Genesys_Device * dev, uint8_t * data, int size);
|
|
|
|
#ifndef UNIT_TESTING
|
|
static
|
|
#endif
|
|
SANE_Status gl124_feed (Genesys_Device * dev, unsigned int steps);
|
|
|
|
GENESYS_STATIC SANE_Status
|
|
gl124_stop_action (Genesys_Device * dev);
|
|
|
|
GENESYS_STATIC SANE_Status
|
|
gl124_send_slope_table (Genesys_Device * dev, int table_nr,
|
|
uint16_t * slope_table, int steps);
|
|
|
|
/* vim: set sw=2 cino=>2se-1sn-1s{s^-1st0(0u0 smarttab expandtab: */
|