kopia lustrzana https://gitlab.com/sane-project/backends
genesys: Fix invalid memory access in ImagePipelineNodeDesegment
rodzic
cacc68a6d4
commit
fd13c10b5c
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@ -220,7 +220,7 @@ ImagePipelineNodeDesegment::ImagePipelineNodeDesegment(ImagePipelineNode& source
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segment_pixels_{segment_pixels},
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interleaved_lines_{interleaved_lines},
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pixels_per_chunk_{pixels_per_chunk},
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buffer_{get_row_bytes()}
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buffer_{source_.get_row_bytes()}
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{
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DBG_HELPER_ARGS(dbg, "segment_count=%zu, segment_size=%zu, interleaved_lines=%zu, "
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"pixels_per_shunk=%zu", segment_order.size(), segment_pixels,
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