kopia lustrzana https://gitlab.com/sane-project/backends
* backend/genesys_gl841.c: One more instance of
sizeof(Genesys_Register_Set) vs 2 * backend/genesys.c: Add check for small register set in sanei_genesys_get_addressmerge-requests/1/head
rodzic
4cf4d8dd7f
commit
e403a87c10
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@ -1,3 +1,10 @@
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2007-10-13 Pierre Willenbrock <pierre@pirsoft.dnsalias.org>
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* backend/genesys_gl841.c: One more instance of
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sizeof(Genesys_Register_Set) vs 2
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* backend/genesys.c: Add check for small register set in
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sanei_genesys_get_address
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2007-10-24 Julien Blache <jb@jblache.org>
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2007-10-24 Julien Blache <jb@jblache.org>
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* backends/net.c: Add an optional connection timeout for the
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* backends/net.c: Add an optional connection timeout for the
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initial connection to saned. Based on a patch from Ryan Duryea
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initial connection to saned. Based on a patch from Ryan Duryea
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@ -499,7 +499,7 @@ Genesys_Register_Set *
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sanei_genesys_get_address (Genesys_Register_Set * regs, SANE_Byte addr)
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sanei_genesys_get_address (Genesys_Register_Set * regs, SANE_Byte addr)
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{
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{
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int i;
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int i;
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for (i = 0; i < GENESYS_MAX_REGS; i++)
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for (i = 0; i < GENESYS_MAX_REGS && regs[i].address; i++)
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{
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{
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if (regs[i].address == addr)
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if (regs[i].address == addr)
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return ®s[i];
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return ®s[i];
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@ -378,23 +378,27 @@ enum
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/* ------------------------------------------------------------------------ */
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/* ------------------------------------------------------------------------ */
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/* Write to many registers */
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/* Write to many registers */
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/* Note: There is no known bulk register write,
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this function is sending single registers instead */
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static SANE_Status
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static SANE_Status
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gl841_bulk_write_register (Genesys_Device * dev,
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gl841_bulk_write_register (Genesys_Device * dev,
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Genesys_Register_Set * reg, size_t size)
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Genesys_Register_Set * reg, size_t size)
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{
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{
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SANE_Status status = SANE_STATUS_GOOD;
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SANE_Status status = SANE_STATUS_GOOD;
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unsigned int i;
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unsigned int i;
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unsigned int elems;
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/* handle differently sized register sets, reg[0x00] is the last one */
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/* handle differently sized register sets, reg[0x00] is the last one */
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i = 0;
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i = 0;
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while ((i < size / 2) && (reg[i].address != 0))
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while ((i < size / sizeof(Genesys_Register_Set)) && (reg[i].address != 0))
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i++;
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i++;
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size = i * 2;
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elems = i;
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DBG (DBG_io, "gl841_bulk_write_register (size = %lu)\n",
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DBG (DBG_io, "gl841_bulk_write_register (size = %lu)\n",
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(u_long) size);
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(u_long) elems * sizeof(Genesys_Register_Set));
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for (i = 0; i < size / 2; i++) {
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for (i = 0; i < elems; i++) {
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u_int8_t msg[2];
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u_int8_t msg[2];
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@ -417,7 +421,7 @@ gl841_bulk_write_register (Genesys_Device * dev,
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}
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}
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DBG (DBG_io, "gl841_bulk_write_register: wrote %d bytes\n", size);
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DBG (DBG_io, "gl841_bulk_write_register: wrote %d registers\n", elems);
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return status;
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return status;
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}
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}
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