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working 75, 150, 600 and 1200 dpi modes uncalibrated

merge-requests/1/head
Stphane Voltz 2010-05-11 21:56:03 +02:00
rodzic 96b29ca201
commit ca3b005946
2 zmienionych plików z 116 dodań i 69 usunięć
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9
backend/genesys_devices.c
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@ -785,9 +785,12 @@ static Genesys_Motor Motor[] = {
1, /* maximum power modes count */ 1, /* maximum power modes count */
{ /* motor slopes */ { /* motor slopes */
{ /* power mode 0 */ { /* power mode 0 */
{ 2343, 1017, 32, 0.80}, /* full step */
{ 3675, 2034, 32, 0.80}, /* half step */
{ 4*2034, 4*2034, 32, 0.80}, /* quarter step */
/* extra values kept for documentation */
{ 2343, 864, 32, 0.80}, /* full step */ { 2343, 864, 32, 0.80}, /* full step */
{ 2*1171, 2*648, 32, 0.80}, /* half step */ { 2*1171, 2*648, 32, 0.80}, /* half step */
{ 4*2034, 4*2034, 32, 0.80}, /* quarter step */
}, },
}, },
}, },
@ -926,8 +929,8 @@ static Genesys_Model canon_lide_100_model = {
GENESYS_GL847, GENESYS_GL847,
NULL, NULL,
{1200, 600, 300, 150, 75, 0}, /* possible x-resolutions */ {1200, 600, 400, 300, 200, 150, 75, 0}, /* possible x-resolutions */
{1200, 600, 300, 150, 75, 0}, /* possible y-resolutions */ {1200, 600, 400, 300, 200, 150, 75, 0}, /* possible y-resolutions */
{16, 8, 0}, /* possible depths in gray mode */ {16, 8, 0}, /* possible depths in gray mode */
{16, 8, 0}, /* possible depths in color mode */ {16, 8, 0}, /* possible depths in color mode */

170
backend/genesys_gl847.c
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@ -1179,6 +1179,8 @@ gl847_init_motor_regs_scan (Genesys_Device * dev, Genesys_Register_Set * reg, un
use_fast_fed = fast_time < slow_time; use_fast_fed = fast_time < slow_time;
} }
DBG (DBG_info, "gl847_init_motor_regs_scan: decided to use %s mode\n",
use_fast_fed ? "fast feed" : "slow feed");
/* XXX STEF XXX */ /* XXX STEF XXX */
use_fast_fed = 0; use_fast_fed = 0;
@ -1190,8 +1192,6 @@ gl847_init_motor_regs_scan (Genesys_Device * dev, Genesys_Register_Set * reg, un
feedl = 0; feedl = 0;
else else
feedl = (feed_steps << scan_step_type) - slow_slope_steps; feedl = (feed_steps << scan_step_type) - slow_slope_steps;
DBG (DBG_info, "gl847_init_motor_regs_scan: decided to use %s mode\n",
use_fast_fed ? "fast feed" : "slow feed");
/* all needed slopes available. we did even decide which mode to use. /* all needed slopes available. we did even decide which mode to use.
what next? */ what next? */
@ -1226,10 +1226,16 @@ gl847_init_motor_regs_scan (Genesys_Device * dev, Genesys_Register_Set * reg, un
/* hi res motor speed */ /* hi res motor speed */
RIE (sanei_genesys_read_register (dev, REG6C, &effective)); RIE (sanei_genesys_read_register (dev, REG6C, &effective));
if (scan_yres >= dev->sensor.optical_res / 2)
/* if quarter step, bipolar Vref2 */
if (scan_step_type > 1)
{ {
val = effective & ~REG6C_GPIO13; val = effective & ~REG6C_GPIO13;
} }
else
{
val = effective;
}
RIE (sanei_genesys_write_register (dev, REG6C, val)); RIE (sanei_genesys_write_register (dev, REG6C, val));
/* effective scan */ /* effective scan */
@ -1633,7 +1639,9 @@ gl847_get_led_exposure (Genesys_Device * dev)
static static
#endif #endif
SANE_Status SANE_Status
gl847_init_scan_regs (Genesys_Device * dev, Genesys_Register_Set * reg, float xres, /*dpi */ gl847_init_scan_regs (Genesys_Device * dev,
Genesys_Register_Set * reg,
float xres, /*dpi */
float yres, /*dpi */ float yres, /*dpi */
float startx, /*optical_res, from dummy_pixel+1 */ float startx, /*optical_res, from dummy_pixel+1 */
float starty, /*base_ydpi, from home! */ float starty, /*base_ydpi, from home! */
@ -4051,82 +4059,116 @@ gl847_init_memory_layout (Genesys_Device * dev)
/* setup base address for shading data. */ /* setup base address for shading data. */
/* values must be multiplied by 8192=0x4000 to give address on AHB */ /* values must be multiplied by 8192=0x4000 to give address on AHB */
/* R-Channel shading bank0 address setting for CIS */ /* R-Channel shading bank0 address setting for CIS */
SETREG (0xd0, layouts[idx].rd0); sanei_genesys_write_register (dev, 0xd0, layouts[idx].rd0);
/* G-Channel shading bank0 address setting for CIS */ /* G-Channel shading bank0 address setting for CIS */
SETREG (0xd1, layouts[idx].rd1); sanei_genesys_write_register (dev, 0xd1, layouts[idx].rd1);
/* B-Channel shading bank0 address setting for CIS */ /* B-Channel shading bank0 address setting for CIS */
SETREG (0xd2, layouts[idx].rd2); sanei_genesys_write_register (dev, 0xd2, layouts[idx].rd2);
/* setup base address for scanned data. */ /* setup base address for scanned data. */
/* values must be multiplied by 1024*2=0x0800 to give address on AHB */ /* values must be multiplied by 1024*2=0x0800 to give address on AHB */
/* R-Channel ODD image buffer 0x0124->0x92000 */ /* R-Channel ODD image buffer 0x0124->0x92000 */
/* size for each buffer is 0x16d*1k word */ /* size for each buffer is 0x16d*1k word */
SETREG (0xe0, layouts[idx].re0); sanei_genesys_write_register (dev, 0xe0, layouts[idx].re0);
SETREG (0xe1, layouts[idx].re1); sanei_genesys_write_register (dev, 0xe1, layouts[idx].re1);
/* R-Channel ODD image buffer end-address 0x0291->0x148800 => size=0xB6800*/ /* R-Channel ODD image buffer end-address 0x0291->0x148800 => size=0xB6800*/
SETREG (0xe2, layouts[idx].re2); sanei_genesys_write_register (dev, 0xe2, layouts[idx].re2);
SETREG (0xe3, layouts[idx].re3); sanei_genesys_write_register (dev, 0xe3, layouts[idx].re3);
/* R-Channel EVEN image buffer 0x0292 */ /* R-Channel EVEN image buffer 0x0292 */
SETREG (0xe4, layouts[idx].re4); sanei_genesys_write_register (dev, 0xe4, layouts[idx].re4);
SETREG (0xe5, layouts[idx].re5); sanei_genesys_write_register (dev, 0xe5, layouts[idx].re5);
/* R-Channel EVEN image buffer end-address 0x03ff*/ /* R-Channel EVEN image buffer end-address 0x03ff*/
SETREG (0xe6, layouts[idx].re6); sanei_genesys_write_register (dev, 0xe6, layouts[idx].re6);
SETREG (0xe7, layouts[idx].re7); sanei_genesys_write_register (dev, 0xe7, layouts[idx].re7);
/* same for green, since CIS, same addresses */ /* same for green, since CIS, same addresses */
SETREG (0xe8, layouts[idx].re0); sanei_genesys_write_register (dev, 0xe8, layouts[idx].re0);
SETREG (0xe9, layouts[idx].re1); sanei_genesys_write_register (dev, 0xe9, layouts[idx].re1);
SETREG (0xea, layouts[idx].re2); sanei_genesys_write_register (dev, 0xea, layouts[idx].re2);
SETREG (0xeb, layouts[idx].re3); sanei_genesys_write_register (dev, 0xeb, layouts[idx].re3);
SETREG (0xec, layouts[idx].re4); sanei_genesys_write_register (dev, 0xec, layouts[idx].re4);
SETREG (0xed, layouts[idx].re5); sanei_genesys_write_register (dev, 0xed, layouts[idx].re5);
SETREG (0xee, layouts[idx].re6); sanei_genesys_write_register (dev, 0xee, layouts[idx].re6);
SETREG (0xef, layouts[idx].re7); sanei_genesys_write_register (dev, 0xef, layouts[idx].re7);
/* same for blue, since CIS, same addresses */ /* same for blue, since CIS, same addresses */
SETREG (0xf0, layouts[idx].re0); sanei_genesys_write_register (dev, 0xf0, layouts[idx].re0);
SETREG (0xf1, layouts[idx].re1); sanei_genesys_write_register (dev, 0xf1, layouts[idx].re1);
SETREG (0xf2, layouts[idx].re2); sanei_genesys_write_register (dev, 0xf2, layouts[idx].re2);
SETREG (0xf3, layouts[idx].re3); sanei_genesys_write_register (dev, 0xf3, layouts[idx].re3);
SETREG (0xf4, layouts[idx].re4); sanei_genesys_write_register (dev, 0xf4, layouts[idx].re4);
SETREG (0xf5, layouts[idx].re5); sanei_genesys_write_register (dev, 0xf5, layouts[idx].re5);
SETREG (0xf6, layouts[idx].re6); sanei_genesys_write_register (dev, 0xf6, layouts[idx].re6);
SETREG (0xf7, layouts[idx].re7); sanei_genesys_write_register (dev, 0xf7, layouts[idx].re7);
/* only write modified registers */
RIE (sanei_genesys_write_register (dev, 0xd0, dev->reg[reg_0xd0].value));
RIE (sanei_genesys_write_register (dev, 0xd1, dev->reg[reg_0xd1].value));
RIE (sanei_genesys_write_register (dev, 0xd2, dev->reg[reg_0xd2].value));
RIE (sanei_genesys_write_register (dev, 0xe0, dev->reg[reg_0xe0].value));
RIE (sanei_genesys_write_register (dev, 0xe1, dev->reg[reg_0xe1].value));
RIE (sanei_genesys_write_register (dev, 0xe2, dev->reg[reg_0xe2].value));
RIE (sanei_genesys_write_register (dev, 0xe3, dev->reg[reg_0xe3].value));
RIE (sanei_genesys_write_register (dev, 0xe4, dev->reg[reg_0xe4].value));
RIE (sanei_genesys_write_register (dev, 0xe5, dev->reg[reg_0xe5].value));
RIE (sanei_genesys_write_register (dev, 0xe6, dev->reg[reg_0xe6].value));
RIE (sanei_genesys_write_register (dev, 0xe7, dev->reg[reg_0xe7].value));
RIE (sanei_genesys_write_register (dev, 0xe8, dev->reg[reg_0xe8].value));
RIE (sanei_genesys_write_register (dev, 0xe9, dev->reg[reg_0xe9].value));
RIE (sanei_genesys_write_register (dev, 0xea, dev->reg[reg_0xea].value));
RIE (sanei_genesys_write_register (dev, 0xeb, dev->reg[reg_0xeb].value));
RIE (sanei_genesys_write_register (dev, 0xec, dev->reg[reg_0xec].value));
RIE (sanei_genesys_write_register (dev, 0xed, dev->reg[reg_0xed].value));
RIE (sanei_genesys_write_register (dev, 0xee, dev->reg[reg_0xee].value));
RIE (sanei_genesys_write_register (dev, 0xef, dev->reg[reg_0xef].value));
RIE (sanei_genesys_write_register (dev, 0xf0, dev->reg[reg_0xf0].value));
RIE (sanei_genesys_write_register (dev, 0xf1, dev->reg[reg_0xf1].value));
RIE (sanei_genesys_write_register (dev, 0xf2, dev->reg[reg_0xf2].value));
RIE (sanei_genesys_write_register (dev, 0xf3, dev->reg[reg_0xf3].value));
RIE (sanei_genesys_write_register (dev, 0xf4, dev->reg[reg_0xf4].value));
RIE (sanei_genesys_write_register (dev, 0xf5, dev->reg[reg_0xf5].value));
RIE (sanei_genesys_write_register (dev, 0xf6, dev->reg[reg_0xf6].value));
RIE (sanei_genesys_write_register (dev, 0xf7, dev->reg[reg_0xf7].value));
DBG (DBG_proc, "gl847_init_memory_layout completed\n"); DBG (DBG_proc, "gl847_init_memory_layout completed\n");
return status; return status;
} }
/** @brief dummy sca nto reset scanner
*
* */
static SANE_Status gl847_dummy_scan(Genesys_Device *dev)
{
SANE_Status status;
size_t size;
uint8_t *line;
float pixels;
DBG (DBG_proc, "%s start\n", __FUNCTION__);
/* initial calibration reg values */
memcpy (dev->calib_reg, dev->reg, GENESYS_GL847_MAX_REGS * sizeof (Genesys_Register_Set));
pixels= (16 * 300) / dev->sensor.optical_res;
status = gl847_init_scan_regs (dev,
dev->calib_reg,
300,
300,
0,
0,
pixels,
1,
16,
3,
0,
SCAN_FLAG_DISABLE_SHADING |
SCAN_FLAG_DISABLE_GAMMA |
SCAN_FLAG_SINGLE_LINE |
SCAN_FLAG_IGNORE_LINE_DISTANCE |
SCAN_FLAG_USE_OPTICAL_RES
);
RIE (gl847_bulk_write_register
(dev, dev->calib_reg, GENESYS_GL847_MAX_REGS));
/* colors * bytes_per_color * scan lines */
size = ((int) pixels) * 3 * 2 * 1;
line = malloc (size);
if (!line)
return SANE_STATUS_NO_MEM;
DBG (DBG_info,
"gl847_init: starting dummy data reading\n");
RIE (gl847_begin_scan (dev, dev->calib_reg, SANE_TRUE));
sanei_usb_set_timeout(1000);/* 1 second*/
/*ignore errors. next read will succeed*/
sanei_genesys_read_data_from_scanner (dev, line, size);
sanei_usb_set_timeout(30 * 1000);/* 30 seconds*/
RIE (gl847_end_scan (dev, dev->calib_reg, SANE_TRUE));
free(line);
DBG (DBG_proc, "%s completed\n", __FUNCTION__);
return SANE_STATUS_GOOD;
}
/* * /* *
* initialize ASIC : registers, motor tables, and gamma tables * initialize ASIC : registers, motor tables, and gamma tables
* then ensure scanner's head is at home * then ensure scanner's head is at home
@ -4222,11 +4264,10 @@ gl847_init (Genesys_Device * dev)
SETREG (0x08, REG08_CIS_LINE); SETREG (0x08, REG08_CIS_LINE);
RIE (sanei_genesys_write_register (dev, 0x08, dev->reg[reg_0x08].value)); RIE (sanei_genesys_write_register (dev, 0x08, dev->reg[reg_0x08].value));
/* end access ?? */ /* set up end access */
/* URB 109 control 0x40 0x0c 0x8c 0x10 len 1 wrote 0x0b
URB 110 control 0x40 0x0c 0x8c 0x13 len 1 wrote 0x0e */
RIE (write_end_access (dev, 0x10, 0x0b)); RIE (write_end_access (dev, 0x10, 0x0b));
RIE (write_end_access (dev, 0x13, 0x0e)); RIE (write_end_access (dev, 0x13, 0x0e));
sanei_genesys_write_register (dev, REGA7, 0x04); sanei_genesys_write_register (dev, REGA7, 0x04);
sanei_genesys_write_register (dev, REGA9, 0x00); sanei_genesys_write_register (dev, REGA9, 0x00);
@ -4316,6 +4357,9 @@ gl847_init (Genesys_Device * dev)
return status; return status;
} }
/* to clear error condition on scan */
/* gl847_dummy_scan(dev); */
memcpy (dev->calib_reg, dev->reg, memcpy (dev->calib_reg, dev->reg,
GENESYS_GL847_MAX_REGS * sizeof (Genesys_Register_Set)); GENESYS_GL847_MAX_REGS * sizeof (Genesys_Register_Set));