* backend/genesys_gl841.c: Send 32 registers at once instead of 1

merge-requests/1/head
Pierre Willenbrock 2008-02-20 18:16:21 +00:00
rodzic 3b855e1b4b
commit babeea8be2
2 zmienionych plików z 17 dodań i 9 usunięć

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@ -1,3 +1,6 @@
2008-02-20 Pierre Willenbrock <pierre@pirsoft.dnsalias.org>
* backend/genesys_gl841.c: Send 32 registers at once instead of 1
2008-02-20 Mattias Ellert <mattias.ellert@tsl.uu.se> 2008-02-20 Mattias Ellert <mattias.ellert@tsl.uu.se>
* backend/Makefile.in, ltmain.sh: Library version definition fixes * backend/Makefile.in, ltmain.sh: Library version definition fixes
* backend/coolscan3.c: Fix format warnings * backend/coolscan3.c: Fix format warnings

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@ -385,7 +385,8 @@ gl841_bulk_write_register (Genesys_Device * dev,
Genesys_Register_Set * reg, size_t elems) Genesys_Register_Set * reg, size_t elems)
{ {
SANE_Status status = SANE_STATUS_GOOD; SANE_Status status = SANE_STATUS_GOOD;
unsigned int i; unsigned int i, c;
u_int8_t buffer[GENESYS_MAX_REGS * 2];
/* handle differently sized register sets, reg[0x00] is the last one */ /* handle differently sized register sets, reg[0x00] is the last one */
i = 0; i = 0;
@ -399,14 +400,20 @@ gl841_bulk_write_register (Genesys_Device * dev,
for (i = 0; i < elems; i++) { for (i = 0; i < elems; i++) {
u_int8_t msg[2]; buffer[i * 2 + 0] = reg[i].address;
buffer[i * 2 + 1] = reg[i].value;
msg[0] = reg[i].address;
msg[1] = reg[i].value;
DBG (DBG_io2, "reg[0x%02x] = 0x%02x\n", buffer[i * 2 + 0],
buffer[i * 2 + 0]);
}
for (i = 0; i < elems;) {
c = elems - i;
if (c > 32) /*32 is max. checked that.*/
c = 32;
status = status =
sanei_usb_control_msg (dev->dn, REQUEST_TYPE_OUT, REQUEST_BUFFER, sanei_usb_control_msg (dev->dn, REQUEST_TYPE_OUT, REQUEST_BUFFER,
VALUE_SET_REGISTER, INDEX, 2, msg); VALUE_SET_REGISTER, INDEX, c * 2, buffer + i * 2);
if (status != SANE_STATUS_GOOD) if (status != SANE_STATUS_GOOD)
{ {
DBG (DBG_error, DBG (DBG_error,
@ -415,10 +422,8 @@ gl841_bulk_write_register (Genesys_Device * dev,
return status; return status;
} }
DBG (DBG_io2, "reg[0x%02x] = 0x%02x\n", msg[0], i += c;
msg[1]);
} }
DBG (DBG_io, "gl841_bulk_write_register: wrote %lu registers\n", DBG (DBG_io, "gl841_bulk_write_register: wrote %lu registers\n",
(u_long) elems); (u_long) elems);