From af0477bfce9e59055af3c3e222c39b0a28957dd0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?St=C3=A9phane=20Voltz?= <stef.dev@free.fr>
Date: Wed, 8 Jul 2009 20:45:25 +0200
Subject: [PATCH] DBG proc level trace for sanei_genesys_init_fe

---
 backend/genesys.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/backend/genesys.c b/backend/genesys.c
index 9ee101199..ffbc05f48 100644
--- a/backend/genesys.c
+++ b/backend/genesys.c
@@ -436,6 +436,7 @@ sanei_genesys_init_fe (Genesys_Device * dev)
 {
   unsigned int i;
 
+  DBG (DBG_proc, "sanei_genesys_init_fe: start\n");
   for (i = 0; i < sizeof (Wolfson) / sizeof (Genesys_Frontend); i++)
     {
       if (dev->model->dac_type == Wolfson[i].fe_id)
@@ -449,6 +450,7 @@ sanei_genesys_init_fe (Genesys_Device * dev)
        dev->model->dac_type);
   DBG (DBG_info, "sanei_genesys_init_fe: dac_type %d set up\n",
        dev->model->dac_type);
+  DBG (DBG_proc, "sanei_genesys_init_fe: end\n");
 }
 
 /* Write data for analog frontend */