diff --git a/backend/genesys_gl124.cc b/backend/genesys_gl124.cc
index cc2141a3d..76839df11 100644
--- a/backend/genesys_gl124.cc
+++ b/backend/genesys_gl124.cc
@@ -3428,6 +3428,7 @@ gl124_init(Genesys_Device * dev)
 static SANE_Status
 gl124_boot (Genesys_Device * dev, SANE_Bool cold)
 {
+    DBG_HELPER(dbg);
   SANE_Status status = SANE_STATUS_GOOD;
   uint8_t val;
 
@@ -3467,9 +3468,9 @@ gl124_boot (Genesys_Device * dev, SANE_Bool cold)
   RIE (sanei_genesys_write_register (dev, REG0B, val));
   dev->reg.remove_reg(0x0b);
 
-  /* set up end access */
-  RIE (sanei_genesys_write_0x8c (dev, 0x10, 0x0b));
-  RIE (sanei_genesys_write_0x8c (dev, 0x13, 0x0e));
+    //set up end access
+    sanei_genesys_write_0x8c(dev, 0x10, 0x0b);
+    sanei_genesys_write_0x8c(dev, 0x13, 0x0e);
 
   /* CIS_LINE */
   SETREG (0x08, REG08_CIS_LINE);
diff --git a/backend/genesys_gl841.cc b/backend/genesys_gl841.cc
index a2cdb839d..00e5565fc 100644
--- a/backend/genesys_gl841.cc
+++ b/backend/genesys_gl841.cc
@@ -565,7 +565,7 @@ gl841_init_lide80 (Genesys_Device * dev)
   sanei_genesys_read_register (dev, REG6B, &val);
   sanei_genesys_write_register (dev, REG6B, 0x06);
 
-  sanei_genesys_write_0x8c (dev, 0x10, 0x94);
+    sanei_genesys_write_0x8c(dev, 0x10, 0x94);
   sanei_genesys_write_register (dev, 0x09, 0x10);
 
   /* set up GPIO : no address, so no bulk write, doesn't written directly either ? */
diff --git a/backend/genesys_gl843.cc b/backend/genesys_gl843.cc
index 4e57fdea6..2d0b95e66 100644
--- a/backend/genesys_gl843.cc
+++ b/backend/genesys_gl843.cc
@@ -3953,6 +3953,7 @@ gl843_init_gpio (Genesys_Device * dev)
 static SANE_Status
 gl843_boot (Genesys_Device * dev, SANE_Bool cold)
 {
+    DBG_HELPER(dbg);
   SANE_Status status = SANE_STATUS_GOOD;
   uint8_t val;
 
@@ -3972,7 +3973,7 @@ gl843_boot (Genesys_Device * dev, SANE_Bool cold)
     {
       val = 0x11;
     }
-  RIE (sanei_genesys_write_0x8c (dev, 0x0f, val));
+    sanei_genesys_write_0x8c(dev, 0x0f, val);
 
   /* test CHKVER */
   RIE (sanei_genesys_read_register (dev, REG40, &val));
@@ -4005,16 +4006,14 @@ gl843_boot (Genesys_Device * dev, SANE_Bool cold)
   dev->reg.find_reg(0x0b).value = val;
 
     if (dev->model->model_id == MODEL_CANON_CANOSCAN_8400F) {
-        RIE(sanei_genesys_write_0x8c(dev, 0x1e, 0x01));
-        RIE(sanei_genesys_write_0x8c(dev, 0x10, 0xb4));
-        RIE(sanei_genesys_write_0x8c(dev, 0x0f, 0x02));
+        sanei_genesys_write_0x8c(dev, 0x1e, 0x01);
+        sanei_genesys_write_0x8c(dev, 0x10, 0xb4);
+        sanei_genesys_write_0x8c(dev, 0x0f, 0x02);
     }
     else if (dev->model->model_id == MODEL_CANON_CANOSCAN_8600F) {
-        RIE(sanei_genesys_write_0x8c(dev, 0x10, 0xc8));
-    }
-  else
-    {
-      RIE (sanei_genesys_write_0x8c (dev, 0x10, 0xb4));
+        sanei_genesys_write_0x8c(dev, 0x10, 0xc8);
+    } else {
+        sanei_genesys_write_0x8c(dev, 0x10, 0xb4);
     }
 
   /* CLKSET */
diff --git a/backend/genesys_gl846.cc b/backend/genesys_gl846.cc
index afb22f07e..08e2c37ba 100644
--- a/backend/genesys_gl846.cc
+++ b/backend/genesys_gl846.cc
@@ -2609,11 +2609,10 @@ gl846_init_memory_layout (Genesys_Device * dev)
 static SANE_Status
 gl846_boot (Genesys_Device * dev, SANE_Bool cold)
 {
+    DBG_HELPER(dbg);
   SANE_Status status = SANE_STATUS_GOOD;
   uint8_t val;
 
-  DBGSTART;
-
   /* reset ASIC if cold boot */
   if(cold)
     {
@@ -2629,7 +2628,7 @@ gl846_boot (Genesys_Device * dev, SANE_Bool cold)
     {
       val = 0x11;
     }
-  RIE (sanei_genesys_write_0x8c (dev, 0x0f, val));
+    sanei_genesys_write_0x8c(dev, 0x0f, val);
 
   /* test CHKVER */
   RIE (sanei_genesys_read_register (dev, REG40, &val));
@@ -2658,9 +2657,9 @@ gl846_boot (Genesys_Device * dev, SANE_Bool cold)
       RIE (sanei_genesys_write_register (dev, 0x08, dev->reg.find_reg(0x08).value));
     }
 
-  /* set up clocks */
-  RIE (sanei_genesys_write_0x8c (dev, 0x10, 0x0e));
-  RIE (sanei_genesys_write_0x8c (dev, 0x13, 0x0e));
+    // set up clocks
+    sanei_genesys_write_0x8c(dev, 0x10, 0x0e);
+    sanei_genesys_write_0x8c(dev, 0x13, 0x0e);
 
   /* setup gpio */
   RIE (gl846_init_gpio (dev));
@@ -2671,7 +2670,6 @@ gl846_boot (Genesys_Device * dev, SANE_Bool cold)
   SETREG (0xf8, 0x05);
   RIE (sanei_genesys_write_register (dev, 0xf8, dev->reg.find_reg(0xf8).value));
 
-  DBGCOMPLETED;
   return SANE_STATUS_GOOD;
 }
 
diff --git a/backend/genesys_gl847.cc b/backend/genesys_gl847.cc
index fbfcfd98c..2ad9608b2 100644
--- a/backend/genesys_gl847.cc
+++ b/backend/genesys_gl847.cc
@@ -2724,11 +2724,10 @@ gl847_init_memory_layout (Genesys_Device * dev)
 static SANE_Status
 gl847_boot (Genesys_Device * dev, SANE_Bool cold)
 {
+    DBG_HELPER(dgb);
   SANE_Status status = SANE_STATUS_GOOD;
   uint8_t val;
 
-  DBGSTART;
-
   /* reset ASIC if cold boot */
   if(cold)
     {
@@ -2760,9 +2759,9 @@ gl847_boot (Genesys_Device * dev, SANE_Bool cold)
   SETREG (0x08, REG08_CIS_LINE);
   RIE (sanei_genesys_write_register (dev, 0x08, dev->reg.find_reg(0x08).value));
 
-  /* set up end access */
-  RIE (sanei_genesys_write_0x8c (dev, 0x10, 0x0b));
-  RIE (sanei_genesys_write_0x8c (dev, 0x13, 0x0e));
+    // set up end access
+    sanei_genesys_write_0x8c(dev, 0x10, 0x0b);
+    sanei_genesys_write_0x8c(dev, 0x13, 0x0e);
 
   /* setup gpio */
   RIE (gl847_init_gpio (dev));
@@ -2773,7 +2772,6 @@ gl847_boot (Genesys_Device * dev, SANE_Bool cold)
   SETREG (0xf8, 0x01);
   RIE (sanei_genesys_write_register (dev, 0xf8, dev->reg.find_reg(0xf8).value));
 
-  DBGCOMPLETED;
   return SANE_STATUS_GOOD;
 }
 
diff --git a/backend/genesys_low.cc b/backend/genesys_low.cc
index 0a150f6f5..c197955f6 100644
--- a/backend/genesys_low.cc
+++ b/backend/genesys_low.cc
@@ -496,13 +496,11 @@ sanei_genesys_write_register (Genesys_Device * dev, uint16_t reg, uint8_t val)
  * @param index index of the command
  * @param val value to write
  */
-SANE_Status
-sanei_genesys_write_0x8c(Genesys_Device * dev, uint8_t index, uint8_t val)
+void sanei_genesys_write_0x8c(Genesys_Device* dev, uint8_t index, uint8_t val)
 {
     DBG_HELPER_ARGS(dbg, "0x%02x,0x%02x", index, val);
-    dev->usb_dev.control_msg(REQUEST_TYPE_OUT, REQUEST_REGISTER, VALUE_BUF_ENDACCESS, index,
-                             1, &val);
-    return SANE_STATUS_GOOD;
+    dev->usb_dev.control_msg(REQUEST_TYPE_OUT, REQUEST_REGISTER, VALUE_BUF_ENDACCESS, index, 1,
+                             &val);
 }
 
 /* read reg 0x41:
diff --git a/backend/genesys_low.h b/backend/genesys_low.h
index 9353c5f6c..f34948b1d 100644
--- a/backend/genesys_low.h
+++ b/backend/genesys_low.h
@@ -1730,7 +1730,7 @@ extern SANE_Status
 sanei_genesys_bulk_write_register(Genesys_Device * dev,
                                    Genesys_Register_Set& regs);
 
-extern SANE_Status sanei_genesys_write_0x8c (Genesys_Device * dev, uint8_t index, uint8_t val);
+extern void sanei_genesys_write_0x8c(Genesys_Device* dev, uint8_t index, uint8_t val);
 
 extern unsigned sanei_genesys_get_bulk_max_size(Genesys_Device * dev);