kopia lustrzana https://gitlab.com/sane-project/backends
Register related fixes.
rodzic
5d556cd5e6
commit
96b4950499
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@ -457,8 +457,7 @@ SetMotorCurrentAndPhase (ASIC * chip,
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if (MotorCurrentAndPhase->MoveType == _4_TABLE_SPACE_FOR_FULL_STEP)
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if (MotorCurrentAndPhase->MoveType == _4_TABLE_SPACE_FOR_FULL_STEP)
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{
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{
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SendData (chip, ES01_AB_PWM_CURRENT_CONTROL,
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SendData (chip, ES01_AB_PWM_CURRENT_CONTROL, MOTOR_PWM_CURRENT_0);
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MOTOR_PWM_CURRENT_0 | MOTOR1_GPO_VALUE_0);
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for (i = 0; i < 4; i++)
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for (i = 0; i < 4; i++)
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{
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{
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@ -472,8 +471,7 @@ SetMotorCurrentAndPhase (ASIC * chip,
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}
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}
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else if (MotorCurrentAndPhase->MoveType == _8_TABLE_SPACE_FOR_1_DIV_2_STEP)
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else if (MotorCurrentAndPhase->MoveType == _8_TABLE_SPACE_FOR_1_DIV_2_STEP)
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{
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{
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SendData (chip, ES01_AB_PWM_CURRENT_CONTROL,
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SendData (chip, ES01_AB_PWM_CURRENT_CONTROL, MOTOR_PWM_CURRENT_1);
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MOTOR_PWM_CURRENT_1 | MOTOR1_GPO_VALUE_0);
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for (i = 0; i < 8; i++)
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for (i = 0; i < 8; i++)
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{
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{
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@ -487,8 +485,7 @@ SetMotorCurrentAndPhase (ASIC * chip,
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}
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}
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else if (MotorCurrentAndPhase->MoveType == _16_TABLE_SPACE_FOR_1_DIV_4_STEP)
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else if (MotorCurrentAndPhase->MoveType == _16_TABLE_SPACE_FOR_1_DIV_4_STEP)
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{
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{
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SendData (chip, ES01_AB_PWM_CURRENT_CONTROL,
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SendData (chip, ES01_AB_PWM_CURRENT_CONTROL, MOTOR_PWM_CURRENT_2);
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MOTOR_PWM_CURRENT_2 | MOTOR1_GPO_VALUE_0);
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for (i = 0; i < 16; i++)
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for (i = 0; i < 16; i++)
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{
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{
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@ -503,8 +500,7 @@ SetMotorCurrentAndPhase (ASIC * chip,
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}
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}
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else if (MotorCurrentAndPhase->MoveType == _32_TABLE_SPACE_FOR_1_DIV_8_STEP)
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else if (MotorCurrentAndPhase->MoveType == _32_TABLE_SPACE_FOR_1_DIV_8_STEP)
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{
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{
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SendData (chip, ES01_AB_PWM_CURRENT_CONTROL,
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SendData (chip, ES01_AB_PWM_CURRENT_CONTROL, MOTOR_PWM_CURRENT_3);
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MOTOR_PWM_CURRENT_3 | MOTOR1_GPO_VALUE_0);
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for (i = 0; i < 32; i++)
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for (i = 0; i < 32; i++)
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{
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{
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@ -1038,7 +1034,7 @@ InitTiming (ASIC * chip)
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chip->Timing.CCD_DummyCycleTiming = 0;
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chip->Timing.CCD_DummyCycleTiming = 0;
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chip->Timing.PHTG_PulseWidth = 12;
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chip->Timing.PHTG_PulseWidth = 12;
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chip->Timing.PHTG_WaitWidth = 1;
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chip->Timing.PHTG_WaitWidth = 1;
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chip->Timing.PHTG_TimingAdj = 1;
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chip->Timing.PHTG_TimingAdj = PHTG_INVERT_OUTPUT_ENABLE;
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chip->Timing.PHTG_TimingSetup = 0;
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chip->Timing.PHTG_TimingSetup = 0;
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chip->Timing.ChannelR_StartPixel = 100;
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chip->Timing.ChannelR_StartPixel = 100;
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chip->Timing.ChannelR_EndPixel = 200;
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chip->Timing.ChannelR_EndPixel = 200;
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@ -559,7 +559,7 @@ typedef struct
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/* bit[0] */
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/* bit[0] */
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#define PHTG_INVERT_OUTPUT_ENABLE 0x01
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#define PHTG_INVERT_OUTPUT_ENABLE 0x01
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/* bit[1] */
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/* bit[1] */
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#define TWO_TG 0x01
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#define TWO_TG 0x02
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#define MULTI_TG 0x00
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#define MULTI_TG 0x00
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/* bit[3:2] */
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/* bit[3:2] */
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#define CCD_PIXEL_MODE_RED 0x0C
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#define CCD_PIXEL_MODE_RED 0x0C
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@ -974,6 +974,7 @@ typedef struct
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#define ES01_2CE_VALID_PIXEL_PARAMETER_OF_SEGMENT15 0x2CE
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#define ES01_2CE_VALID_PIXEL_PARAMETER_OF_SEGMENT15 0x2CE
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#define ES01_2CF_VALID_PIXEL_PARAMETER_OF_SEGMENT16 0x2CF
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#define ES01_2CF_VALID_PIXEL_PARAMETER_OF_SEGMENT16 0x2CF
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extern const ASIC_ModelParams paramsMustekBP2448TAPro;
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extern const ASIC_ModelParams paramsMustekBP2448TAPro;
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extern const ASIC_ModelParams paramsMicrotek4800H48U;
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extern const ASIC_ModelParams paramsMicrotek4800H48U;
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