genesys: Put chip-specific functionality into namespaces

merge-requests/228/head
Povilas Kanapickas 2019-11-18 22:10:26 +02:00
rodzic f1cf1ff1d9
commit 6d9259bd48
19 zmienionych plików z 70 dodań i 12 usunięć

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@ -51,6 +51,7 @@
#include <vector>
namespace genesys {
namespace gl124 {
bool CommandSetGl124::get_gain4_bit(Genesys_Register_Set* regs) const
{
@ -2612,4 +2613,5 @@ std::unique_ptr<CommandSet> create_gl124_cmd_set()
return std::unique_ptr<CommandSet>(new CommandSetGl124{});
}
} // namespace gl124
} // namespace genesys

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@ -50,6 +50,7 @@
#define SETREG(adr,val) { dev->reg.init_reg(adr, val); }
namespace genesys {
namespace gl124 {
typedef struct
{
@ -197,6 +198,7 @@ public:
void asic_boot(Genesys_Device* dev, bool cold) const override;
};
} // namespace gl124
} // namespace genesys
#endif // BACKEND_GENESYS_GL124_H

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@ -44,6 +44,9 @@
#ifndef BACKEND_GENESYS_GL124_REGISTERS_H
#define BACKEND_GENESYS_GL124_REGISTERS_H
namespace genesys {
namespace gl124 {
#define REG_0x01 0x01
#define REG_0x01_CISSET 0x80
#define REG_0x01_DOGENB 0x40
@ -302,4 +305,7 @@
#define REG_TRUEG 0x111
#define REG_TRUEB 0x112
} // namespace gl124
} // namespace genesys
#endif // BACKEND_GENESYS_GL843_REGISTERS_H

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@ -57,6 +57,7 @@
#include <vector>
namespace genesys {
namespace gl646 {
/**
* reads value from gpio endpoint
@ -3536,4 +3537,5 @@ std::unique_ptr<CommandSet> create_gl646_cmd_set()
return std::unique_ptr<CommandSet>(new CommandSetGl646{});
}
} // namespace gl646
} // namespace genesys

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@ -51,6 +51,7 @@
#include "command_set.h"
namespace genesys {
namespace gl646 {
static void gl646_set_fe(Genesys_Device* dev, const Genesys_Sensor& sensor, uint8_t set, int dpi);
@ -314,6 +315,7 @@ public:
void asic_boot(Genesys_Device* dev, bool cold) const override;
};
} // namespace gl646
} // namespace genesys
#endif // BACKEND_GENESYS_GL646_H

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@ -44,6 +44,9 @@
#ifndef BACKEND_GENESYS_GL646_REGISTERS_H
#define BACKEND_GENESYS_GL646_REGISTERS_H
namespace genesys {
namespace gl646 {
#define REG_0x01_CISSET 0x80
#define REG_0x01_DOGENB 0x40
#define REG_0x01_DVDSET 0x20
@ -159,4 +162,7 @@
#define REG_Z1MOD 0x60
#define REG_Z2MOD 0x62
} // namespace gl646
} // namespace genesys
#endif // BACKEND_GENESYS_GL646_REGISTERS_H

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@ -59,6 +59,7 @@
#include <vector>
namespace genesys {
namespace gl841 {
bool CommandSetGl841::get_gain4_bit(Genesys_Register_Set* regs) const
{
@ -4085,4 +4086,5 @@ std::unique_ptr<CommandSet> create_gl841_cmd_set()
return std::unique_ptr<CommandSet>(new CommandSetGl841{});
}
} // namespace gl841
} // namespace genesys

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@ -50,6 +50,7 @@
#define INITREG(adr,val) {dev->reg.init_reg(adr, val); }
namespace genesys {
namespace gl841 {
/**
* prototypes declaration in case of unit testing
@ -138,6 +139,7 @@ public:
void asic_boot(Genesys_Device* dev, bool cold) const override;
};
} // namespace gl841
} // namespace genesys
#endif // BACKEND_GENESYS_GL841_H

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@ -44,6 +44,8 @@
#ifndef BACKEND_GENESYS_GL841_REGISTERS_H
#define BACKEND_GENESYS_GL841_REGISTERS_H
namespace genesys {
namespace gl841 {
/* Individual bits */
#define REG_0x01 0x01
@ -254,4 +256,7 @@
#define REG_0x87_LEDADD 0x04
} // namespace gl841
} // namespace genesys
#endif // BACKEND_GENESYS_GL841_REGISTERS_H

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@ -52,6 +52,7 @@
#include <vector>
namespace genesys {
namespace gl843 {
// Set address for writing data
static void gl843_set_buffer_address(Genesys_Device* dev, uint32_t addr)
@ -3433,4 +3434,5 @@ std::unique_ptr<CommandSet> create_gl843_cmd_set()
return std::unique_ptr<CommandSet>(new CommandSetGl843{});
}
} // namespace gl843
} // namespace genesys

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@ -56,6 +56,7 @@
#define SETREG(adr,val) { dev->reg.init_reg(adr, val); }
namespace genesys {
namespace gl843 {
class CommandSetGl843 : public CommandSet
{
@ -133,6 +134,7 @@ public:
void asic_boot(Genesys_Device* dev, bool cold) const override;
};
} // namespace gl843
} // namespace genesys
#endif // BACKEND_GENESYS_GL843_H

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@ -44,6 +44,9 @@
#ifndef BACKEND_GENESYS_GL843_REGISTERS_H
#define BACKEND_GENESYS_GL843_REGISTERS_H
namespace genesys {
namespace gl843 {
#define REG_0x01 0x01
#define REG_0x01_CISSET 0x80
#define REG_0x01_DOGENB 0x40
@ -368,4 +371,7 @@
#define REG_0xA9_GPO29 0x02
#define REG_0xA9_GPO28 0x01
} // namespace gl843
} // namespace genesys
#endif // BACKEND_GENESYS_GL843_REGISTERS_H

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@ -56,6 +56,7 @@
#include <vector>
namespace genesys {
namespace gl846 {
bool CommandSetGl846::get_gain4_bit(Genesys_Register_Set* regs) const
{
@ -2417,4 +2418,5 @@ std::unique_ptr<CommandSet> create_gl846_cmd_set()
return std::unique_ptr<CommandSet>(new CommandSetGl846{});
}
} // namespace gl846
} // namespace genesys

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@ -48,6 +48,7 @@
#define BACKEND_GENESYS_GL846_H
namespace genesys {
namespace gl846 {
/** @brief moves the slider to steps at motor base dpi
* @param dev device to work on
@ -210,6 +211,7 @@ public:
void asic_boot(Genesys_Device* dev, bool cold) const override;
};
} // namespace gl846
} // namespace genesys
#endif // BACKEND_GENESYS_GL846_H

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@ -44,6 +44,8 @@
#ifndef BACKEND_GENESYS_GL846_REGISTERS_H
#define BACKEND_GENESYS_GL846_REGISTERS_H
namespace genesys {
namespace gl846 {
#define REG_0x01 0x01
#define REG_0x01_CISSET 0x80
@ -339,4 +341,7 @@
#define SETREG(adr,val) { dev->reg.init_reg(adr, val); }
} // namespace gl846
} // namespace genesys
#endif // BACKEND_GENESYS_GL846_REGISTERS_H

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@ -51,6 +51,7 @@
#include <vector>
namespace genesys {
namespace gl847 {
bool CommandSetGl847::get_gain4_bit(Genesys_Register_Set* regs) const
{
@ -2488,4 +2489,5 @@ std::unique_ptr<CommandSet> create_gl847_cmd_set()
return std::unique_ptr<CommandSet>(new CommandSetGl847{});
}
} // namespace gl847
} // namespace genesys

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@ -48,6 +48,7 @@
#include "command_set.h"
namespace genesys {
namespace gl847 {
/** @brief moves the slider to steps at motor base dpi
* @param dev device to work on
@ -194,6 +195,7 @@ public:
void asic_boot(Genesys_Device* dev, bool cold) const override;
};
} // namespace gl847
} // namespace genesys
#endif // BACKEND_GENESYS_GL847_H

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@ -44,6 +44,9 @@
#ifndef BACKEND_GENESYS_GL847_REGISTERS_H
#define BACKEND_GENESYS_GL847_REGISTERS_H
namespace genesys {
namespace gl847 {
#define REG_0x01 0x01
#define REG_0x01_CISSET 0x80
#define REG_0x01_DOGENB 0x40
@ -323,4 +326,7 @@
#define SETREG(adr,val) { dev->reg.init_reg(adr, val); }
} // namespace gl847
} // namespace genesys
#endif // BACKEND_GENESYS_GL847_REGISTERS_H

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@ -62,25 +62,25 @@ namespace genesys {
* setup the hardware dependent functions
*/
std::unique_ptr<CommandSet> create_gl124_cmd_set();
std::unique_ptr<CommandSet> create_gl646_cmd_set();
std::unique_ptr<CommandSet> create_gl841_cmd_set();
std::unique_ptr<CommandSet> create_gl843_cmd_set();
std::unique_ptr<CommandSet> create_gl846_cmd_set();
std::unique_ptr<CommandSet> create_gl847_cmd_set();
namespace gl124 { std::unique_ptr<CommandSet> create_gl124_cmd_set(); }
namespace gl646 { std::unique_ptr<CommandSet> create_gl646_cmd_set(); }
namespace gl841 { std::unique_ptr<CommandSet> create_gl841_cmd_set(); }
namespace gl843 { std::unique_ptr<CommandSet> create_gl843_cmd_set(); }
namespace gl846 { std::unique_ptr<CommandSet> create_gl846_cmd_set(); }
namespace gl847 { std::unique_ptr<CommandSet> create_gl847_cmd_set(); }
void sanei_genesys_init_cmd_set(Genesys_Device* dev)
{
DBG_INIT ();
DBG_HELPER(dbg);
switch (dev->model->asic_type) {
case AsicType::GL646: dev->cmd_set = create_gl646_cmd_set(); break;
case AsicType::GL841: dev->cmd_set = create_gl841_cmd_set(); break;
case AsicType::GL843: dev->cmd_set = create_gl843_cmd_set(); break;
case AsicType::GL646: dev->cmd_set = gl646::create_gl646_cmd_set(); break;
case AsicType::GL841: dev->cmd_set = gl841::create_gl841_cmd_set(); break;
case AsicType::GL843: dev->cmd_set = gl843::create_gl843_cmd_set(); break;
case AsicType::GL845: // since only a few reg bits differs we handle both together
case AsicType::GL846: dev->cmd_set = create_gl846_cmd_set(); break;
case AsicType::GL847: dev->cmd_set = create_gl847_cmd_set(); break;
case AsicType::GL124: dev->cmd_set = create_gl124_cmd_set(); break;
case AsicType::GL846: dev->cmd_set = gl846::create_gl846_cmd_set(); break;
case AsicType::GL847: dev->cmd_set = gl847::create_gl847_cmd_set(); break;
case AsicType::GL124: dev->cmd_set = gl124::create_gl124_cmd_set(); break;
default: throw SaneException(SANE_STATUS_INVAL, "unknown ASIC type");
}
}