Simplify low-level ASIC functions, add missing error checks.

merge-requests/1/head
Jan Hauffa 2011-03-11 16:08:35 +01:00 zatwierdzone przez m. allan noah
rodzic 1d8a008856
commit 5688a78ace
1 zmienionych plików z 108 dodań i 166 usunięć

Wyświetl plik

@ -52,40 +52,32 @@
/* ---------------------- low level ASIC functions -------------------------- */ /* ---------------------- low level ASIC functions -------------------------- */
static SANE_Byte RegisterBankStatus = -1; static SANE_Byte RegisterBankStatus = ~0;
static STATUS static STATUS
WriteIOControl (PAsic chip, unsigned short wValue, unsigned short wIndex, WriteIOControl (PAsic chip, unsigned short wValue, unsigned short wIndex,
unsigned short wLength, SANE_Byte * lpbuf) unsigned short wLength, SANE_Byte * lpbuf)
{ {
STATUS status = STATUS_GOOD; STATUS status;
status = status = sanei_usb_control_msg (chip->fd, 0x40, 0x01, wValue, wIndex, wLength,
sanei_usb_control_msg (chip->fd, 0x40, 0x01, wValue, wIndex, wLength, lpbuf);
lpbuf);
if (status != STATUS_GOOD) if (status != STATUS_GOOD)
{ DBG (DBG_ERR, "WriteIOControl Error!\n");
DBG (DBG_ERR, "WriteIOControl Error!\n");
return status;
}
return STATUS_GOOD; return status;
} }
static STATUS static STATUS
ReadIOControl (PAsic chip, unsigned short wValue, unsigned short wIndex, ReadIOControl (PAsic chip, unsigned short wValue, unsigned short wIndex,
unsigned short wLength, SANE_Byte * lpbuf) unsigned short wLength, SANE_Byte * lpbuf)
{ {
STATUS status = STATUS_GOOD; STATUS status;
status = status = sanei_usb_control_msg (chip->fd, 0xc0, 0x01, wValue, wIndex, wLength,
sanei_usb_control_msg (chip->fd, 0xc0, 0x01, wValue, wIndex, wLength, lpbuf);
lpbuf);
if (status != STATUS_GOOD) if (status != STATUS_GOOD)
{ DBG (DBG_ERR, "WriteIOControl Error!\n");
DBG (DBG_ERR, "WriteIOControl Error!\n");
return status;
}
return status; return status;
} }
@ -93,7 +85,7 @@ ReadIOControl (PAsic chip, unsigned short wValue, unsigned short wIndex,
static STATUS static STATUS
Mustek_ClearFIFO (PAsic chip) Mustek_ClearFIFO (PAsic chip)
{ {
STATUS status = STATUS_GOOD; STATUS status;
SANE_Byte buf[4]; SANE_Byte buf[4];
DBG (DBG_ASIC, "Mustek_ClearFIFO: Enter\n"); DBG (DBG_ASIC, "Mustek_ClearFIFO: Enter\n");
@ -101,6 +93,7 @@ Mustek_ClearFIFO (PAsic chip)
buf[1] = 0; buf[1] = 0;
buf[2] = 0; buf[2] = 0;
buf[3] = 0; buf[3] = 0;
status = WriteIOControl (chip, 0x05, 0, 4, buf); status = WriteIOControl (chip, 0x05, 0, 4, buf);
if (status != STATUS_GOOD) if (status != STATUS_GOOD)
return status; return status;
@ -114,55 +107,58 @@ Mustek_ClearFIFO (PAsic chip)
} }
static STATUS
SwitchBank (PAsic chip, unsigned short reg)
{
STATUS status;
SANE_Byte buf[4];
SANE_Byte bank;
if (reg < 0x100)
{
bank = SELECT_REGISTER_BANK0;
}
else if (reg < 0x200)
{
bank = SELECT_REGISTER_BANK1;
}
else if (reg < 0x300)
{
bank = SELECT_REGISTER_BANK2;
}
else
{
DBG (DBG_ERR, "SwitchBank: invalid register %d\n", reg);
return STATUS_INVAL;
}
if (RegisterBankStatus != bank)
{
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
buf[0] = ES01_5F_REGISTER_BANK_SELECT;
buf[1] = bank;
buf[2] = ES01_5F_REGISTER_BANK_SELECT;
buf[3] = bank;
status = WriteIOControl (chip, 0xb0, 0, 4, buf);
if (status != STATUS_GOOD)
return status;
RegisterBankStatus = bank;
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
}
return STATUS_GOOD;
}
static STATUS static STATUS
Mustek_SendData (PAsic chip, unsigned short reg, SANE_Byte data) Mustek_SendData (PAsic chip, unsigned short reg, SANE_Byte data)
{ {
STATUS status;
SANE_Byte buf[4]; SANE_Byte buf[4];
STATUS status = STATUS_GOOD;
DBG (DBG_ASIC, "Mustek_SendData: Enter. reg=%x,data=%x\n", reg, data); DBG (DBG_ASIC, "Mustek_SendData: Enter. reg=%x,data=%x\n", reg, data);
if (reg <= 0xFF) status = SwitchBank (chip, reg);
{ if (status != STATUS_GOOD)
if (RegisterBankStatus != 0) return status;
{
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
buf[0] = ES01_5F_REGISTER_BANK_SELECT;
buf[1] = SELECT_REGISTER_BANK0;
buf[2] = ES01_5F_REGISTER_BANK_SELECT;
buf[3] = SELECT_REGISTER_BANK0;
WriteIOControl (chip, 0xb0, 0, 4, buf);
RegisterBankStatus = 0;
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
}
}
else if (reg <= 0x1FF)
{
if (RegisterBankStatus != 1)
{
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
buf[0] = ES01_5F_REGISTER_BANK_SELECT;
buf[1] = SELECT_REGISTER_BANK1;
buf[2] = ES01_5F_REGISTER_BANK_SELECT;
buf[3] = SELECT_REGISTER_BANK1;
WriteIOControl (chip, 0xb0, 0, 4, buf);
RegisterBankStatus = 1;
}
}
else if (reg <= 0x2FF)
{
if (RegisterBankStatus != 2)
{
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
buf[0] = ES01_5F_REGISTER_BANK_SELECT;
buf[1] = SELECT_REGISTER_BANK2;
buf[2] = ES01_5F_REGISTER_BANK_SELECT;
buf[3] = SELECT_REGISTER_BANK2;
WriteIOControl (chip, 0xb0, 0, 4, buf);
RegisterBankStatus = 2;
}
}
buf[0] = LOBYTE (reg); buf[0] = LOBYTE (reg);
buf[1] = data; buf[1] = data;
@ -178,21 +174,21 @@ Mustek_SendData (PAsic chip, unsigned short reg, SANE_Byte data)
static STATUS static STATUS
Mustek_ReceiveData (PAsic chip, SANE_Byte * reg) Mustek_ReceiveData (PAsic chip, SANE_Byte * reg)
{ {
STATUS status = STATUS_GOOD; STATUS status;
SANE_Byte buf[4]; SANE_Byte buf[4];
DBG (DBG_ASIC, "Mustek_ReceiveData\n"); DBG (DBG_ASIC, "Mustek_ReceiveData\n");
status = ReadIOControl (chip, 0x07, 0, 4, buf); status = ReadIOControl (chip, 0x07, 0, 4, buf);
*reg = buf[0]; *reg = buf[0];
return status; return status;
} }
static STATUS static STATUS
Mustek_WriteAddressLineForRegister (PAsic chip, SANE_Byte x) Mustek_WriteAddressLineForRegister (PAsic chip, SANE_Byte x)
{ {
STATUS status = STATUS_GOOD; STATUS status;
SANE_Byte buf[4]; SANE_Byte buf[4];
DBG (DBG_ASIC, "Mustek_WriteAddressLineForRegister: Enter\n"); DBG (DBG_ASIC, "Mustek_WriteAddressLineForRegister: Enter\n");
@ -211,7 +207,7 @@ Mustek_WriteAddressLineForRegister (PAsic chip, SANE_Byte x)
static STATUS static STATUS
SetRWSize (PAsic chip, SANE_Byte ReadWrite, unsigned int size) SetRWSize (PAsic chip, SANE_Byte ReadWrite, unsigned int size)
{ {
STATUS status = STATUS_GOOD; STATUS status;
DBG (DBG_ASIC, "SetRWSize: Enter\n"); DBG (DBG_ASIC, "SetRWSize: Enter\n");
if (ReadWrite == READ_RAM) if (ReadWrite == READ_RAM)
@ -241,50 +237,42 @@ SetRWSize (PAsic chip, SANE_Byte ReadWrite, unsigned int size)
static STATUS static STATUS
Mustek_DMARead (PAsic chip, unsigned int size, SANE_Byte * lpdata) Mustek_DMARead (PAsic chip, unsigned int size, SANE_Byte * lpdata)
{ {
STATUS status = STATUS_GOOD; STATUS status;
unsigned int i, buf[1]; size_t read_size, cur_read_size;
unsigned int read_size;
DBG (DBG_ASIC, "Mustek_DMARead: Enter\n"); DBG (DBG_ASIC, "Mustek_DMARead: Enter. size=%d\n", size);
status = Mustek_ClearFIFO (chip); status = Mustek_ClearFIFO (chip);
if (status != STATUS_GOOD) if (status != STATUS_GOOD)
return status; return status;
buf[0] = read_size = 32 * 1024; read_size = 32 * 1024;
for (i = 0; i < size / (read_size); i++) while (size > 0)
{ {
SetRWSize (chip, READ_RAM, buf[0]); cur_read_size = (read_size <= size) ? read_size : size;
status = WriteIOControl (chip, 0x03, 0, 4, (SANE_Byte *) (buf));
status = status = SetRWSize (chip, READ_RAM, cur_read_size);
sanei_usb_read_bulk (chip->fd, lpdata + i * read_size,
(size_t *) buf);
if (status != STATUS_GOOD) if (status != STATUS_GOOD)
{ return status;
DBG (DBG_ERR, "Mustek_DMARead: read error\n");
return status;
}
}
buf[0] = size - i * read_size; status = WriteIOControl (chip, 0x03, 0, 4, (SANE_Byte *) &cur_read_size);
if (buf[0] > 0) if (status != STATUS_GOOD)
{ return status;
SetRWSize (chip, READ_RAM, buf[0]);
status = WriteIOControl (chip, 0x03, 0, 4, (SANE_Byte *) (buf));
status = status = sanei_usb_read_bulk (chip->fd, lpdata, &cur_read_size);
sanei_usb_read_bulk (chip->fd, lpdata + i * read_size,
(size_t *) buf);
if (status != STATUS_GOOD) if (status != STATUS_GOOD)
{ {
DBG (DBG_ERR, "Mustek_DMARead: read error\n"); DBG (DBG_ERR, "Mustek_DMARead: read error\n");
return status; return status;
} }
usleep (20000); size -= cur_read_size;
lpdata += cur_read_size;
} }
if (cur_read_size < read_size)
usleep (20000);
DBG (DBG_ASIC, "Mustek_DMARead: Exit\n"); DBG (DBG_ASIC, "Mustek_DMARead: Exit\n");
return STATUS_GOOD; return STATUS_GOOD;
} }
@ -292,10 +280,8 @@ Mustek_DMARead (PAsic chip, unsigned int size, SANE_Byte * lpdata)
static STATUS static STATUS
Mustek_DMAWrite (PAsic chip, unsigned int size, SANE_Byte * lpdata) Mustek_DMAWrite (PAsic chip, unsigned int size, SANE_Byte * lpdata)
{ {
STATUS status = STATUS_GOOD; STATUS status;
unsigned int buf[1]; size_t write_size, cur_write_size;
unsigned int i;
unsigned int write_size;
DBG (DBG_ASIC, "Mustek_DMAWrite: Enter. size=%d\n", size); DBG (DBG_ASIC, "Mustek_DMAWrite: Enter. size=%d\n", size);
@ -303,37 +289,28 @@ Mustek_DMAWrite (PAsic chip, unsigned int size, SANE_Byte * lpdata)
if (status != STATUS_GOOD) if (status != STATUS_GOOD)
return status; return status;
buf[0] = write_size = 32 * 1024; write_size = 32 * 1024;
for (i = 0; i < size / (write_size); i++) while (size > 0)
{ {
SetRWSize (chip, WRITE_RAM, buf[0]); cur_write_size = (write_size <= size) ? write_size : size;
WriteIOControl (chip, 0x02, 0, 4, (SANE_Byte *) buf);
status = status = SetRWSize (chip, WRITE_RAM, cur_write_size);
sanei_usb_write_bulk (chip->fd, lpdata + i * write_size, if (status != STATUS_GOOD)
(size_t *) buf); return status;
status = WriteIOControl (chip, 0x02, 0, 4, (SANE_Byte *) &cur_write_size);
if (status != STATUS_GOOD)
return status;
status = sanei_usb_write_bulk (chip->fd, lpdata, &cur_write_size);
if (status != STATUS_GOOD) if (status != STATUS_GOOD)
{ {
DBG (DBG_ERR, "Mustek_DMAWrite: write error\n"); DBG (DBG_ERR, "Mustek_DMAWrite: write error\n");
return status; return status;
} }
}
size -= cur_write_size;
buf[0] = size - i * write_size; lpdata += cur_write_size;
if (buf[0] > 0)
{
SetRWSize (chip, WRITE_RAM, buf[0]);
WriteIOControl (chip, 0x02, 0, 4, (SANE_Byte *) buf);
status =
sanei_usb_write_bulk (chip->fd, lpdata + i * write_size,
(size_t *) buf);
if (status != STATUS_GOOD)
{
DBG (DBG_ERR, "Mustek_DMAWrite: write error\n");
return status;
}
} }
Mustek_ClearFIFO (chip); Mustek_ClearFIFO (chip);
@ -347,50 +324,8 @@ static STATUS
Mustek_SendData2Byte (PAsic chip, unsigned short reg, SANE_Byte data) Mustek_SendData2Byte (PAsic chip, unsigned short reg, SANE_Byte data)
{ {
static SANE_Bool isTransfer = FALSE; static SANE_Bool isTransfer = FALSE;
static SANE_Byte BankBuf[4];
static SANE_Byte DataBuf[4]; static SANE_Byte DataBuf[4];
STATUS status;
if (reg <= 0xFF)
{
if (RegisterBankStatus != 0)
{
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
BankBuf[0] = ES01_5F_REGISTER_BANK_SELECT;
BankBuf[1] = SELECT_REGISTER_BANK0;
BankBuf[2] = ES01_5F_REGISTER_BANK_SELECT;
BankBuf[3] = SELECT_REGISTER_BANK0;
WriteIOControl (chip, 0xb0, 0, 4, BankBuf);
RegisterBankStatus = 0;
}
}
else if (reg <= 0x1FF)
{
if (RegisterBankStatus != 1)
{
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
BankBuf[0] = ES01_5F_REGISTER_BANK_SELECT;
BankBuf[1] = SELECT_REGISTER_BANK1;
BankBuf[2] = ES01_5F_REGISTER_BANK_SELECT;
BankBuf[3] = SELECT_REGISTER_BANK1;
WriteIOControl (chip, 0xb0, 0, 4, BankBuf);
RegisterBankStatus = 1;
}
}
else if (reg <= 0x2FF)
{
if (RegisterBankStatus != 2)
{
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
BankBuf[0] = ES01_5F_REGISTER_BANK_SELECT;
BankBuf[1] = SELECT_REGISTER_BANK2;
BankBuf[2] = ES01_5F_REGISTER_BANK_SELECT;
BankBuf[3] = SELECT_REGISTER_BANK2;
WriteIOControl (chip, 0xb0, 0, 4, BankBuf);
RegisterBankStatus = 2;
}
}
if (isTransfer == FALSE) if (isTransfer == FALSE)
{ {
@ -402,8 +337,15 @@ Mustek_SendData2Byte (PAsic chip, unsigned short reg, SANE_Byte data)
{ {
DataBuf[2] = LOBYTE (reg); DataBuf[2] = LOBYTE (reg);
DataBuf[3] = data; DataBuf[3] = data;
WriteIOControl (chip, 0xb0, 0, 4, DataBuf);
isTransfer = FALSE; isTransfer = FALSE;
status = SwitchBank (chip, reg);
if (status != STATUS_GOOD)
return status;
status = WriteIOControl (chip, 0xb0, 0, 4, DataBuf);
if (status != STATUS_GOOD)
return status;
} }
return STATUS_GOOD; return STATUS_GOOD;
@ -459,7 +401,7 @@ LLFRamAccess (PAsic chip, LLF_RAMACCESS * RamAccess)
Mustek_ClearFIFO (chip); Mustek_ClearFIFO (chip);
if (RamAccess->ReadWrite == WRITE_RAM) if (RamAccess->ReadWrite == WRITE_RAM)
{ /* write RAM */ {
/* size must be even */ /* size must be even */
Mustek_DMAWrite (chip, RamAccess->RwSize, RamAccess->BufferPtr); Mustek_DMAWrite (chip, RamAccess->RwSize, RamAccess->BufferPtr);
@ -471,8 +413,8 @@ LLFRamAccess (PAsic chip, LLF_RAMACCESS * RamAccess)
LLFRamAccess (chip, RamAccess); LLFRamAccess (chip, RamAccess);
DBG (DBG_ASIC, "end steal 2 byte!\n"); DBG (DBG_ASIC, "end steal 2 byte!\n");
} }
else else /* read RAM */
{ /* read RAM */ {
/* size must be even */ /* size must be even */
Mustek_DMARead (chip, RamAccess->RwSize, RamAccess->BufferPtr); Mustek_DMARead (chip, RamAccess->RwSize, RamAccess->BufferPtr);
} }
@ -2981,7 +2923,7 @@ SetExtraSetting (PAsic chip, unsigned short wXResolution,
} }
/* ---------------------- high level asic functions ------------------------ */ /* ---------------------- high level ASIC functions ------------------------ */
/* HOLD: We don't want to have global vid/pids */ /* HOLD: We don't want to have global vid/pids */