kopia lustrzana https://gitlab.com/sane-project/backends
Simplify low-level ASIC functions, add missing error checks.
Jan Hauffa
m. allan noah
rodzic
1d8a008856
commit
5688a78ace
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@ -52,40 +52,32 @@
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/* ---------------------- low level ASIC functions -------------------------- */
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static SANE_Byte RegisterBankStatus = -1;
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static SANE_Byte RegisterBankStatus = ~0;
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static STATUS
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WriteIOControl (PAsic chip, unsigned short wValue, unsigned short wIndex,
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unsigned short wLength, SANE_Byte * lpbuf)
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{
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STATUS status = STATUS_GOOD;
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STATUS status;
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status =
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sanei_usb_control_msg (chip->fd, 0x40, 0x01, wValue, wIndex, wLength,
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lpbuf);
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status = sanei_usb_control_msg (chip->fd, 0x40, 0x01, wValue, wIndex, wLength,
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lpbuf);
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if (status != STATUS_GOOD)
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{
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DBG (DBG_ERR, "WriteIOControl Error!\n");
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return status;
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}
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DBG (DBG_ERR, "WriteIOControl Error!\n");
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return STATUS_GOOD;
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return status;
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}
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static STATUS
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ReadIOControl (PAsic chip, unsigned short wValue, unsigned short wIndex,
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unsigned short wLength, SANE_Byte * lpbuf)
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{
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STATUS status = STATUS_GOOD;
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STATUS status;
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status =
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sanei_usb_control_msg (chip->fd, 0xc0, 0x01, wValue, wIndex, wLength,
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lpbuf);
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status = sanei_usb_control_msg (chip->fd, 0xc0, 0x01, wValue, wIndex, wLength,
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lpbuf);
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if (status != STATUS_GOOD)
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{
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DBG (DBG_ERR, "WriteIOControl Error!\n");
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return status;
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}
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DBG (DBG_ERR, "WriteIOControl Error!\n");
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return status;
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}
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@ -93,7 +85,7 @@ ReadIOControl (PAsic chip, unsigned short wValue, unsigned short wIndex,
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static STATUS
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Mustek_ClearFIFO (PAsic chip)
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{
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STATUS status = STATUS_GOOD;
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STATUS status;
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SANE_Byte buf[4];
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DBG (DBG_ASIC, "Mustek_ClearFIFO: Enter\n");
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@ -101,6 +93,7 @@ Mustek_ClearFIFO (PAsic chip)
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buf[1] = 0;
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buf[2] = 0;
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buf[3] = 0;
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status = WriteIOControl (chip, 0x05, 0, 4, buf);
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if (status != STATUS_GOOD)
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return status;
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@ -114,55 +107,58 @@ Mustek_ClearFIFO (PAsic chip)
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}
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static STATUS
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SwitchBank (PAsic chip, unsigned short reg)
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{
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STATUS status;
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SANE_Byte buf[4];
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SANE_Byte bank;
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if (reg < 0x100)
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{
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bank = SELECT_REGISTER_BANK0;
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}
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else if (reg < 0x200)
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{
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bank = SELECT_REGISTER_BANK1;
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}
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else if (reg < 0x300)
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{
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bank = SELECT_REGISTER_BANK2;
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}
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else
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{
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DBG (DBG_ERR, "SwitchBank: invalid register %d\n", reg);
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return STATUS_INVAL;
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}
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if (RegisterBankStatus != bank)
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{
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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buf[0] = ES01_5F_REGISTER_BANK_SELECT;
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buf[1] = bank;
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buf[2] = ES01_5F_REGISTER_BANK_SELECT;
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buf[3] = bank;
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status = WriteIOControl (chip, 0xb0, 0, 4, buf);
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if (status != STATUS_GOOD)
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return status;
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RegisterBankStatus = bank;
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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}
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return STATUS_GOOD;
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}
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static STATUS
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Mustek_SendData (PAsic chip, unsigned short reg, SANE_Byte data)
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{
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STATUS status;
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SANE_Byte buf[4];
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STATUS status = STATUS_GOOD;
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DBG (DBG_ASIC, "Mustek_SendData: Enter. reg=%x,data=%x\n", reg, data);
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if (reg <= 0xFF)
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{
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if (RegisterBankStatus != 0)
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{
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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buf[0] = ES01_5F_REGISTER_BANK_SELECT;
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buf[1] = SELECT_REGISTER_BANK0;
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buf[2] = ES01_5F_REGISTER_BANK_SELECT;
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buf[3] = SELECT_REGISTER_BANK0;
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WriteIOControl (chip, 0xb0, 0, 4, buf);
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RegisterBankStatus = 0;
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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}
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}
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else if (reg <= 0x1FF)
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{
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if (RegisterBankStatus != 1)
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{
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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buf[0] = ES01_5F_REGISTER_BANK_SELECT;
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buf[1] = SELECT_REGISTER_BANK1;
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buf[2] = ES01_5F_REGISTER_BANK_SELECT;
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buf[3] = SELECT_REGISTER_BANK1;
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WriteIOControl (chip, 0xb0, 0, 4, buf);
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RegisterBankStatus = 1;
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}
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}
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else if (reg <= 0x2FF)
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{
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if (RegisterBankStatus != 2)
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{
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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buf[0] = ES01_5F_REGISTER_BANK_SELECT;
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buf[1] = SELECT_REGISTER_BANK2;
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buf[2] = ES01_5F_REGISTER_BANK_SELECT;
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buf[3] = SELECT_REGISTER_BANK2;
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WriteIOControl (chip, 0xb0, 0, 4, buf);
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RegisterBankStatus = 2;
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}
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}
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status = SwitchBank (chip, reg);
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if (status != STATUS_GOOD)
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return status;
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buf[0] = LOBYTE (reg);
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buf[1] = data;
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@ -178,21 +174,21 @@ Mustek_SendData (PAsic chip, unsigned short reg, SANE_Byte data)
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static STATUS
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Mustek_ReceiveData (PAsic chip, SANE_Byte * reg)
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{
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STATUS status = STATUS_GOOD;
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STATUS status;
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SANE_Byte buf[4];
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DBG (DBG_ASIC, "Mustek_ReceiveData\n");
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status = ReadIOControl (chip, 0x07, 0, 4, buf);
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*reg = buf[0];
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return status;
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}
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static STATUS
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Mustek_WriteAddressLineForRegister (PAsic chip, SANE_Byte x)
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{
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STATUS status = STATUS_GOOD;
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STATUS status;
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SANE_Byte buf[4];
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DBG (DBG_ASIC, "Mustek_WriteAddressLineForRegister: Enter\n");
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@ -211,7 +207,7 @@ Mustek_WriteAddressLineForRegister (PAsic chip, SANE_Byte x)
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static STATUS
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SetRWSize (PAsic chip, SANE_Byte ReadWrite, unsigned int size)
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{
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STATUS status = STATUS_GOOD;
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STATUS status;
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DBG (DBG_ASIC, "SetRWSize: Enter\n");
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if (ReadWrite == READ_RAM)
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@ -241,50 +237,42 @@ SetRWSize (PAsic chip, SANE_Byte ReadWrite, unsigned int size)
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static STATUS
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Mustek_DMARead (PAsic chip, unsigned int size, SANE_Byte * lpdata)
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{
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STATUS status = STATUS_GOOD;
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unsigned int i, buf[1];
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unsigned int read_size;
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STATUS status;
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size_t read_size, cur_read_size;
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DBG (DBG_ASIC, "Mustek_DMARead: Enter\n");
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DBG (DBG_ASIC, "Mustek_DMARead: Enter. size=%d\n", size);
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status = Mustek_ClearFIFO (chip);
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if (status != STATUS_GOOD)
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return status;
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buf[0] = read_size = 32 * 1024;
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for (i = 0; i < size / (read_size); i++)
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read_size = 32 * 1024;
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while (size > 0)
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{
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SetRWSize (chip, READ_RAM, buf[0]);
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status = WriteIOControl (chip, 0x03, 0, 4, (SANE_Byte *) (buf));
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cur_read_size = (read_size <= size) ? read_size : size;
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status =
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sanei_usb_read_bulk (chip->fd, lpdata + i * read_size,
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(size_t *) buf);
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status = SetRWSize (chip, READ_RAM, cur_read_size);
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if (status != STATUS_GOOD)
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{
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DBG (DBG_ERR, "Mustek_DMARead: read error\n");
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return status;
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}
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}
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return status;
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buf[0] = size - i * read_size;
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if (buf[0] > 0)
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{
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SetRWSize (chip, READ_RAM, buf[0]);
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status = WriteIOControl (chip, 0x03, 0, 4, (SANE_Byte *) (buf));
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status = WriteIOControl (chip, 0x03, 0, 4, (SANE_Byte *) &cur_read_size);
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if (status != STATUS_GOOD)
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return status;
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status =
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sanei_usb_read_bulk (chip->fd, lpdata + i * read_size,
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(size_t *) buf);
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status = sanei_usb_read_bulk (chip->fd, lpdata, &cur_read_size);
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if (status != STATUS_GOOD)
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{
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DBG (DBG_ERR, "Mustek_DMARead: read error\n");
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return status;
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}
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usleep (20000);
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size -= cur_read_size;
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lpdata += cur_read_size;
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}
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if (cur_read_size < read_size)
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usleep (20000);
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DBG (DBG_ASIC, "Mustek_DMARead: Exit\n");
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return STATUS_GOOD;
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}
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@ -292,10 +280,8 @@ Mustek_DMARead (PAsic chip, unsigned int size, SANE_Byte * lpdata)
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static STATUS
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Mustek_DMAWrite (PAsic chip, unsigned int size, SANE_Byte * lpdata)
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{
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STATUS status = STATUS_GOOD;
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unsigned int buf[1];
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unsigned int i;
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unsigned int write_size;
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STATUS status;
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size_t write_size, cur_write_size;
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DBG (DBG_ASIC, "Mustek_DMAWrite: Enter. size=%d\n", size);
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@ -303,37 +289,28 @@ Mustek_DMAWrite (PAsic chip, unsigned int size, SANE_Byte * lpdata)
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if (status != STATUS_GOOD)
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return status;
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buf[0] = write_size = 32 * 1024;
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for (i = 0; i < size / (write_size); i++)
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write_size = 32 * 1024;
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while (size > 0)
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{
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SetRWSize (chip, WRITE_RAM, buf[0]);
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WriteIOControl (chip, 0x02, 0, 4, (SANE_Byte *) buf);
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cur_write_size = (write_size <= size) ? write_size : size;
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status =
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sanei_usb_write_bulk (chip->fd, lpdata + i * write_size,
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(size_t *) buf);
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status = SetRWSize (chip, WRITE_RAM, cur_write_size);
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if (status != STATUS_GOOD)
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return status;
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status = WriteIOControl (chip, 0x02, 0, 4, (SANE_Byte *) &cur_write_size);
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if (status != STATUS_GOOD)
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return status;
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status = sanei_usb_write_bulk (chip->fd, lpdata, &cur_write_size);
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if (status != STATUS_GOOD)
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{
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DBG (DBG_ERR, "Mustek_DMAWrite: write error\n");
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return status;
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}
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}
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buf[0] = size - i * write_size;
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if (buf[0] > 0)
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{
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SetRWSize (chip, WRITE_RAM, buf[0]);
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WriteIOControl (chip, 0x02, 0, 4, (SANE_Byte *) buf);
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status =
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sanei_usb_write_bulk (chip->fd, lpdata + i * write_size,
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(size_t *) buf);
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if (status != STATUS_GOOD)
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{
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DBG (DBG_ERR, "Mustek_DMAWrite: write error\n");
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return status;
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}
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size -= cur_write_size;
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lpdata += cur_write_size;
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}
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Mustek_ClearFIFO (chip);
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@ -347,50 +324,8 @@ static STATUS
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Mustek_SendData2Byte (PAsic chip, unsigned short reg, SANE_Byte data)
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{
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static SANE_Bool isTransfer = FALSE;
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static SANE_Byte BankBuf[4];
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static SANE_Byte DataBuf[4];
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if (reg <= 0xFF)
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{
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if (RegisterBankStatus != 0)
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{
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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BankBuf[0] = ES01_5F_REGISTER_BANK_SELECT;
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BankBuf[1] = SELECT_REGISTER_BANK0;
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BankBuf[2] = ES01_5F_REGISTER_BANK_SELECT;
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BankBuf[3] = SELECT_REGISTER_BANK0;
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WriteIOControl (chip, 0xb0, 0, 4, BankBuf);
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RegisterBankStatus = 0;
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}
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}
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else if (reg <= 0x1FF)
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{
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if (RegisterBankStatus != 1)
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{
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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BankBuf[0] = ES01_5F_REGISTER_BANK_SELECT;
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BankBuf[1] = SELECT_REGISTER_BANK1;
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BankBuf[2] = ES01_5F_REGISTER_BANK_SELECT;
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BankBuf[3] = SELECT_REGISTER_BANK1;
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WriteIOControl (chip, 0xb0, 0, 4, BankBuf);
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RegisterBankStatus = 1;
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}
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}
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else if (reg <= 0x2FF)
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{
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if (RegisterBankStatus != 2)
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{
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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BankBuf[0] = ES01_5F_REGISTER_BANK_SELECT;
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BankBuf[1] = SELECT_REGISTER_BANK2;
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BankBuf[2] = ES01_5F_REGISTER_BANK_SELECT;
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BankBuf[3] = SELECT_REGISTER_BANK2;
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WriteIOControl (chip, 0xb0, 0, 4, BankBuf);
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RegisterBankStatus = 2;
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}
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}
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STATUS status;
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if (isTransfer == FALSE)
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{
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@ -402,8 +337,15 @@ Mustek_SendData2Byte (PAsic chip, unsigned short reg, SANE_Byte data)
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{
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DataBuf[2] = LOBYTE (reg);
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DataBuf[3] = data;
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WriteIOControl (chip, 0xb0, 0, 4, DataBuf);
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isTransfer = FALSE;
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status = SwitchBank (chip, reg);
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if (status != STATUS_GOOD)
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return status;
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status = WriteIOControl (chip, 0xb0, 0, 4, DataBuf);
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if (status != STATUS_GOOD)
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return status;
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}
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return STATUS_GOOD;
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@ -459,7 +401,7 @@ LLFRamAccess (PAsic chip, LLF_RAMACCESS * RamAccess)
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Mustek_ClearFIFO (chip);
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if (RamAccess->ReadWrite == WRITE_RAM)
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{ /* write RAM */
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{
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/* size must be even */
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Mustek_DMAWrite (chip, RamAccess->RwSize, RamAccess->BufferPtr);
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@ -471,8 +413,8 @@ LLFRamAccess (PAsic chip, LLF_RAMACCESS * RamAccess)
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LLFRamAccess (chip, RamAccess);
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DBG (DBG_ASIC, "end steal 2 byte!\n");
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}
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else
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{ /* read RAM */
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else /* read RAM */
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{
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/* size must be even */
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Mustek_DMARead (chip, RamAccess->RwSize, RamAccess->BufferPtr);
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}
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@ -2981,7 +2923,7 @@ SetExtraSetting (PAsic chip, unsigned short wXResolution,
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}
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/* ---------------------- high level asic functions ------------------------ */
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/* ---------------------- high level ASIC functions ------------------------ */
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/* HOLD: We don't want to have global vid/pids */
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