Improve debug logging and fix a bug in TestDRAM.

merge-requests/1/head
Jan Hauffa 2011-05-07 12:45:50 +02:00 zatwierdzone przez m. allan noah
rodzic e1c00bd9ab
commit 4ced7a900a
3 zmienionych plików z 27 dodań i 14 usunięć

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@ -119,7 +119,7 @@ ClearFIFO (ASIC * chip)
{ {
SANE_Status status; SANE_Status status;
SANE_Byte buf[4]; SANE_Byte buf[4];
DBG_ASIC_ENTER (); DBG_DBG_ENTER ();
buf[0] = 0; buf[0] = 0;
buf[1] = 0; buf[1] = 0;
@ -132,7 +132,7 @@ ClearFIFO (ASIC * chip)
status = WriteIOControl (chip, 0xc0, 0, 4, buf); status = WriteIOControl (chip, 0xc0, 0, 4, buf);
DBG_ASIC_LEAVE (); DBG_DBG_LEAVE ();
return status; return status;
} }
@ -142,7 +142,7 @@ SwitchBank (ASIC * chip, unsigned short reg)
SANE_Status status; SANE_Status status;
SANE_Byte buf[4]; SANE_Byte buf[4];
SANE_Byte bank; SANE_Byte bank;
DBG_ASIC_ENTER (); DBG_DBG_ENTER ();
bank = HIBYTE(reg); bank = HIBYTE(reg);
if (bank > SELECT_REGISTER_BANK2) if (bank > SELECT_REGISTER_BANK2)
@ -162,10 +162,10 @@ SwitchBank (ASIC * chip, unsigned short reg)
return status; return status;
chip->RegisterBankStatus = bank; chip->RegisterBankStatus = bank;
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", chip->RegisterBankStatus); DBG (DBG_DBG, "RegisterBankStatus=%d\n", chip->RegisterBankStatus);
} }
DBG_ASIC_LEAVE (); DBG_DBG_LEAVE ();
return SANE_STATUS_GOOD; return SANE_STATUS_GOOD;
} }
@ -174,8 +174,8 @@ SendData (ASIC * chip, unsigned short reg, SANE_Byte data)
{ {
SANE_Status status; SANE_Status status;
SANE_Byte buf[4]; SANE_Byte buf[4];
DBG_ASIC_ENTER (); DBG_DBG_ENTER ();
DBG (DBG_ASIC, "reg=%x,data=%x\n", reg, data); DBG (DBG_DBG, "reg=%x,data=%x\n", reg, data);
status = SwitchBank (chip, reg); status = SwitchBank (chip, reg);
if (status != SANE_STATUS_GOOD) if (status != SANE_STATUS_GOOD)
@ -187,7 +187,7 @@ SendData (ASIC * chip, unsigned short reg, SANE_Byte data)
buf[3] = data; buf[3] = data;
status = WriteIOControl (chip, 0xb0, 0, 4, buf); status = WriteIOControl (chip, 0xb0, 0, 4, buf);
DBG_ASIC_LEAVE (); DBG_DBG_LEAVE ();
return status; return status;
} }
@ -196,12 +196,12 @@ ReceiveData (ASIC * chip, SANE_Byte * reg)
{ {
SANE_Status status; SANE_Status status;
SANE_Byte buf[4]; SANE_Byte buf[4];
DBG_ASIC_ENTER (); DBG_DBG_ENTER ();
status = ReadIOControl (chip, 0x07, 0, 4, buf); status = ReadIOControl (chip, 0x07, 0, 4, buf);
*reg = buf[0]; *reg = buf[0];
DBG_ASIC_LEAVE (); DBG_DBG_LEAVE ();
return status; return status;
} }
@ -210,7 +210,7 @@ WriteAddressLineForRegister (ASIC * chip, SANE_Byte x)
{ {
SANE_Status status; SANE_Status status;
SANE_Byte buf[4]; SANE_Byte buf[4];
DBG_ASIC_ENTER (); DBG_DBG_ENTER ();
buf[0] = x; buf[0] = x;
buf[1] = x; buf[1] = x;
@ -218,7 +218,7 @@ WriteAddressLineForRegister (ASIC * chip, SANE_Byte x)
buf[3] = x; buf[3] = x;
status = WriteIOControl (chip, 0x04, x, 4, buf); status = WriteIOControl (chip, 0x04, x, 4, buf);
DBG_ASIC_LEAVE (); DBG_DBG_LEAVE ();
return status; return status;
} }
@ -542,7 +542,7 @@ Mustek_SetMotorCurrentAndPhase (ASIC * chip,
static SANE_Status static SANE_Status
Microtek_SetMotorCurrentAndPhase (ASIC * chip, Microtek_SetMotorCurrentAndPhase (ASIC * chip,
MOTOR_CURRENT_AND_PHASE * MotorCurrentAndPhase) MOTOR_CURRENT_AND_PHASE *MotorCurrentAndPhase)
{ {
int i; int i;
DBG_ASIC_ENTER (); DBG_ASIC_ENTER ();
@ -1235,7 +1235,12 @@ TestDRAM (ASIC * chip)
memset (buf, 0, sizeof (buf)); memset (buf, 0, sizeof (buf));
/* RamAccess may have modified the parameter structure. */
access.IsWriteAccess = SANE_FALSE; access.IsWriteAccess = SANE_FALSE;
access.RamType = EXTERNAL_RAM;
access.StartAddress = 0;
access.RwSize = sizeof (buf);
access.BufferPtr = buf;
status = RamAccess (chip, &access); status = RamAccess (chip, &access);
if (status != SANE_STATUS_GOOD) if (status != SANE_STATUS_GOOD)
@ -1245,7 +1250,7 @@ TestDRAM (ASIC * chip)
{ {
if (buf[i] != i) if (buf[i] != i)
{ {
DBG (DBG_ERR, "DRAM test error at offset %d\n", i); DBG (DBG_ERR, "DRAM test error at offset %d (0x%x)\n", i, buf[i]);
return SANE_STATUS_IO_ERROR; return SANE_STATUS_IO_ERROR;
} }
} }

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@ -238,6 +238,8 @@ typedef struct ASIC
#define DBG_ASIC 6 /* starts and exits of low level functions */ #define DBG_ASIC 6 /* starts and exits of low level functions */
#define DBG_DBG 10 /* useful only for tracing bugs */ #define DBG_DBG 10 /* useful only for tracing bugs */
#define DBG_DBG_ENTER() DBG (DBG_DBG, "%s: enter\n", __FUNCTION__)
#define DBG_DBG_LEAVE() DBG (DBG_DBG, "%s: leave\n", __FUNCTION__)
#define DBG_ASIC_ENTER() DBG (DBG_ASIC, "%s: enter\n", __FUNCTION__) #define DBG_ASIC_ENTER() DBG (DBG_ASIC, "%s: enter\n", __FUNCTION__)
#define DBG_ASIC_LEAVE() DBG (DBG_ASIC, "%s: leave\n", __FUNCTION__) #define DBG_ASIC_LEAVE() DBG (DBG_ASIC, "%s: leave\n", __FUNCTION__)
#define DBG_ENTER() DBG (DBG_FUNC, "%s: enter\n", __FUNCTION__) #define DBG_ENTER() DBG (DBG_FUNC, "%s: enter\n", __FUNCTION__)
@ -434,6 +436,8 @@ typedef struct ASIC
#define CHIP_STRING_4 0x1D /* 0x4E 'N' */ #define CHIP_STRING_4 0x1D /* 0x4E 'N' */
#define CHIP_STRING_5 0x1E /* 0x30 '0' */ #define CHIP_STRING_5 0x1E /* 0x30 '0' */
#define CHIP_STRING_6 0x1F /* 0x31 '1' */ #define CHIP_STRING_6 0x1F /* 0x31 '1' */
/* On the Microtek 4800H48U, the chip string is 'ES03' and starts at offset
0x1C. */
#define ES01_8C_RestartMotorSynPixelNumberM16LSB 0x8C #define ES01_8C_RestartMotorSynPixelNumberM16LSB 0x8C
#define ES01_8D_RestartMotorSynPixelNumberM16MSB 0x8D #define ES01_8D_RestartMotorSynPixelNumberM16MSB 0x8D

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@ -62,6 +62,10 @@
#include "mustek_usb2_high.h" #include "mustek_usb2_high.h"
#ifdef DEBUG_SAVE_IMAGE
#include <stdio.h>
#endif
void void
Scanner_Init (Scanner_State * st) Scanner_Init (Scanner_State * st)