kopia lustrzana https://gitlab.com/sane-project/backends
Improve debug logging and fix a bug in TestDRAM.
rodzic
e1c00bd9ab
commit
4ced7a900a
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@ -119,7 +119,7 @@ ClearFIFO (ASIC * chip)
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{
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SANE_Status status;
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SANE_Byte buf[4];
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DBG_ASIC_ENTER ();
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DBG_DBG_ENTER ();
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buf[0] = 0;
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buf[1] = 0;
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@ -132,7 +132,7 @@ ClearFIFO (ASIC * chip)
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status = WriteIOControl (chip, 0xc0, 0, 4, buf);
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DBG_ASIC_LEAVE ();
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DBG_DBG_LEAVE ();
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return status;
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}
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@ -142,7 +142,7 @@ SwitchBank (ASIC * chip, unsigned short reg)
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SANE_Status status;
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SANE_Byte buf[4];
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SANE_Byte bank;
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DBG_ASIC_ENTER ();
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DBG_DBG_ENTER ();
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bank = HIBYTE(reg);
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if (bank > SELECT_REGISTER_BANK2)
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@ -162,10 +162,10 @@ SwitchBank (ASIC * chip, unsigned short reg)
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return status;
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chip->RegisterBankStatus = bank;
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", chip->RegisterBankStatus);
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DBG (DBG_DBG, "RegisterBankStatus=%d\n", chip->RegisterBankStatus);
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}
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DBG_ASIC_LEAVE ();
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DBG_DBG_LEAVE ();
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return SANE_STATUS_GOOD;
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}
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@ -174,8 +174,8 @@ SendData (ASIC * chip, unsigned short reg, SANE_Byte data)
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{
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SANE_Status status;
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SANE_Byte buf[4];
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DBG_ASIC_ENTER ();
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DBG (DBG_ASIC, "reg=%x,data=%x\n", reg, data);
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DBG_DBG_ENTER ();
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DBG (DBG_DBG, "reg=%x,data=%x\n", reg, data);
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status = SwitchBank (chip, reg);
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if (status != SANE_STATUS_GOOD)
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@ -187,7 +187,7 @@ SendData (ASIC * chip, unsigned short reg, SANE_Byte data)
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buf[3] = data;
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status = WriteIOControl (chip, 0xb0, 0, 4, buf);
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DBG_ASIC_LEAVE ();
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DBG_DBG_LEAVE ();
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return status;
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}
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@ -196,12 +196,12 @@ ReceiveData (ASIC * chip, SANE_Byte * reg)
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{
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SANE_Status status;
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SANE_Byte buf[4];
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DBG_ASIC_ENTER ();
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DBG_DBG_ENTER ();
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status = ReadIOControl (chip, 0x07, 0, 4, buf);
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*reg = buf[0];
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DBG_ASIC_LEAVE ();
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DBG_DBG_LEAVE ();
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return status;
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}
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@ -210,7 +210,7 @@ WriteAddressLineForRegister (ASIC * chip, SANE_Byte x)
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{
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SANE_Status status;
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SANE_Byte buf[4];
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DBG_ASIC_ENTER ();
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DBG_DBG_ENTER ();
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buf[0] = x;
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buf[1] = x;
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@ -218,7 +218,7 @@ WriteAddressLineForRegister (ASIC * chip, SANE_Byte x)
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buf[3] = x;
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status = WriteIOControl (chip, 0x04, x, 4, buf);
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DBG_ASIC_LEAVE ();
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DBG_DBG_LEAVE ();
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return status;
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}
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@ -542,7 +542,7 @@ Mustek_SetMotorCurrentAndPhase (ASIC * chip,
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static SANE_Status
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Microtek_SetMotorCurrentAndPhase (ASIC * chip,
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MOTOR_CURRENT_AND_PHASE * MotorCurrentAndPhase)
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MOTOR_CURRENT_AND_PHASE *MotorCurrentAndPhase)
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{
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int i;
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DBG_ASIC_ENTER ();
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@ -1235,7 +1235,12 @@ TestDRAM (ASIC * chip)
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memset (buf, 0, sizeof (buf));
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/* RamAccess may have modified the parameter structure. */
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access.IsWriteAccess = SANE_FALSE;
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access.RamType = EXTERNAL_RAM;
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access.StartAddress = 0;
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access.RwSize = sizeof (buf);
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access.BufferPtr = buf;
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status = RamAccess (chip, &access);
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if (status != SANE_STATUS_GOOD)
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@ -1245,7 +1250,7 @@ TestDRAM (ASIC * chip)
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{
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if (buf[i] != i)
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{
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DBG (DBG_ERR, "DRAM test error at offset %d\n", i);
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DBG (DBG_ERR, "DRAM test error at offset %d (0x%x)\n", i, buf[i]);
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return SANE_STATUS_IO_ERROR;
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}
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}
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@ -238,6 +238,8 @@ typedef struct ASIC
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#define DBG_ASIC 6 /* starts and exits of low level functions */
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#define DBG_DBG 10 /* useful only for tracing bugs */
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#define DBG_DBG_ENTER() DBG (DBG_DBG, "%s: enter\n", __FUNCTION__)
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#define DBG_DBG_LEAVE() DBG (DBG_DBG, "%s: leave\n", __FUNCTION__)
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#define DBG_ASIC_ENTER() DBG (DBG_ASIC, "%s: enter\n", __FUNCTION__)
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#define DBG_ASIC_LEAVE() DBG (DBG_ASIC, "%s: leave\n", __FUNCTION__)
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#define DBG_ENTER() DBG (DBG_FUNC, "%s: enter\n", __FUNCTION__)
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@ -434,6 +436,8 @@ typedef struct ASIC
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#define CHIP_STRING_4 0x1D /* 0x4E 'N' */
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#define CHIP_STRING_5 0x1E /* 0x30 '0' */
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#define CHIP_STRING_6 0x1F /* 0x31 '1' */
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/* On the Microtek 4800H48U, the chip string is 'ES03' and starts at offset
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0x1C. */
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#define ES01_8C_RestartMotorSynPixelNumberM16LSB 0x8C
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#define ES01_8D_RestartMotorSynPixelNumberM16MSB 0x8D
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@ -62,6 +62,10 @@
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#include "mustek_usb2_high.h"
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#ifdef DEBUG_SAVE_IMAGE
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#include <stdio.h>
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#endif
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void
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Scanner_Init (Scanner_State * st)
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