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genesys: Use common code path for memory layouts

pixma-axis-driver
Povilas Kanapickas 2020-03-14 23:19:38 +02:00
rodzic 718550e2d4
commit 3da269b7de
13 zmienionych plików z 244 dodań i 277 usunięć
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1
backend/Makefile.am
Wyświetl plik

@ -546,6 +546,7 @@ libgenesys_la_SOURCES = genesys/genesys.cpp genesys/genesys.h \
genesys/status.h genesys/status.cpp \
genesys/tables_frontend.cpp \
genesys/tables_gpo.cpp \
genesys/tables_memory_layout.cpp \
genesys/tables_model.cpp \
genesys/tables_motor.cpp \
genesys/tables_sensor.cpp \

8
backend/genesys/device.cpp
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@ -227,8 +227,12 @@ std::ostream& operator<<(std::ostream& out, const Genesys_Device& dev)
<< " initial_regs: " << format_indent_braced_list(4, dev.initial_regs) << '\n'
<< " settings: " << format_indent_braced_list(4, dev.settings) << '\n'
<< " frontend: " << format_indent_braced_list(4, dev.frontend) << '\n'
<< " frontend_initial: " << format_indent_braced_list(4, dev.frontend_initial) << '\n'
<< " gpo.regs: " << format_indent_braced_list(4, dev.gpo.regs) << '\n'
<< " frontend_initial: " << format_indent_braced_list(4, dev.frontend_initial) << '\n';
if (!dev.memory_layout.regs.empty()) {
out << " memory_layout.regs: "
<< format_indent_braced_list(4, dev.memory_layout.regs) << '\n';
}
out << " gpo.regs: " << format_indent_braced_list(4, dev.gpo.regs) << '\n'
<< " motor: " << format_indent_braced_list(4, dev.motor) << '\n'
<< " control[0..6]: " << std::hex
<< static_cast<unsigned>(dev.control[0]) << ' '

12
backend/genesys/device.h
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@ -78,6 +78,17 @@ struct Genesys_Gpo
GenesysRegisterSettingSet regs;
};
struct MemoryLayout
{
// This is used on GL845, GL846, GL847 and GL124 which have special registers to define the
// memory layout
MemoryLayout() = default;
ValueFilter<ModelId> models;
GenesysRegisterSettingSet regs;
};
struct MethodResolutions
{
std::vector<ScanMethod> methods;
@ -272,6 +283,7 @@ struct Genesys_Device
Genesys_Settings settings;
Genesys_Frontend frontend, frontend_initial;
Genesys_Gpo gpo;
MemoryLayout memory_layout;
Genesys_Motor motor;
std::uint8_t control[6] = {};

19
backend/genesys/genesys.cpp
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@ -308,6 +308,24 @@ void sanei_genesys_init_structs (Genesys_Device * dev)
}
}
if (dev->model->asic_type == AsicType::GL845 ||
dev->model->asic_type == AsicType::GL846 ||
dev->model->asic_type == AsicType::GL847 ||
dev->model->asic_type == AsicType::GL124)
{
bool memory_layout_found = false;
for (const auto& memory_layout : *s_memory_layout) {
if (memory_layout.models.matches(dev->model->model_id)) {
dev->memory_layout = memory_layout;
memory_layout_found = true;
break;
}
}
if (!memory_layout_found) {
throw SaneException("Could not find memory layout");
}
}
if (!motor_ok || !gpo_ok || !fe_ok) {
throw SaneException("bad description(s) for fe/gpo/motor=%d/%d/%d\n",
static_cast<unsigned>(dev->model->sensor_id),
@ -5105,6 +5123,7 @@ void sane_init_impl(SANE_Int * version_code, SANE_Auth_Callback authorize)
genesys_init_sensor_tables();
genesys_init_frontend_tables();
genesys_init_gpo_tables();
genesys_init_memory_layout_tables();
genesys_init_motor_tables();
genesys_init_usb_device_tables();

58
backend/genesys/gl124.cpp
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@ -1548,64 +1548,8 @@ static void gl124_init_gpio(Genesys_Device* dev)
static void gl124_init_memory_layout(Genesys_Device* dev)
{
DBG_HELPER(dbg);
int idx = 0;
/* point to per model memory layout */
if (dev->model->model_id == ModelId::CANON_LIDE_110 ||
dev->model->model_id == ModelId::CANON_LIDE_120)
{
idx = 0;
}
else
{ /* canon LiDE 210 and 220 case */
idx = 1;
}
/* setup base address for shading data. */
/* values must be multiplied by 8192=0x4000 to give address on AHB */
/* R-Channel shading bank0 address setting for CIS */
dev->interface->write_register(0xd0, layouts[idx].rd0);
/* G-Channel shading bank0 address setting for CIS */
dev->interface->write_register(0xd1, layouts[idx].rd1);
/* B-Channel shading bank0 address setting for CIS */
dev->interface->write_register(0xd2, layouts[idx].rd2);
/* setup base address for scanned data. */
/* values must be multiplied by 1024*2=0x0800 to give address on AHB */
/* R-Channel ODD image buffer 0x0124->0x92000 */
/* size for each buffer is 0x16d*1k word */
dev->interface->write_register(0xe0, layouts[idx].re0);
dev->interface->write_register(0xe1, layouts[idx].re1);
/* R-Channel ODD image buffer end-address 0x0291->0x148800 => size=0xB6800*/
dev->interface->write_register(0xe2, layouts[idx].re2);
dev->interface->write_register(0xe3, layouts[idx].re3);
/* R-Channel EVEN image buffer 0x0292 */
dev->interface->write_register(0xe4, layouts[idx].re4);
dev->interface->write_register(0xe5, layouts[idx].re5);
/* R-Channel EVEN image buffer end-address 0x03ff*/
dev->interface->write_register(0xe6, layouts[idx].re6);
dev->interface->write_register(0xe7, layouts[idx].re7);
/* same for green, since CIS, same addresses */
dev->interface->write_register(0xe8, layouts[idx].re0);
dev->interface->write_register(0xe9, layouts[idx].re1);
dev->interface->write_register(0xea, layouts[idx].re2);
dev->interface->write_register(0xeb, layouts[idx].re3);
dev->interface->write_register(0xec, layouts[idx].re4);
dev->interface->write_register(0xed, layouts[idx].re5);
dev->interface->write_register(0xee, layouts[idx].re6);
dev->interface->write_register(0xef, layouts[idx].re7);
/* same for blue, since CIS, same addresses */
dev->interface->write_register(0xf0, layouts[idx].re0);
dev->interface->write_register(0xf1, layouts[idx].re1);
dev->interface->write_register(0xf2, layouts[idx].re2);
dev->interface->write_register(0xf3, layouts[idx].re3);
dev->interface->write_register(0xf4, layouts[idx].re4);
dev->interface->write_register(0xf5, layouts[idx].re5);
dev->interface->write_register(0xf6, layouts[idx].re6);
dev->interface->write_register(0xf7, layouts[idx].re7);
apply_reg_settings_to_device_write_only(*dev, dev->memory_layout.regs);
}
/**

29
backend/genesys/gl124.h
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@ -80,35 +80,6 @@ static Gpio_layout gpios[]={
},
};
typedef struct
{
uint8_t rd0;
uint8_t rd1;
uint8_t rd2;
uint8_t re0;
uint8_t re1;
uint8_t re2;
uint8_t re3;
uint8_t re4;
uint8_t re5;
uint8_t re6;
uint8_t re7;
} Memory_layout;
static Memory_layout layouts[]={
/* LIDE 110, 120 */
{ /* 0xd0 0xd1 0xd2 */
0x0a, 0x15, 0x20,
/* 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 */
0x00, 0xac, 0x08, 0x55, 0x08, 0x56, 0x0f, 0xff
},
/* LIDE 210, 220 */
{
0x0a, 0x1f, 0x34,
0x01, 0x24, 0x08, 0x91, 0x08, 0x92, 0x0f, 0xff
}
};
static void gl124_send_slope_table(Genesys_Device* dev, int table_nr,
const std::vector<uint16_t>& slope_table, int steps);

30
backend/genesys/gl846.cpp
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@ -117,6 +117,9 @@ gl846_init_registers (Genesys_Device * dev)
dev->reg.init_reg(0x09, 0x00);
dev->reg.init_reg(0x0a, 0x00);
dev->reg.init_reg(0x0b, 0x8b);
if (dev->model->model_id == ModelId::PLUSTEK_OPTICBOOK_3800) {
dev->reg.init_reg(0x0b, 0x2a);
}
dev->reg.init_reg(0x0c, 0x00);
dev->reg.init_reg(0x0d, 0x00);
dev->reg.init_reg(0x10, 0x00);
@ -1140,32 +1143,11 @@ static void gl846_init_gpio(Genesys_Device* dev)
static void gl846_init_memory_layout(Genesys_Device* dev)
{
DBG_HELPER(dbg);
int idx = 0, i;
uint8_t val;
/* point to per model memory layout */
idx = 0;
while (layouts[idx].model != nullptr && strcmp(dev->model->name,layouts[idx].model)!=0) {
if(strcmp(dev->model->name,layouts[idx].model)!=0)
idx++;
}
if (layouts[idx].model == nullptr) {
throw SaneException("failed to find memory layout for model %s", dev->model->name);
}
// prevent further writings by bulk write register
dev->reg.remove_reg(0x0b);
/* CLKSET and DRAMSEL */
val = layouts[idx].dramsel;
dev->interface->write_register(REG_0x0B, val);
dev->reg.find_reg(0x0b).value = val;
/* prevent further writings by bulk write register */
dev->reg.remove_reg(0x0b);
/* setup base address for shading and scanned data. */
for(i=0;i<10;i++)
{
dev->interface->write_register(0xe0+i, layouts[idx].rx[i]);
}
apply_reg_settings_to_device_write_only(*dev, dev->memory_layout.regs);
}
/* *

55
backend/genesys/gl846.h
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@ -50,61 +50,6 @@
namespace genesys {
namespace gl846 {
typedef struct
{
const char *model;
uint8_t dramsel;
/* shading data address */
uint8_t rd0;
uint8_t rd1;
uint8_t rd2;
/* scanned data address */
uint8_t rx[24];
} Memory_layout;
static Memory_layout layouts[]={
/* Image formula 101 */
{
"canon-image-formula-101",
0x8b,
0x0a, 0x1b, 0x00,
{ /* RED ODD START / RED ODD END */
0x00, 0xb0, 0x05, 0xe7, /* [0x00b0, 0x05e7] 1336*4000w */
/* RED EVEN START / RED EVEN END */
0x05, 0xe8, 0x0b, 0x1f, /* [0x05e8, 0x0b1f] */
/* GREEN ODD START / GREEN ODD END */
0x0b, 0x20, 0x10, 0x57, /* [0x0b20, 0x1057] */
/* GREEN EVEN START / GREEN EVEN END */
0x10, 0x58, 0x15, 0x8f, /* [0x1058, 0x158f] */
/* BLUE ODD START / BLUE ODD END */
0x15, 0x90, 0x1a, 0xc7, /* [0x1590,0x1ac7] */
/* BLUE EVEN START / BLUE EVEN END */
0x1a, 0xc8, 0x1f, 0xff /* [0x1ac8,0x1fff] */
}
},
/* OpticBook 3800 */
{
"plustek-opticbook-3800",
0x2a,
0x0a, 0x0a, 0x0a,
{ /* RED ODD START / RED ODD END */
0x00, 0x68, 0x03, 0x00,
/* RED EVEN START / RED EVEN END */
0x03, 0x01, 0x05, 0x99,
/* GREEN ODD START / GREEN ODD END */
0x05, 0x9a, 0x08, 0x32,
/* GREEN EVEN START / GREEN EVEN END */
0x08, 0x33, 0x0a, 0xcb,
/* BLUE ODD START / BLUE ODD END */
0x0a, 0xcc, 0x0d, 0x64,
/* BLUE EVEN START / BLUE EVEN END */
0x0d, 0x65, 0x0f, 0xfd
}
},
/* list terminating entry */
{ nullptr, 0, 0, 0, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} }
};
class CommandSetGl846 : public CommandSetCommon
{
public:

82
backend/genesys/gl847.cpp
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@ -1159,77 +1159,25 @@ static void gl847_init_gpio(Genesys_Device* dev)
static void gl847_init_memory_layout(Genesys_Device* dev)
{
DBG_HELPER(dbg);
int idx = 0;
uint8_t val;
/* point to per model memory layout */
idx = 0;
if (dev->model->model_id == ModelId::CANON_LIDE_100) {
idx = 0;
}
if (dev->model->model_id == ModelId::CANON_LIDE_200) {
idx = 1;
}
if (dev->model->model_id == ModelId::CANON_5600F) {
idx = 2;
}
if (dev->model->model_id == ModelId::CANON_LIDE_700F) {
idx = 3;
// TODO: move to initial register list
switch (dev->model->model_id) {
case ModelId::CANON_LIDE_100:
case ModelId::CANON_LIDE_200:
case ModelId::CANON_5600F:
dev->interface->write_register(REG_0x0B, 0x29);
break;
case ModelId::CANON_LIDE_700F:
dev->interface->write_register(REG_0x0B, 0x2a);
break;
default:
throw SaneException("Unknown device");
}
/* CLKSET nd DRAMSEL */
val = layouts[idx].dramsel;
dev->interface->write_register(REG_0x0B, val);
dev->reg.find_reg(0x0b).value = val;
// prevent further writings by bulk write register
dev->reg.remove_reg(0x0b);
/* prevent further writings by bulk write register */
dev->reg.remove_reg(0x0b);
/* setup base address for shading data. */
/* values must be multiplied by 8192=0x4000 to give address on AHB */
/* R-Channel shading bank0 address setting for CIS */
dev->interface->write_register(0xd0, layouts[idx].rd0);
/* G-Channel shading bank0 address setting for CIS */
dev->interface->write_register(0xd1, layouts[idx].rd1);
/* B-Channel shading bank0 address setting for CIS */
dev->interface->write_register(0xd2, layouts[idx].rd2);
/* setup base address for scanned data. */
/* values must be multiplied by 1024*2=0x0800 to give address on AHB */
/* R-Channel ODD image buffer 0x0124->0x92000 */
/* size for each buffer is 0x16d*1k word */
dev->interface->write_register(0xe0, layouts[idx].re0);
dev->interface->write_register(0xe1, layouts[idx].re1);
/* R-Channel ODD image buffer end-address 0x0291->0x148800 => size=0xB6800*/
dev->interface->write_register(0xe2, layouts[idx].re2);
dev->interface->write_register(0xe3, layouts[idx].re3);
/* R-Channel EVEN image buffer 0x0292 */
dev->interface->write_register(0xe4, layouts[idx].re4);
dev->interface->write_register(0xe5, layouts[idx].re5);
/* R-Channel EVEN image buffer end-address 0x03ff*/
dev->interface->write_register(0xe6, layouts[idx].re6);
dev->interface->write_register(0xe7, layouts[idx].re7);
/* same for green, since CIS, same addresses */
dev->interface->write_register(0xe8, layouts[idx].re0);
dev->interface->write_register(0xe9, layouts[idx].re1);
dev->interface->write_register(0xea, layouts[idx].re2);
dev->interface->write_register(0xeb, layouts[idx].re3);
dev->interface->write_register(0xec, layouts[idx].re4);
dev->interface->write_register(0xed, layouts[idx].re5);
dev->interface->write_register(0xee, layouts[idx].re6);
dev->interface->write_register(0xef, layouts[idx].re7);
/* same for blue, since CIS, same addresses */
dev->interface->write_register(0xf0, layouts[idx].re0);
dev->interface->write_register(0xf1, layouts[idx].re1);
dev->interface->write_register(0xf2, layouts[idx].re2);
dev->interface->write_register(0xf3, layouts[idx].re3);
dev->interface->write_register(0xf4, layouts[idx].re4);
dev->interface->write_register(0xf5, layouts[idx].re5);
dev->interface->write_register(0xf6, layouts[idx].re6);
dev->interface->write_register(0xf7, layouts[idx].re7);
apply_reg_settings_to_device_write_only(*dev, dev->memory_layout.regs);
}
/* *

43
backend/genesys/gl847.h
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@ -70,49 +70,6 @@ static Gpio_Profile gpios[]={
{ GpioId::UNKNOWN, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
};
typedef struct
{
uint8_t dramsel;
uint8_t rd0;
uint8_t rd1;
uint8_t rd2;
uint8_t re0;
uint8_t re1;
uint8_t re2;
uint8_t re3;
uint8_t re4;
uint8_t re5;
uint8_t re6;
uint8_t re7;
} Memory_layout;
static Memory_layout layouts[]={
/* LIDE 100 */
{
0x29,
0x0a, 0x15, 0x20,
0x00, 0xac, 0x02, 0x55, 0x02, 0x56, 0x03, 0xff
},
/* LIDE 200 */
{
0x29,
0x0a, 0x1f, 0x34,
0x01, 0x24, 0x02, 0x91, 0x02, 0x92, 0x03, 0xff
},
/* 5600F */
{
0x29,
0x0a, 0x1f, 0x34,
0x01, 0x24, 0x02, 0x91, 0x02, 0x92, 0x03, 0xff
},
/* LIDE 700F */
{
0x2a,
0x0a, 0x33, 0x5c,
0x02, 0x14, 0x09, 0x09, 0x09, 0x0a, 0x0f, 0xff
}
};
class CommandSetGl847 : public CommandSetCommon
{
public:

2
backend/genesys/low.h
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@ -466,12 +466,14 @@ inline T clamp(const T& value, const T& lo, const T& hi)
extern StaticInit<std::vector<Genesys_Sensor>> s_sensors;
extern StaticInit<std::vector<Genesys_Frontend>> s_frontends;
extern StaticInit<std::vector<Genesys_Gpo>> s_gpo;
extern StaticInit<std::vector<MemoryLayout>> s_memory_layout;
extern StaticInit<std::vector<Genesys_Motor>> s_motors;
extern StaticInit<std::vector<Genesys_USB_Device_Entry>> s_usb_devices;
void genesys_init_sensor_tables();
void genesys_init_frontend_tables();
void genesys_init_gpo_tables();
void genesys_init_memory_layout_tables();
void genesys_init_motor_tables();
void genesys_init_usb_device_tables();
void verify_usb_device_tables();

135
backend/genesys/tables_memory_layout.cpp 100644
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@ -0,0 +1,135 @@
/* sane - Scanner Access Now Easy.
Copyright (C) 2020 Povilas Kanapickas <povilas@radix.lt>
This file is part of the SANE package.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation; either version 2 of the
License, or (at your option) any later version.
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA.
*/
#define DEBUG_DECLARE_ONLY
#include "low.h"
namespace genesys {
StaticInit<std::vector<MemoryLayout>> s_memory_layout;
void genesys_init_memory_layout_tables()
{
s_memory_layout.init();
MemoryLayout ml;
ml.models = { ModelId::CANON_IMAGE_FORMULA_101 };
// FIXME: this scanner does not set all required registers
ml.regs = {
{ 0xe0, 0x00 }, { 0xe1, 0xb0 }, { 0xe2, 0x05 }, { 0xe3, 0xe7 },
{ 0xe4, 0x05 }, { 0xe5, 0xe8 }, { 0xe6, 0x0b }, { 0xe7, 0x1f },
{ 0xe8, 0x0b }, { 0xe9, 0x20 },
};
s_memory_layout->push_back(ml);
ml = MemoryLayout();
ml.models = { ModelId::PLUSTEK_OPTICBOOK_3800 };
// FIXME: this scanner does not set all required registers
ml.regs = {
{ 0xe0, 0x00 }, { 0xe1, 0x68 }, { 0xe2, 0x03 }, { 0xe3, 0x00 },
{ 0xe4, 0x03 }, { 0xe5, 0x01 }, { 0xe6, 0x05 }, { 0xe7, 0x99 },
{ 0xe8, 0x05 }, { 0xe9, 0x9a },
};
s_memory_layout->push_back(ml);
/* On GL847 and GL124, the values of the base address for shading data must be multiplied by
8192=0x4000 to give address on AHB
On GL847 and GL124, the values of the base address for scanned data must be multiplied by
1024*2=0x0800 to give address on AHB
*/
ml = MemoryLayout();
ml.models = { ModelId::CANON_LIDE_100 };
ml.regs = {
{ 0xd0, 0x0a }, { 0xd1, 0x15 }, { 0xd2, 0x20 },
{ 0xe0, 0x00 }, { 0xe1, 0xac }, { 0xe2, 0x02 }, { 0xe3, 0x55 },
{ 0xe4, 0x02 }, { 0xe5, 0x56 }, { 0xe6, 0x03 }, { 0xe7, 0xff },
{ 0xe8, 0x00 }, { 0xe9, 0xac }, { 0xea, 0x02 }, { 0xeb, 0x55 },
{ 0xec, 0x02 }, { 0xed, 0x56 }, { 0xee, 0x03 }, { 0xef, 0xff },
{ 0xf0, 0x00 }, { 0xf1, 0xac }, { 0xf2, 0x02 }, { 0xf3, 0x55 },
{ 0xf4, 0x02 }, { 0xf5, 0x56 }, { 0xf6, 0x03 }, { 0xf7, 0xff },
};
s_memory_layout->push_back(ml);
ml = MemoryLayout();
// BUG: we shouldn't use LIDE_200 data for 5600F
ml.models = { ModelId::CANON_LIDE_200, ModelId::CANON_5600F };
ml.regs = {
{ 0xd0, 0x0a }, { 0xd1, 0x1f }, { 0xd2, 0x34 },
{ 0xe0, 0x01 }, { 0xe1, 0x24 }, { 0xe2, 0x02 }, { 0xe3, 0x91 },
{ 0xe4, 0x02 }, { 0xe5, 0x92 }, { 0xe6, 0x03 }, { 0xe7, 0xff },
{ 0xe8, 0x01 }, { 0xe9, 0x24 }, { 0xea, 0x02 }, { 0xeb, 0x91 },
{ 0xec, 0x02 }, { 0xed, 0x92 }, { 0xee, 0x03 }, { 0xef, 0xff },
{ 0xf0, 0x01 }, { 0xf1, 0x24 }, { 0xf2, 0x02 }, { 0xf3, 0x91 },
{ 0xf4, 0x02 }, { 0xf5, 0x92 }, { 0xf6, 0x03 }, { 0xf7, 0xff },
};
s_memory_layout->push_back(ml);
ml = MemoryLayout();
ml.models = { ModelId::CANON_LIDE_700F };
ml.regs = {
{ 0xd0, 0x0a }, { 0xd1, 0x33 }, { 0xd2, 0x5c },
{ 0xe0, 0x02 }, { 0xe1, 0x14 }, { 0xe2, 0x09 }, { 0xe3, 0x09 },
{ 0xe4, 0x09 }, { 0xe5, 0x0a }, { 0xe6, 0x0f }, { 0xe7, 0xff },
{ 0xe8, 0x02 }, { 0xe9, 0x14 }, { 0xea, 0x09 }, { 0xeb, 0x09 },
{ 0xec, 0x09 }, { 0xed, 0x0a }, { 0xee, 0x0f }, { 0xef, 0xff },
{ 0xf0, 0x02 }, { 0xf1, 0x14 }, { 0xf2, 0x09 }, { 0xf3, 0x09 },
{ 0xf4, 0x09 }, { 0xf5, 0x0a }, { 0xf6, 0x0f }, { 0xf7, 0xff },
};
s_memory_layout->push_back(ml);
ml = MemoryLayout();
ml.models = { ModelId::CANON_LIDE_110, ModelId::CANON_LIDE_120 };
ml.regs = {
{ 0xd0, 0x0a }, { 0xd1, 0x15 }, { 0xd2, 0x20 },
{ 0xe0, 0x00 }, { 0xe1, 0xac }, { 0xe2, 0x08 }, { 0xe3, 0x55 },
{ 0xe4, 0x08 }, { 0xe5, 0x56 }, { 0xe6, 0x0f }, { 0xe7, 0xff },
{ 0xe8, 0x00 }, { 0xe9, 0xac }, { 0xea, 0x08 }, { 0xeb, 0x55 },
{ 0xec, 0x08 }, { 0xed, 0x56 }, { 0xee, 0x0f }, { 0xef, 0xff },
{ 0xf0, 0x00 }, { 0xf1, 0xac }, { 0xf2, 0x08 }, { 0xf3, 0x55 },
{ 0xf4, 0x08 }, { 0xf5, 0x56 }, { 0xf6, 0x0f }, { 0xf7, 0xff },
};
s_memory_layout->push_back(ml);
ml = MemoryLayout();
ml.models = { ModelId::CANON_LIDE_210, ModelId::CANON_LIDE_220 };
ml.regs = {
{ 0xd0, 0x0a }, { 0xd1, 0x1f }, { 0xd2, 0x34 },
{ 0xe0, 0x01 }, { 0xe1, 0x24 }, { 0xe2, 0x08 }, { 0xe3, 0x91 },
{ 0xe4, 0x08 }, { 0xe5, 0x92 }, { 0xe6, 0x0f }, { 0xe7, 0xff },
{ 0xe8, 0x01 }, { 0xe9, 0x24 }, { 0xea, 0x08 }, { 0xeb, 0x91 },
{ 0xec, 0x08 }, { 0xed, 0x92 }, { 0xee, 0x0f }, { 0xef, 0xff },
{ 0xf0, 0x01 }, { 0xf1, 0x24 }, { 0xf2, 0x08 }, { 0xf3, 0x91 },
{ 0xf4, 0x08 }, { 0xf5, 0x92 }, { 0xf6, 0x0f }, { 0xf7, 0xff },
};
s_memory_layout->push_back(ml);
}
} // namespace genesys

47
backend/genesys/value_filter.h
Wyświetl plik

@ -88,6 +88,53 @@ void serialize(Stream& str, ValueFilterAny<T>& x)
}
template<class T>
class ValueFilter
{
public:
ValueFilter() = default;
ValueFilter(std::initializer_list<T> values) :
values_{values}
{}
bool matches(T value) const
{
auto it = std::find(values_.begin(), values_.end(), value);
return it != values_.end();
}
bool operator==(const ValueFilter& other) const
{
return values_ == other.values_;
}
const std::vector<T>& values() const { return values_; }
private:
std::vector<T> values_;
template<class Stream, class U>
friend void serialize(Stream& str, ValueFilter<U>& x);
};
template<class T>
std::ostream& operator<<(std::ostream& out, const ValueFilter<T>& values)
{
if (values.values().empty()) {
out << "(none)";
return out;
}
out << format_vector_indent_braced(4, "", values.values());
return out;
}
template<class Stream, class T>
void serialize(Stream& str, ValueFilter<T>& x)
{
serialize_newline(str);
serialize(str, x.values_);
}
} // namespace genesys
#endif // BACKEND_GENESYS_VALUE_FILTER_H