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working version of AFE setting for HP3670 like scanners

merge-requests/1/head
Stphane Voltz 2010-01-25 06:39:23 +01:00
rodzic cef64f7546
commit 2316b35a60
2 zmienionych plików z 12 dodań i 11 usunięć
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7
backend/genesys_devices.c
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@ -120,10 +120,11 @@ static Genesys_Frontend Wolfson[] = {
}
, /* 8: HP3670 */
{DAC_WOLFSON_HP3670, /* uses one write for offset or gain like hp2300/2400 */
/* reg0 reg1 reg2 reg3 */
{0x00, 0x03, 0x04, 0x02}
, {0x00, 0x00, 0x00}
, {0xb4, 0xb4, 0xb4}
, {0x08, 0x08, 0x08}
, {0x00, 0x00, 0x00} /* sign */
, {0x20, 0x20, 0x20} /* offset */
, {0x20, 0x20, 0x20} /* gain */
, {0x00, 0x00, 0x00}
}
,

16
backend/genesys_gl646.c
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@ -1002,7 +1002,7 @@ gl646_setup_registers (Genesys_Device * dev,
/* in fact, wpl _gives_ the actual scan resolution */
wpl =
(((endx -
startx) * sensor->xdpi) / dev->sensor.optical_res) * sensor->cksel;
startx) * sensor->xdpi * sensor->cksel) / dev->sensor.optical_res);
if (depth == 16)
wpl *= 2;
if (dev->model->is_cis == SANE_FALSE)
@ -1726,7 +1726,7 @@ gl646_wm_hp3670 (Genesys_Device * dev, uint8_t set)
sane_strstatus (status));
return status;
}
status = sanei_genesys_fe_write_data (dev, 0x01, 0x03);
status = sanei_genesys_fe_write_data (dev, 0x01, dev->frontend.reg[1]);
if (status != SANE_STATUS_GOOD)
{
DBG (DBG_error, "gl646_wm_hp3670: writing reg1 failed: %s\n",
@ -1734,7 +1734,7 @@ gl646_wm_hp3670 (Genesys_Device * dev, uint8_t set)
return status;
}
/* b2 INVOP : set positive polarity output */
status = sanei_genesys_fe_write_data (dev, 0x02, 0x04);
status = sanei_genesys_fe_write_data (dev, 0x02, dev->frontend.reg[2]);
if (status != SANE_STATUS_GOOD)
{
DBG (DBG_error, "gl646_wm_hp3670: writing reg2 failed: %s\n",
@ -1755,8 +1755,8 @@ gl646_wm_hp3670 (Genesys_Device * dev, uint8_t set)
break;
default: /* AFE_SET */
/* mode setup */
/* bit 3:0 RLCV ? */
status = sanei_genesys_fe_write_data (dev, 0x03, 0x02);
/* bit 3:0 RLCV */
status = sanei_genesys_fe_write_data (dev, 0x03, dev->frontend.reg[3]);
if (status != SANE_STATUS_GOOD)
{
DBG (DBG_error, "gl646_wm_hp3670: writing reg3 failed: %s\n",
@ -1764,7 +1764,7 @@ gl646_wm_hp3670 (Genesys_Device * dev, uint8_t set)
return status;
}
/* offset 30 ~ */
status = sanei_genesys_fe_write_data (dev, 0x23, 0x28);
status = sanei_genesys_fe_write_data (dev, 0x23, dev->frontend.offset[0]);
if (status != SANE_STATUS_GOOD)
{
DBG (DBG_error, "gl646_wm_hp3670: writing offset failed: %s\n",
@ -1772,7 +1772,7 @@ gl646_wm_hp3670 (Genesys_Device * dev, uint8_t set)
return status;
}
/* gain */
status = sanei_genesys_fe_write_data (dev, 0x28, 0x08);
status = sanei_genesys_fe_write_data (dev, 0x28, dev->frontend.gain[0]);
if (status != SANE_STATUS_GOOD)
{
DBG (DBG_error, "gl646_wm_hp3670: writing gain failed: %s\n",
@ -1780,7 +1780,7 @@ gl646_wm_hp3670 (Genesys_Device * dev, uint8_t set)
return status;
}
/* mode setup */
status = sanei_genesys_fe_write_data (dev, 0x01, 0x03);
status = sanei_genesys_fe_write_data (dev, 0x01, dev->frontend.reg[1]);
if (status != SANE_STATUS_GOOD)
{
DBG (DBG_error, "gl646_wm_hp3670: writing reg1 failed: %s\n",