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use dedicated LiDE120 GPIO

merge-requests/1/head
Stéphane Voltz 2016-02-17 21:43:05 +01:00
rodzic 387cea7d6c
commit 214dfad1d5
2 zmienionych plików z 108 dodań i 94 usunięć
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25
backend/genesys_gl124.c
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@ -1947,6 +1947,13 @@ gl124_stop_action (Genesys_Device * dev)
} }
/** @brief setup GPIOs for scan
* Setup GPIO values to drive motor (or light) needed for the
* target resolution
* @param *dev device to set up
* @param resolution dpi of the target scan
* @return SANE_STATUS_GOOD unless REG32 cannot be read
*/
static SANE_Status static SANE_Status
gl124_setup_scan_gpio(Genesys_Device *dev, int resolution) gl124_setup_scan_gpio(Genesys_Device *dev, int resolution)
{ {
@ -3518,12 +3525,10 @@ gl124_init_regs_for_warmup (Genesys_Device * dev,
return SANE_STATUS_GOOD; return SANE_STATUS_GOOD;
} }
/** /** @brief default GPIO values
* set up GPIO/GPOE for idle state * set up GPIO/GPOE for idle state
WRITE GPIO[17-21]= GPIO19 * @param dev device to set up
WRITE GPOE[17-21]= GPOE21 GPOE20 GPOE19 GPOE18 * @return SANE_STATUS_GOOD unless a GPIO register cannot be written
genesys_write_register(0xa8,0x3e)
GPIO(0xa8)=0x3e
*/ */
static SANE_Status static SANE_Status
gl124_init_gpio (Genesys_Device * dev) gl124_init_gpio (Genesys_Device * dev)
@ -3534,11 +3539,14 @@ gl124_init_gpio (Genesys_Device * dev)
DBGSTART; DBGSTART;
/* per model GPIO layout */ /* per model GPIO layout */
if ((strcmp (dev->model->name, "canon-lide-110") == 0) if (strcmp (dev->model->name, "canon-lide-110") == 0)
||(strcmp (dev->model->name, "canon-lide-120") == 0))
{ {
idx = 0; idx = 0;
} }
else if (strcmp (dev->model->name, "canon-lide-110") == 0)
{
idx = 2;
}
else else
{ /* canon LiDE 210 and 220 case */ { /* canon LiDE 210 and 220 case */
idx = 1; idx = 1;
@ -3731,7 +3739,8 @@ gl124_update_hardware_sensors (Genesys_Scanner * s)
* add another per scanner button profile struct to avoid growing * add another per scanner button profile struct to avoid growing
* hard-coded button mapping here. * hard-coded button mapping here.
*/ */
if(s->dev->model->gpo_type == GPO_CANONLIDE110) if((s->dev->model->gpo_type == GPO_CANONLIDE110)
||(s->dev->model->gpo_type == GPO_CANONLIDE120))
{ {
if (s->val[OPT_SCAN_SW].b == s->last_val[OPT_SCAN_SW].b) if (s->val[OPT_SCAN_SW].b == s->last_val[OPT_SCAN_SW].b)
s->val[OPT_SCAN_SW].b = (val & 0x01) == 0; s->val[OPT_SCAN_SW].b = (val & 0x01) == 0;

177
backend/genesys_gl124.h
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@ -44,71 +44,71 @@
#include "genesys.h" #include "genesys.h"
#define REG01 0x01 #define REG01 0x01
#define REG01_CISSET 0x80 #define REG01_CISSET 0x80
#define REG01_DOGENB 0x40 #define REG01_DOGENB 0x40
#define REG01_DVDSET 0x20 #define REG01_DVDSET 0x20
#define REG01_STAGGER 0x10 #define REG01_STAGGER 0x10
#define REG01_COMPENB 0x08 #define REG01_COMPENB 0x08
#define REG01_TRUEGRAY 0x04 #define REG01_TRUEGRAY 0x04
#define REG01_SHDAREA 0x02 #define REG01_SHDAREA 0x02
#define REG01_SCAN 0x01 #define REG01_SCAN 0x01
#define REG02 0x02 #define REG02 0x02
#define REG02_NOTHOME 0x80 #define REG02_NOTHOME 0x80
#define REG02_ACDCDIS 0x40 #define REG02_ACDCDIS 0x40
#define REG02_AGOHOME 0x20 #define REG02_AGOHOME 0x20
#define REG02_MTRPWR 0x10 #define REG02_MTRPWR 0x10
#define REG02_FASTFED 0x08 #define REG02_FASTFED 0x08
#define REG02_MTRREV 0x04 #define REG02_MTRREV 0x04
#define REG02_HOMENEG 0x02 #define REG02_HOMENEG 0x02
#define REG02_LONGCURV 0x01 #define REG02_LONGCURV 0x01
#define REG03 0x03 #define REG03 0x03
#define REG03_LAMPDOG 0x80 #define REG03_LAMPDOG 0x80
#define REG03_AVEENB 0x40 #define REG03_AVEENB 0x40
#define REG03_XPASEL 0x20 #define REG03_XPASEL 0x20
#define REG03_LAMPPWR 0x10 #define REG03_LAMPPWR 0x10
#define REG03_LAMPTIM 0x0f #define REG03_LAMPTIM 0x0f
#define REG04 0x04 #define REG04 0x04
#define REG04_LINEART 0x80 #define REG04_LINEART 0x80
#define REG04_BITSET 0x40 #define REG04_BITSET 0x40
#define REG04_FILTER 0x30 #define REG04_FILTER 0x30
#define REG04_AFEMOD 0x07 #define REG04_AFEMOD 0x07
#define REG05 0x05 #define REG05 0x05
#define REG05_DPIHW 0xc0 #define REG05_DPIHW 0xc0
#define REG05_DPIHW_600 0x00 #define REG05_DPIHW_600 0x00
#define REG05_DPIHW_1200 0x40 #define REG05_DPIHW_1200 0x40
#define REG05_DPIHW_2400 0x80 #define REG05_DPIHW_2400 0x80
#define REG05_DPIHW_4800 0xc0 #define REG05_DPIHW_4800 0xc0
#define REG05_MTLLAMP 0x30 #define REG05_MTLLAMP 0x30
#define REG05_GMMENB 0x08 #define REG05_GMMENB 0x08
#define REG05_ENB20M 0x04 #define REG05_ENB20M 0x04
#define REG05_MTLBASE 0x03 #define REG05_MTLBASE 0x03
#define REG06 0x06 #define REG06 0x06
#define REG06_SCANMOD 0xe0 #define REG06_SCANMOD 0xe0
#define REG06S_SCANMOD 5 #define REG06S_SCANMOD 5
#define REG06_PWRBIT 0x10 #define REG06_PWRBIT 0x10
#define REG06_GAIN4 0x08 #define REG06_GAIN4 0x08
#define REG06_OPTEST 0x07 #define REG06_OPTEST 0x07
#define REG07_LAMPSIM 0x80 #define REG07_LAMPSIM 0x80
#define REG08_DRAM2X 0x80 #define REG08_DRAM2X 0x80
#define REG08_MPENB 0x20 #define REG08_MPENB 0x20
#define REG08_CIS_LINE 0x10 #define REG08_CIS_LINE 0x10
#define REG08_IR2_ENB 0x08 #define REG08_IR2_ENB 0x08
#define REG08_IR1_ENB 0x04 #define REG08_IR1_ENB 0x04
#define REG08_ENB24M 0x01 #define REG08_ENB24M 0x01
#define REG09_MCNTSET 0xc0 #define REG09_MCNTSET 0xc0
#define REG09_EVEN1ST 0x20 #define REG09_EVEN1ST 0x20
#define REG09_BLINE1ST 0x10 #define REG09_BLINE1ST 0x10
#define REG09_BACKSCAN 0x08 #define REG09_BACKSCAN 0x08
#define REG09_OUTINV 0x04 #define REG09_OUTINV 0x04
#define REG09_SHORTTG 0x02 #define REG09_SHORTTG 0x02
#define REG09S_MCNTSET 6 #define REG09S_MCNTSET 6
#define REG09S_CLKSET 4 #define REG09S_CLKSET 4
@ -136,55 +136,55 @@
#define REG0B_48MHZ 0x60 #define REG0B_48MHZ 0x60
#define REG0B_60MHZ 0x80 #define REG0B_60MHZ 0x80
#define REG0D 0x0d #define REG0D 0x0d
#define REG0D_MTRP_RDY 0x80 #define REG0D_MTRP_RDY 0x80
#define REG0D_FULLSTP 0x10 #define REG0D_FULLSTP 0x10
#define REG0D_CLRMCNT 0x04 #define REG0D_CLRMCNT 0x04
#define REG0D_CLRDOCJM 0x02 #define REG0D_CLRDOCJM 0x02
#define REG0D_CLRLNCNT 0x01 #define REG0D_CLRLNCNT 0x01
#define REG0F 0x0f #define REG0F 0x0f
#define REG16_CTRLHI 0x80 #define REG16_CTRLHI 0x80
#define REG16_TOSHIBA 0x40 #define REG16_TOSHIBA 0x40
#define REG16_TGINV 0x20 #define REG16_TGINV 0x20
#define REG16_CK1INV 0x10 #define REG16_CK1INV 0x10
#define REG16_CK2INV 0x08 #define REG16_CK2INV 0x08
#define REG16_CTRLINV 0x04 #define REG16_CTRLINV 0x04
#define REG16_CKDIS 0x02 #define REG16_CKDIS 0x02
#define REG16_CTRLDIS 0x01 #define REG16_CTRLDIS 0x01
#define REG17_TGMODE 0xc0 #define REG17_TGMODE 0xc0
#define REG17_SNRSYN 0x0f #define REG17_SNRSYN 0x0f
#define REG18 0x18 #define REG18 0x18
#define REG18_CNSET 0x80 #define REG18_CNSET 0x80
#define REG18_DCKSEL 0x60 #define REG18_DCKSEL 0x60
#define REG18_CKTOGGLE 0x10 #define REG18_CKTOGGLE 0x10
#define REG18_CKDELAY 0x0c #define REG18_CKDELAY 0x0c
#define REG18_CKSEL 0x03 #define REG18_CKSEL 0x03
#define REG1A_SW2SET 0x80 #define REG1A_SW2SET 0x80
#define REG1A_SW1SET 0x40 #define REG1A_SW1SET 0x40
#define REG1A_MANUAL3 0x02 #define REG1A_MANUAL3 0x02
#define REG1A_MANUAL1 0x01 #define REG1A_MANUAL1 0x01
#define REG1A_CK4INV 0x08 #define REG1A_CK4INV 0x08
#define REG1A_CK3INV 0x04 #define REG1A_CK3INV 0x04
#define REG1A_LINECLP 0x02 #define REG1A_LINECLP 0x02
#define REG1C_TBTIME 0x07 #define REG1C_TBTIME 0x07
#define REG1D 0x1d #define REG1D 0x1d
#define REG1D_CK4LOW 0x80 #define REG1D_CK4LOW 0x80
#define REG1D_CK3LOW 0x40 #define REG1D_CK3LOW 0x40
#define REG1D_CK1LOW 0x20 #define REG1D_CK1LOW 0x20
#define REG1D_LINESEL 0x1f #define REG1D_LINESEL 0x1f
#define REG1DS_LINESEL 0 #define REG1DS_LINESEL 0
#define REG1E 0x1e #define REG1E 0x1e
#define REG1E_WDTIME 0xf0 #define REG1E_WDTIME 0xf0
#define REG1ES_WDTIME 4 #define REG1ES_WDTIME 4
#define REG1E_WDTIME 0xf0 #define REG1E_WDTIME 0xf0
#define REG30 0x30 #define REG30 0x30
#define REG31 0x31 #define REG31 0x31
@ -243,18 +243,18 @@
#define REGB1 0xb1 #define REGB1 0xb1
#define REGB2 0xb2 #define REGB2 0xb2
#define REGB2_Z1MOD 0x1f #define REGB2_Z1MOD 0x1f
#define REGB3 0xb3 #define REGB3 0xb3
#define REGB3_Z1MOD 0xff #define REGB3_Z1MOD 0xff
#define REGB4 0xb4 #define REGB4 0xb4
#define REGB4_Z1MOD 0xff #define REGB4_Z1MOD 0xff
#define REGB5 0xb5 #define REGB5 0xb5
#define REGB5_Z2MOD 0x1f #define REGB5_Z2MOD 0x1f
#define REGB6 0xb6 #define REGB6 0xb6
#define REGB6_Z2MOD 0xff #define REGB6_Z2MOD 0xff
#define REGB7 0xb7 #define REGB7 0xb7
#define REGB7_Z2MOD 0xff #define REGB7_Z2MOD 0xff
#define REG100 0x100 #define REG100 0x100
#define REG100_DOCSNR 0x80 #define REG100_DOCSNR 0x80
@ -547,6 +547,10 @@ static Gpio_layout gpios[]={
{ {
0x9f, 0x59, 0x01, 0x80, 0x5f, 0x01, 0x00 0x9f, 0x59, 0x01, 0x80, 0x5f, 0x01, 0x00
}, },
/* LiDE 120 */
{
0x9f, 0x53, 0x01, 0x80, 0x5f, 0x01, 0x00
},
}; };
typedef struct typedef struct
@ -566,8 +570,9 @@ typedef struct
static Memory_layout layouts[]={ static Memory_layout layouts[]={
/* LIDE 110, 120 */ /* LIDE 110, 120 */
{ { /* 0xd0 0xd1 0xd2 */
0x0a, 0x15, 0x20, 0x0a, 0x15, 0x20,
/* 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 */
0x00, 0xac, 0x08, 0x55, 0x08, 0x56, 0x0f, 0xff 0x00, 0xac, 0x08, 0x55, 0x08, 0x56, 0x0f, 0xff
}, },
/* LIDE 210, 220 */ /* LIDE 210, 220 */