2005-10-03 13:27:03 +00:00
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/* sane - Scanner Access Now Easy.
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Copyright (C) 2005 Mustek.
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Originally maintained by Mustek
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Author:Roy 2005.5.24
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This file is part of the SANE package.
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston,
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MA 02111-1307, USA.
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As a special exception, the authors of SANE give permission for
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additional uses of the libraries contained in this release of SANE.
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The exception is that, if you link a SANE library with other files
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to produce an executable, this does not by itself cause the
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resulting executable to be covered by the GNU General Public
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License. Your use of that executable is in no way restricted on
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account of linking the SANE library code into it.
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This exception does not, however, invalidate any other reasons why
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the executable file might be covered by the GNU General Public
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License.
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If you submit changes to SANE to the maintainers to be included in
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a subsequent release, you agree by submitting the changes that
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those changes may be distributed with this exception intact.
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If you write modifications of your own for SANE, it is your choice
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whether to permit this exception to apply to your modifications.
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If you do not wish that, delete this exception notice.
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This file implements a SANE backend for the Mustek BearPaw 2448 TA Pro
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and similar USB2 scanners. */
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2011-03-06 14:39:23 +00:00
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#include <string.h>
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2011-03-06 18:37:25 +00:00
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#include <math.h>
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2011-03-06 14:39:23 +00:00
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2005-10-03 13:27:03 +00:00
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#include "mustek_usb2_asic.h"
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2011-03-08 22:10:57 +00:00
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/* ---------------------- low level ASIC functions -------------------------- */
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2005-10-03 13:27:03 +00:00
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2005-10-16 16:37:13 +00:00
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static SANE_Byte RegisterBankStatus = -1;
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2005-10-03 13:27:03 +00:00
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static STATUS
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2011-03-08 22:10:57 +00:00
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WriteIOControl (PAsic chip, unsigned short wValue, unsigned short wIndex,
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unsigned short wLength, SANE_Byte * lpbuf)
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2005-10-03 13:27:03 +00:00
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{
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STATUS status = STATUS_GOOD;
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status =
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sanei_usb_control_msg (chip->fd, 0x40, 0x01, wValue, wIndex, wLength,
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lpbuf);
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if (status != STATUS_GOOD)
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{
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DBG (DBG_ERR, "WriteIOControl Error!\n");
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return status;
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}
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return STATUS_GOOD;
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}
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static STATUS
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2011-03-08 22:10:57 +00:00
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ReadIOControl (PAsic chip, unsigned short wValue, unsigned short wIndex,
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unsigned short wLength, SANE_Byte * lpbuf)
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2005-10-03 13:27:03 +00:00
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{
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STATUS status = STATUS_GOOD;
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status =
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sanei_usb_control_msg (chip->fd, 0xc0, 0x01, wValue, wIndex, wLength,
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lpbuf);
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if (status != STATUS_GOOD)
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{
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DBG (DBG_ERR, "WriteIOControl Error!\n");
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return status;
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}
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return status;
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}
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static STATUS
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Mustek_ClearFIFO (PAsic chip)
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{
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STATUS status = STATUS_GOOD;
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2005-10-16 16:37:13 +00:00
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SANE_Byte buf[4];
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2011-03-06 18:16:16 +00:00
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DBG (DBG_ASIC, "Mustek_ClearFIFO: Enter\n");
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2005-10-03 13:27:03 +00:00
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buf[0] = 0;
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buf[1] = 0;
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buf[2] = 0;
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buf[3] = 0;
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2011-03-09 00:05:41 +00:00
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status = WriteIOControl (chip, 0x05, 0, 4, buf);
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2005-10-03 13:27:03 +00:00
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if (status != STATUS_GOOD)
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return status;
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2011-03-09 00:05:41 +00:00
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status = WriteIOControl (chip, 0xc0, 0, 4, buf);
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2005-10-03 13:27:03 +00:00
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if (status != STATUS_GOOD)
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return status;
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2011-03-06 18:16:16 +00:00
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DBG (DBG_ASIC, "Mustek_ClearFIFO: Exit\n");
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2005-10-03 13:27:03 +00:00
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return STATUS_GOOD;
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}
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static STATUS
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2005-10-16 16:37:13 +00:00
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Mustek_SendData (PAsic chip, unsigned short reg, SANE_Byte data)
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2005-10-03 13:27:03 +00:00
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{
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2005-10-16 16:37:13 +00:00
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SANE_Byte buf[4];
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2005-10-03 13:27:03 +00:00
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STATUS status = STATUS_GOOD;
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DBG (DBG_ASIC, "Mustek_SendData: Enter. reg=%x,data=%x\n", reg, data);
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if (reg <= 0xFF)
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{
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if (RegisterBankStatus != 0)
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{
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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buf[0] = ES01_5F_REGISTER_BANK_SELECT;
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buf[1] = SELECT_REGISTER_BANK0;
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buf[2] = ES01_5F_REGISTER_BANK_SELECT;
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buf[3] = SELECT_REGISTER_BANK0;
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WriteIOControl (chip, 0xb0, 0, 4, buf);
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RegisterBankStatus = 0;
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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}
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}
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else if (reg <= 0x1FF)
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{
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if (RegisterBankStatus != 1)
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{
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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buf[0] = ES01_5F_REGISTER_BANK_SELECT;
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buf[1] = SELECT_REGISTER_BANK1;
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buf[2] = ES01_5F_REGISTER_BANK_SELECT;
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buf[3] = SELECT_REGISTER_BANK1;
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WriteIOControl (chip, 0xb0, 0, 4, buf);
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RegisterBankStatus = 1;
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}
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}
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else if (reg <= 0x2FF)
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{
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if (RegisterBankStatus != 2)
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{
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DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
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buf[0] = ES01_5F_REGISTER_BANK_SELECT;
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buf[1] = SELECT_REGISTER_BANK2;
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buf[2] = ES01_5F_REGISTER_BANK_SELECT;
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buf[3] = SELECT_REGISTER_BANK2;
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WriteIOControl (chip, 0xb0, 0, 4, buf);
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RegisterBankStatus = 2;
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}
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}
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buf[0] = LOBYTE (reg);
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buf[1] = data;
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buf[2] = LOBYTE (reg);
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buf[3] = data;
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status = WriteIOControl (chip, 0xb0, 0, 4, buf);
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if (status != STATUS_GOOD)
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DBG (DBG_ERR, ("Mustek_SendData: write error\n"));
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return status;
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}
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static STATUS
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2005-10-16 16:37:13 +00:00
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Mustek_ReceiveData (PAsic chip, SANE_Byte * reg)
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2005-10-03 13:27:03 +00:00
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{
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STATUS status = STATUS_GOOD;
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2005-10-16 16:37:13 +00:00
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SANE_Byte buf[4];
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2005-10-03 13:27:03 +00:00
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DBG (DBG_ASIC, "Mustek_ReceiveData\n");
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status = ReadIOControl (chip, 0x07, 0, 4, buf);
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*reg = buf[0];
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return status;
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}
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static STATUS
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2005-10-16 16:37:13 +00:00
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Mustek_WriteAddressLineForRegister (PAsic chip, SANE_Byte x)
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2005-10-03 13:27:03 +00:00
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{
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STATUS status = STATUS_GOOD;
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2005-10-16 16:37:13 +00:00
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SANE_Byte buf[4];
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2005-10-03 13:27:03 +00:00
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DBG (DBG_ASIC, "Mustek_WriteAddressLineForRegister: Enter\n");
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buf[0] = x;
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buf[1] = x;
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buf[2] = x;
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buf[3] = x;
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status = WriteIOControl (chip, 0x04, x, 4, buf);
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DBG (DBG_ASIC, "Mustek_WriteAddressLineForRegister: Exit\n");
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return status;
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}
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static STATUS
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2005-10-16 16:37:13 +00:00
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SetRWSize (PAsic chip, SANE_Byte ReadWrite, unsigned int size)
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2005-10-03 13:27:03 +00:00
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{
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STATUS status = STATUS_GOOD;
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DBG (DBG_ASIC, "SetRWSize: Enter\n");
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2011-03-11 01:08:46 +00:00
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if (ReadWrite == WRITE_RAM)
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2011-03-08 22:10:57 +00:00
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{ /* write */
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2005-10-16 16:37:13 +00:00
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status = Mustek_SendData (chip, 0x7C, (SANE_Byte) (size));
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2005-10-03 13:27:03 +00:00
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if (status != STATUS_GOOD)
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return status;
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2005-10-16 16:37:13 +00:00
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status = Mustek_SendData (chip, 0x7D, (SANE_Byte) (size >> 8));
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2005-10-03 13:27:03 +00:00
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if (status != STATUS_GOOD)
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return status;
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2005-10-16 16:37:13 +00:00
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status = Mustek_SendData (chip, 0x7E, (SANE_Byte) (size >> 16));
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2005-10-03 13:27:03 +00:00
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if (status != STATUS_GOOD)
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return status;
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2005-10-16 16:37:13 +00:00
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status = Mustek_SendData (chip, 0x7F, (SANE_Byte) (size >> 24));
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2005-10-03 13:27:03 +00:00
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if (status != STATUS_GOOD)
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return status;
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}
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else
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{ /* read */
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2005-10-16 16:37:13 +00:00
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status = Mustek_SendData (chip, 0x7C, (SANE_Byte) (size >> 1));
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2005-10-03 13:27:03 +00:00
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if (status != STATUS_GOOD)
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return status;
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2005-10-16 16:37:13 +00:00
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status = Mustek_SendData (chip, 0x7D, (SANE_Byte) (size >> 9));
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2005-10-03 13:27:03 +00:00
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if (status != STATUS_GOOD)
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return status;
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2005-10-16 16:37:13 +00:00
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status = Mustek_SendData (chip, 0x7E, (SANE_Byte) (size >> 17));
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2005-10-03 13:27:03 +00:00
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if (status != STATUS_GOOD)
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return status;
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2005-10-16 16:37:13 +00:00
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status = Mustek_SendData (chip, 0x7F, (SANE_Byte) (size >> 25));
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2005-10-03 13:27:03 +00:00
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if (status != STATUS_GOOD)
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return status;
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}
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DBG (DBG_ASIC, "SetRWSize: Exit\n");
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return STATUS_GOOD;
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}
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static STATUS
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2005-10-16 16:37:13 +00:00
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Mustek_DMARead (PAsic chip, unsigned int size, SANE_Byte * lpdata)
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2005-10-03 13:27:03 +00:00
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{
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STATUS status = STATUS_GOOD;
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2005-10-16 16:37:13 +00:00
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unsigned int i, buf[1];
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unsigned int read_size;
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2005-10-03 13:27:03 +00:00
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DBG (DBG_ASIC, "Mustek_DMARead: Enter\n");
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status = Mustek_ClearFIFO (chip);
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if (status != STATUS_GOOD)
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return status;
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buf[0] = read_size = 32 * 1024;
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for (i = 0; i < size / (read_size); i++)
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{
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2011-03-11 01:08:46 +00:00
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SetRWSize (chip, READ_RAM, buf[0]);
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2005-10-16 16:37:13 +00:00
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status = WriteIOControl (chip, 0x03, 0, 4, (SANE_Byte *) (buf));
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2005-10-03 13:27:03 +00:00
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status =
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sanei_usb_read_bulk (chip->fd, lpdata + i * read_size,
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(size_t *) buf);
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if (status != STATUS_GOOD)
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{
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DBG (DBG_ERR, "Mustek_DMARead: read error\n");
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return status;
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}
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}
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buf[0] = size - i * read_size;
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if (buf[0] > 0)
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{
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2011-03-11 01:08:46 +00:00
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SetRWSize (chip, READ_RAM, buf[0]);
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2005-10-16 16:37:13 +00:00
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status = WriteIOControl (chip, 0x03, 0, 4, (SANE_Byte *) (buf));
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2005-10-03 13:27:03 +00:00
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status =
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sanei_usb_read_bulk (chip->fd, lpdata + i * read_size,
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(size_t *) buf);
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if (status != STATUS_GOOD)
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{
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DBG (DBG_ERR, "Mustek_DMARead: read error\n");
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return status;
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}
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usleep (20000);
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}
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DBG (DBG_ASIC, "Mustek_DMARead: Exit\n");
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return STATUS_GOOD;
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}
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static STATUS
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2005-10-16 16:37:13 +00:00
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Mustek_DMAWrite (PAsic chip, unsigned int size, SANE_Byte * lpdata)
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2005-10-03 13:27:03 +00:00
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{
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STATUS status = STATUS_GOOD;
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2005-10-16 16:37:13 +00:00
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unsigned int buf[1];
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unsigned int i;
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unsigned int write_size;
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2005-10-03 13:27:03 +00:00
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2011-03-06 18:16:16 +00:00
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DBG (DBG_ASIC, "Mustek_DMAWrite: Enter. size=%d\n", size);
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2005-10-03 13:27:03 +00:00
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status = Mustek_ClearFIFO (chip);
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if (status != STATUS_GOOD)
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return status;
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buf[0] = write_size = 32 * 1024;
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for (i = 0; i < size / (write_size); i++)
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{
|
2011-03-11 01:08:46 +00:00
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SetRWSize (chip, WRITE_RAM, buf[0]);
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2005-10-16 16:37:13 +00:00
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WriteIOControl (chip, 0x02, 0, 4, (SANE_Byte *) buf);
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2005-10-03 13:27:03 +00:00
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status =
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|
|
sanei_usb_write_bulk (chip->fd, lpdata + i * write_size,
|
|
|
|
(size_t *) buf);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Mustek_DMAWrite: write error\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
buf[0] = size - i * write_size;
|
|
|
|
if (buf[0] > 0)
|
|
|
|
{
|
2011-03-11 01:08:46 +00:00
|
|
|
SetRWSize (chip, WRITE_RAM, buf[0]);
|
2005-10-16 16:37:13 +00:00
|
|
|
WriteIOControl (chip, 0x02, 0, 4, (SANE_Byte *) buf);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
status =
|
|
|
|
sanei_usb_write_bulk (chip->fd, lpdata + i * write_size,
|
|
|
|
(size_t *) buf);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Mustek_DMAWrite: write error\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_ClearFIFO (chip);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Mustek_DMAWrite: Exit\n");
|
|
|
|
return STATUS_GOOD;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
Mustek_SendData2Byte (PAsic chip, unsigned short reg, SANE_Byte data)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
2005-10-16 16:37:13 +00:00
|
|
|
static SANE_Bool isTransfer = FALSE;
|
|
|
|
static SANE_Byte BankBuf[4];
|
|
|
|
static SANE_Byte DataBuf[4];
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (reg <= 0xFF)
|
|
|
|
{
|
|
|
|
if (RegisterBankStatus != 0)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
|
|
|
|
BankBuf[0] = ES01_5F_REGISTER_BANK_SELECT;
|
|
|
|
BankBuf[1] = SELECT_REGISTER_BANK0;
|
|
|
|
BankBuf[2] = ES01_5F_REGISTER_BANK_SELECT;
|
|
|
|
BankBuf[3] = SELECT_REGISTER_BANK0;
|
|
|
|
WriteIOControl (chip, 0xb0, 0, 4, BankBuf);
|
|
|
|
|
|
|
|
RegisterBankStatus = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if (reg <= 0x1FF)
|
|
|
|
{
|
|
|
|
if (RegisterBankStatus != 1)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
|
|
|
|
BankBuf[0] = ES01_5F_REGISTER_BANK_SELECT;
|
|
|
|
BankBuf[1] = SELECT_REGISTER_BANK1;
|
|
|
|
BankBuf[2] = ES01_5F_REGISTER_BANK_SELECT;
|
|
|
|
|
|
|
|
BankBuf[3] = SELECT_REGISTER_BANK1;
|
|
|
|
WriteIOControl (chip, 0xb0, 0, 4, BankBuf);
|
|
|
|
RegisterBankStatus = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if (reg <= 0x2FF)
|
|
|
|
{
|
|
|
|
if (RegisterBankStatus != 2)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "RegisterBankStatus=%d\n", RegisterBankStatus);
|
|
|
|
BankBuf[0] = ES01_5F_REGISTER_BANK_SELECT;
|
|
|
|
BankBuf[1] = SELECT_REGISTER_BANK2;
|
|
|
|
BankBuf[2] = ES01_5F_REGISTER_BANK_SELECT;
|
|
|
|
BankBuf[3] = SELECT_REGISTER_BANK2;
|
|
|
|
WriteIOControl (chip, 0xb0, 0, 4, BankBuf);
|
|
|
|
RegisterBankStatus = 2;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (isTransfer == FALSE)
|
|
|
|
{
|
|
|
|
DataBuf[0] = LOBYTE (reg);
|
|
|
|
DataBuf[1] = data;
|
|
|
|
isTransfer = TRUE;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
DataBuf[2] = LOBYTE (reg);
|
|
|
|
DataBuf[3] = data;
|
|
|
|
WriteIOControl (chip, 0xb0, 0, 4, DataBuf);
|
|
|
|
isTransfer = FALSE;
|
|
|
|
}
|
|
|
|
|
|
|
|
return STATUS_GOOD;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* ---------------------- ASIC motor functions ----------------------------- */
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
static STATUS
|
|
|
|
LLFRamAccess (PAsic chip, LLF_RAMACCESS * RamAccess)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte a[2];
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLFRamAccess: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* Set start address. Unit is a word. */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_A0_HostStartAddr0_7,
|
|
|
|
LOBYTE (RamAccess->LoStartAddress));
|
|
|
|
|
|
|
|
if (RamAccess->IsOnChipGamma == ON_CHIP_FINAL_GAMMA)
|
2011-03-06 18:16:16 +00:00
|
|
|
{
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_A1_HostStartAddr8_15,
|
|
|
|
HIBYTE (RamAccess->LoStartAddress));
|
|
|
|
Mustek_SendData (chip, ES01_A2_HostStartAddr16_21,
|
|
|
|
LOBYTE (RamAccess->HiStartAddress) | ACCESS_GAMMA_RAM);
|
|
|
|
}
|
|
|
|
else if (RamAccess->IsOnChipGamma == ON_CHIP_PRE_GAMMA)
|
2011-03-06 18:16:16 +00:00
|
|
|
{
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_A1_HostStartAddr8_15,
|
|
|
|
HIBYTE (RamAccess->
|
2011-03-08 22:10:57 +00:00
|
|
|
LoStartAddress) | ACCESS_PRE_GAMMA_ES01);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_A2_HostStartAddr16_21,
|
|
|
|
LOBYTE (RamAccess->HiStartAddress) | ACCESS_GAMMA_RAM);
|
|
|
|
}
|
2011-03-06 18:16:16 +00:00
|
|
|
else /* DRAM */
|
|
|
|
{
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_A1_HostStartAddr8_15,
|
|
|
|
HIBYTE (RamAccess->LoStartAddress));
|
|
|
|
Mustek_SendData (chip, ES01_A2_HostStartAddr16_21,
|
|
|
|
LOBYTE (RamAccess->HiStartAddress) | ACCESS_DRAM);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* set SDRAM delay time */
|
|
|
|
Mustek_SendData (chip, ES01_79_AFEMCLK_SDRAMCLK_DELAY_CONTROL,
|
|
|
|
SDRAMCLK_DELAY_12_ns);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* Set end address. Unit is a word. */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_A3_HostEndAddr0_7, 0xff);
|
|
|
|
Mustek_SendData (chip, ES01_A4_HostEndAddr8_15, 0xff);
|
|
|
|
Mustek_SendData (chip, ES01_A5_HostEndAddr16_21, 0xff);
|
|
|
|
Mustek_ClearFIFO (chip);
|
|
|
|
|
|
|
|
if (RamAccess->ReadWrite == WRITE_RAM)
|
2011-03-08 22:10:57 +00:00
|
|
|
{ /* write RAM */
|
|
|
|
/* size must be even */
|
|
|
|
Mustek_DMAWrite (chip, RamAccess->RwSize, RamAccess->BufferPtr);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* steal read 2 byte */
|
2005-10-03 13:27:03 +00:00
|
|
|
usleep (20000);
|
|
|
|
RamAccess->RwSize = 2;
|
2011-03-09 00:05:41 +00:00
|
|
|
RamAccess->BufferPtr = a;
|
2005-10-03 13:27:03 +00:00
|
|
|
RamAccess->ReadWrite = READ_RAM;
|
|
|
|
LLFRamAccess (chip, RamAccess);
|
|
|
|
DBG (DBG_ASIC, "end steal 2 byte!\n");
|
|
|
|
}
|
|
|
|
else
|
2011-03-08 22:10:57 +00:00
|
|
|
{ /* read RAM */
|
|
|
|
/* size must be even */
|
|
|
|
Mustek_DMARead (chip, RamAccess->RwSize, RamAccess->BufferPtr);
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLFRamAccess: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
LLFSetMotorCurrentAndPhase (PAsic chip,
|
2011-03-11 01:08:46 +00:00
|
|
|
LLF_MOTOR_CURRENT_AND_PHASE * MotorCurrentAndPhase)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte MotorPhase;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLFSetMotorCurrentAndPhase: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (MotorCurrentAndPhase->MotorDriverIs3967 == 1)
|
2011-03-06 18:16:16 +00:00
|
|
|
MotorPhase = 0xFE;
|
2005-10-03 13:27:03 +00:00
|
|
|
else
|
2011-03-06 18:16:16 +00:00
|
|
|
MotorPhase = 0xFF;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "MotorPhase=0x%x\n", MotorPhase);
|
|
|
|
Mustek_SendData (chip, ES02_50_MOTOR_CURRENT_CONTORL, 0x01);
|
|
|
|
|
|
|
|
if (MotorCurrentAndPhase->FillPhase == 0)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_AB_PWM_CURRENT_CONTROL, 0x00);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 1 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 2 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 3 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 4 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (MotorCurrentAndPhase->MoveType == _4_TABLE_SPACE_FOR_FULL_STEP)
|
2011-03-08 22:10:57 +00:00
|
|
|
{ /* full step */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_AB_PWM_CURRENT_CONTROL, 0x00);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 1 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 2 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 3 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 4 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
}
|
|
|
|
else if (MotorCurrentAndPhase->MoveType ==
|
|
|
|
_8_TABLE_SPACE_FOR_1_DIV_2_STEP)
|
2011-03-08 22:10:57 +00:00
|
|
|
{ /* half step */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_AB_PWM_CURRENT_CONTROL, 0x01);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 1 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x25 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 2 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x07 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 3 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x24 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 4 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x30 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 5 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x2c & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 6 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x0e & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 7 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x2d & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 8 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentA);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentAndPhase->MotorCurrentB);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x39 & MotorPhase);
|
|
|
|
}
|
|
|
|
else if (MotorCurrentAndPhase->MoveType ==
|
|
|
|
_16_TABLE_SPACE_FOR_1_DIV_4_STEP)
|
|
|
|
{ /* 1/4 step */
|
|
|
|
Mustek_SendData (chip, ES01_AB_PWM_CURRENT_CONTROL, 0x02);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 1 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 2 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 3 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 4 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 5 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * cos (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * sin (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 6 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * cos (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * sin (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 7 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * cos (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * sin (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 8 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * cos (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * sin (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 9 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 10 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 11 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 12 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 13 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * cos (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * sin (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 14 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * cos (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * sin (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 15 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * cos (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * sin (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 16 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * cos (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * sin (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
4 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
|
|
|
}
|
|
|
|
else if (MotorCurrentAndPhase->MoveType ==
|
|
|
|
_32_TABLE_SPACE_FOR_1_DIV_8_STEP)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_AB_PWM_CURRENT_CONTROL, 0x03);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 1 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 2 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 3 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 4 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 5 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (4 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (4 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 6 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (5 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (5 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 7 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (6 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (6 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 8 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (7 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (7 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x00 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 9 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 10 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 11 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 12 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 13 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (4 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (4 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 14 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (5 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (5 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 15 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (6 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (6 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 16 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (7 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (7 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x08 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 17 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 18 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 19 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 20 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 21 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (4 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (4 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 22 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (5 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (5 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 23 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (6 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (6 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 24 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (7 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (7 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x09 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 25 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (0 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 26 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (1 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 27 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (2 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 28 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (3 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 29 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (4 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (4 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 30 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (5 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (5 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 31 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (6 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (6 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* 32 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData2Byte (chip, ES02_52_MOTOR_CURRENT_TABLE_A,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentA * sin (7 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_53_MOTOR_CURRENT_TABLE_B,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (MotorCurrentAndPhase->
|
2011-03-09 00:26:09 +00:00
|
|
|
MotorCurrentB * cos (7 *
|
2005-10-03 13:27:03 +00:00
|
|
|
3.141592654
|
|
|
|
* 90 /
|
|
|
|
8 /
|
|
|
|
180)));
|
|
|
|
Mustek_SendData2Byte (chip, ES02_51_MOTOR_PHASE_TABLE_1,
|
|
|
|
0x01 & MotorPhase);
|
|
|
|
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (MotorCurrentAndPhase->FillPhase != 0)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES02_50_MOTOR_CURRENT_CONTORL,
|
2011-03-11 01:08:46 +00:00
|
|
|
MotorCurrentAndPhase->MoveType);
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES02_50_MOTOR_CURRENT_CONTORL, 0x00);
|
|
|
|
}
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLFSetMotorCurrentAndPhase: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-11 01:08:46 +00:00
|
|
|
LLFSetMotorTable (PAsic chip, unsigned short *MotorTablePtr)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
|
|
|
LLF_RAMACCESS RamAccess;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLFSetMotorTable: Enter\n");
|
2011-03-11 01:08:46 +00:00
|
|
|
if (MotorTablePtr != NULL)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
RamAccess.ReadWrite = WRITE_RAM;
|
|
|
|
RamAccess.IsOnChipGamma = EXTERNAL_RAM;
|
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
RamAccess.LoStartAddress = 0x3000;
|
2005-10-03 13:27:03 +00:00
|
|
|
RamAccess.HiStartAddress = 0;
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
RamAccess.RwSize = 512 * 2 * 8; /* unit: byte */
|
2011-03-11 01:08:46 +00:00
|
|
|
RamAccess.BufferPtr = (SANE_Byte *) MotorTablePtr;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
LLFRamAccess (chip, &RamAccess);
|
|
|
|
|
|
|
|
/* tell scan chip the motor table address, unit is 2^14 words */
|
2011-03-11 01:08:46 +00:00
|
|
|
Mustek_SendData (chip, ES01_9D_MotorTableAddrA14_A21, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLFSetMotorTable: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
LLFMotorMove (PAsic chip, LLF_MOTORMOVE * LLF_MotorMove)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned int motor_steps;
|
|
|
|
SANE_Byte temp_motor_action;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLFMotorMove: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
status = Asic_WaitUnitReady (chip);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Set start/end pixel\n");
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_B8_ChannelRedExpStartPixelLSB, LOBYTE (100));
|
|
|
|
Mustek_SendData (chip, ES01_B9_ChannelRedExpStartPixelMSB, HIBYTE (100));
|
|
|
|
Mustek_SendData (chip, ES01_BA_ChannelRedExpEndPixelLSB, LOBYTE (101));
|
|
|
|
Mustek_SendData (chip, ES01_BB_ChannelRedExpEndPixelMSB, HIBYTE (101));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_BC_ChannelGreenExpStartPixelLSB, LOBYTE (100));
|
|
|
|
Mustek_SendData (chip, ES01_BD_ChannelGreenExpStartPixelMSB, HIBYTE (100));
|
|
|
|
Mustek_SendData (chip, ES01_BE_ChannelGreenExpEndPixelLSB, LOBYTE (101));
|
|
|
|
Mustek_SendData (chip, ES01_BF_ChannelGreenExpEndPixelMSB, HIBYTE (101));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_C0_ChannelBlueExpStartPixelLSB, LOBYTE (100));
|
|
|
|
Mustek_SendData (chip, ES01_C1_ChannelBlueExpStartPixelMSB, HIBYTE (100));
|
|
|
|
Mustek_SendData (chip, ES01_C2_ChannelBlueExpEndPixelLSB, LOBYTE (101));
|
|
|
|
Mustek_SendData (chip, ES01_C3_ChannelBlueExpEndPixelMSB, HIBYTE (101));
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* set motor accelerate steps, max. 511 steps */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_E0_MotorAccStep0_7,
|
|
|
|
LOBYTE (LLF_MotorMove->AccStep));
|
|
|
|
Mustek_SendData (chip, ES01_E1_MotorAccStep8_8,
|
|
|
|
HIBYTE (LLF_MotorMove->AccStep));
|
|
|
|
DBG (DBG_ASIC, "AccStep=%d\n", LLF_MotorMove->AccStep);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_E2_MotorStepOfMaxSpeed0_7,
|
|
|
|
LOBYTE (LLF_MotorMove->FixMoveSteps));
|
|
|
|
Mustek_SendData (chip, ES01_E3_MotorStepOfMaxSpeed8_15,
|
|
|
|
HIBYTE (LLF_MotorMove->FixMoveSteps));
|
|
|
|
Mustek_SendData (chip, ES01_E4_MotorStepOfMaxSpeed16_19, 0);
|
|
|
|
DBG (DBG_ASIC, "FixMoveSteps=%d\n", LLF_MotorMove->FixMoveSteps);
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* set motor decelerate steps, max. 255 steps */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_E5_MotorDecStep, LLF_MotorMove->DecStep);
|
|
|
|
DBG (DBG_ASIC, "DecStep=%d\n", LLF_MotorMove->DecStep);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* Set motor uniform speed.
|
|
|
|
Only used for UNIFORM_MOTOR_AND_SCAN_SPEED_ENABLE. If you use acc mode,
|
|
|
|
these two registers are not used. */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_FD_MotorFixedspeedLSB,
|
|
|
|
LOBYTE (LLF_MotorMove->FixMoveSpeed));
|
|
|
|
Mustek_SendData (chip, ES01_FE_MotorFixedspeedMSB,
|
|
|
|
HIBYTE (LLF_MotorMove->FixMoveSpeed));
|
|
|
|
DBG (DBG_ASIC, "FixMoveSpeed=%d\n", LLF_MotorMove->FixMoveSpeed);
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* set motor type */
|
2011-03-11 01:08:46 +00:00
|
|
|
Mustek_SendData (chip, ES01_A6_MotorOption,
|
|
|
|
MOTOR_0_ENABLE | HOME_SENSOR_0_ENABLE | TABLE_DEFINE_ES03);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* Set motor speed unit for all motor modes, including uniform. */
|
|
|
|
Mustek_SendData (chip, ES01_F6_MotorControl1,
|
2011-03-11 01:08:46 +00:00
|
|
|
SPEED_UNIT_1_PIXEL_TIME |
|
|
|
|
MOTOR_SYNC_UNIT_1_PIXEL_TIME);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* set action register */
|
2005-10-03 13:27:03 +00:00
|
|
|
if (LLF_MotorMove->ActionType == ACTION_TYPE_BACKTOHOME)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "ACTION_TYPE_BACKTOHOME\n");
|
|
|
|
temp_motor_action = MOTOR_BACK_HOME_AFTER_SCAN_ENABLE;
|
|
|
|
motor_steps = 30000 * 2;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "Forward or Backward\n");
|
|
|
|
temp_motor_action = MOTOR_MOVE_TO_FIRST_LINE_ENABLE;
|
|
|
|
motor_steps = LLF_MotorMove->FixMoveSteps;
|
|
|
|
|
|
|
|
if (LLF_MotorMove->ActionType == ACTION_TYPE_BACKWARD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "ACTION_TYPE_BACKWARD\n");
|
2011-03-11 01:08:46 +00:00
|
|
|
temp_motor_action |= INVERT_MOTOR_DIRECTION_ENABLE;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_94_PowerSaveControl,
|
2011-03-11 01:08:46 +00:00
|
|
|
TIMER_POWER_SAVE_ENABLE |
|
|
|
|
USB_POWER_SAVE_ENABLE | USB_REMOTE_WAKEUP_ENABLE |
|
|
|
|
LED_MODE_FLASH_SLOWLY);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* set number of movement steps with fixed speed */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_E2_MotorStepOfMaxSpeed0_7,
|
|
|
|
LOBYTE (motor_steps));
|
|
|
|
Mustek_SendData (chip, ES01_E3_MotorStepOfMaxSpeed8_15,
|
|
|
|
HIBYTE (motor_steps));
|
|
|
|
Mustek_SendData (chip, ES01_E4_MotorStepOfMaxSpeed16_19,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) ((motor_steps & 0x00ff0000) >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
DBG (DBG_ASIC, "motor_steps=%d\n", motor_steps);
|
|
|
|
|
|
|
|
if (LLF_MotorMove->ActionMode == ACTION_MODE_UNIFORM_SPEED_MOVE)
|
2011-03-11 01:08:46 +00:00
|
|
|
temp_motor_action |= UNIFORM_MOTOR_AND_SCAN_SPEED_ENABLE;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_F3_ActionOption, temp_motor_action);
|
2011-03-06 12:57:10 +00:00
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, ACTION_TRIGGER_ENABLE);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
if (LLF_MotorMove->ActionType == ACTION_TYPE_BACKTOHOME)
|
|
|
|
status = Asic_WaitCarriageHome (chip);
|
|
|
|
else
|
|
|
|
status = Asic_WaitUnitReady (chip);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLFMotorMove: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-08 22:10:57 +00:00
|
|
|
SetMotorStepTable (PAsic chip, LLF_MOTORMOVE * MotorStepsTable,
|
|
|
|
unsigned short wStartY, unsigned int dwScanImageSteps,
|
|
|
|
unsigned short wYResolution)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short wAccSteps = 511;
|
|
|
|
unsigned short wForwardSteps = 20;
|
|
|
|
SANE_Byte bDecSteps = 255;
|
2011-03-06 18:16:16 +00:00
|
|
|
unsigned short wMotorSyncPixelNumber = 0;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short wScanAccSteps = 511;
|
|
|
|
SANE_Byte bScanDecSteps = 255;
|
|
|
|
unsigned short wFixScanSteps = 20;
|
|
|
|
unsigned short wScanBackTrackingSteps = 40;
|
|
|
|
unsigned short wScanRestartSteps = 40;
|
|
|
|
unsigned short wScanBackHomeExtSteps = 100;
|
|
|
|
unsigned int dwTotalMotorSteps;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetMotorStepTable: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
dwTotalMotorSteps = dwScanImageSteps;
|
|
|
|
|
|
|
|
switch (wYResolution)
|
|
|
|
{
|
|
|
|
case 2400:
|
|
|
|
case 1200:
|
|
|
|
wScanAccSteps = 100;
|
|
|
|
bScanDecSteps = 10;
|
|
|
|
wScanBackTrackingSteps = 10;
|
|
|
|
wScanRestartSteps = 10;
|
|
|
|
break;
|
|
|
|
case 600:
|
|
|
|
case 300:
|
|
|
|
wScanAccSteps = 300;
|
|
|
|
bScanDecSteps = 40;
|
|
|
|
break;
|
|
|
|
case 150:
|
|
|
|
wScanAccSteps = 300;
|
|
|
|
bScanDecSteps = 40;
|
|
|
|
break;
|
|
|
|
case 100:
|
|
|
|
case 75:
|
|
|
|
case 50:
|
|
|
|
wScanAccSteps = 300;
|
|
|
|
bScanDecSteps = 40;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* not including T0,T1 steps */
|
|
|
|
if (wStartY < (wAccSteps + wForwardSteps + bDecSteps + wScanAccSteps))
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
wAccSteps = 1;
|
|
|
|
bDecSteps = 1;
|
|
|
|
wFixScanSteps = (wStartY - wScanAccSteps) > 0 ?
|
|
|
|
(wStartY - wScanAccSteps) : 0;
|
|
|
|
wForwardSteps = 0;
|
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
chip->isMotorMoveToFirstLine = 0;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
wForwardSteps =
|
2005-10-16 16:37:13 +00:00
|
|
|
(wStartY - wAccSteps - (unsigned short) bDecSteps - wScanAccSteps -
|
2005-10-03 13:27:03 +00:00
|
|
|
wFixScanSteps) >
|
2005-10-16 16:37:13 +00:00
|
|
|
0 ? (wStartY - wAccSteps - (unsigned short) bDecSteps - wScanAccSteps -
|
2005-10-03 13:27:03 +00:00
|
|
|
wFixScanSteps) : 0;
|
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
chip->isMotorMoveToFirstLine = MOTOR_MOVE_TO_FIRST_LINE_ENABLE;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
dwTotalMotorSteps += wAccSteps;
|
|
|
|
dwTotalMotorSteps += wForwardSteps;
|
|
|
|
dwTotalMotorSteps += bDecSteps;
|
|
|
|
dwTotalMotorSteps += wScanAccSteps;
|
|
|
|
dwTotalMotorSteps += wFixScanSteps;
|
|
|
|
dwTotalMotorSteps += bScanDecSteps;
|
|
|
|
dwTotalMotorSteps += 2;
|
|
|
|
|
|
|
|
|
|
|
|
MotorStepsTable->AccStep = wAccSteps;
|
|
|
|
MotorStepsTable->DecStep = bDecSteps;
|
|
|
|
MotorStepsTable->wScanAccSteps = wScanAccSteps;
|
|
|
|
MotorStepsTable->bScanDecSteps = bScanDecSteps;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* state 1 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_E0_MotorAccStep0_7, LOBYTE (wAccSteps));
|
|
|
|
Mustek_SendData (chip, ES01_E1_MotorAccStep8_8, HIBYTE (wAccSteps));
|
2011-03-06 18:16:16 +00:00
|
|
|
/* state 2 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_E2_MotorStepOfMaxSpeed0_7,
|
|
|
|
LOBYTE (wForwardSteps));
|
|
|
|
Mustek_SendData (chip, ES01_E3_MotorStepOfMaxSpeed8_15,
|
|
|
|
HIBYTE (wForwardSteps));
|
|
|
|
Mustek_SendData (chip, ES01_E4_MotorStepOfMaxSpeed16_19, 0);
|
2011-03-06 18:16:16 +00:00
|
|
|
/* state 3 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_E5_MotorDecStep, bDecSteps);
|
2011-03-06 18:16:16 +00:00
|
|
|
/* state 4 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_AE_MotorSyncPixelNumberM16LSB,
|
2011-03-06 18:16:16 +00:00
|
|
|
LOBYTE (wMotorSyncPixelNumber));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_AF_MotorSyncPixelNumberM16MSB,
|
2011-03-06 18:16:16 +00:00
|
|
|
HIBYTE (wMotorSyncPixelNumber));
|
|
|
|
/* state 5 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_EC_ScanAccStep0_7, LOBYTE (wScanAccSteps));
|
|
|
|
Mustek_SendData (chip, ES01_ED_ScanAccStep8_8, HIBYTE (wScanAccSteps));
|
2011-03-06 18:16:16 +00:00
|
|
|
/* state 6 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_EE_FixScanStepLSB, LOBYTE (wFixScanSteps));
|
|
|
|
Mustek_SendData (chip, ES01_8A_FixScanStepMSB, HIBYTE (wFixScanSteps));
|
2011-03-06 18:16:16 +00:00
|
|
|
/* state 8 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_EF_ScanDecStep, bScanDecSteps);
|
2011-03-06 18:16:16 +00:00
|
|
|
/* state 10 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_E6_ScanBackTrackingStepLSB,
|
|
|
|
LOBYTE (wScanBackTrackingSteps));
|
|
|
|
Mustek_SendData (chip, ES01_E7_ScanBackTrackingStepMSB,
|
|
|
|
HIBYTE (wScanBackTrackingSteps));
|
2011-03-06 18:16:16 +00:00
|
|
|
/* state 15 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_E8_ScanRestartStepLSB,
|
|
|
|
LOBYTE (wScanRestartSteps));
|
|
|
|
Mustek_SendData (chip, ES01_E9_ScanRestartStepMSB,
|
|
|
|
HIBYTE (wScanRestartSteps));
|
2011-03-06 18:16:16 +00:00
|
|
|
/* state 19 */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_EA_ScanBackHomeExtStepLSB,
|
|
|
|
LOBYTE (wScanBackHomeExtSteps));
|
|
|
|
Mustek_SendData (chip, ES01_EB_ScanBackHomeExtStepMSB,
|
|
|
|
HIBYTE (wScanBackHomeExtSteps));
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* total motor steps */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_F0_ScanImageStep0_7,
|
|
|
|
LOBYTE (dwTotalMotorSteps));
|
|
|
|
Mustek_SendData (chip, ES01_F1_ScanImageStep8_15,
|
|
|
|
HIBYTE (dwTotalMotorSteps));
|
|
|
|
Mustek_SendData (chip, ES01_F2_ScanImageStep16_19,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) ((dwTotalMotorSteps & 0x00ff0000) >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetMotorStepTable: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-06 18:37:25 +00:00
|
|
|
CalculateMotorTable (LLF_CALCULATEMOTORTABLE * lpCalculateMotorTable)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short i;
|
|
|
|
unsigned short wEndSpeed, wStartSpeed;
|
|
|
|
unsigned short wScanAccSteps;
|
|
|
|
SANE_Byte bScanDecSteps;
|
2005-10-03 13:27:03 +00:00
|
|
|
long double y;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short *lpMotorTable;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "CalculateMotorTable: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
wStartSpeed = lpCalculateMotorTable->StartSpeed;
|
|
|
|
wEndSpeed = lpCalculateMotorTable->EndSpeed;
|
|
|
|
wScanAccSteps = lpCalculateMotorTable->AccStepBeforeScan;
|
|
|
|
bScanDecSteps = lpCalculateMotorTable->DecStepAfterScan;
|
|
|
|
lpMotorTable = lpCalculateMotorTable->lpMotorTable;
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* motor T0 & T6 acc table */
|
2005-10-03 13:27:03 +00:00
|
|
|
for (i = 0; i < 512; i++)
|
|
|
|
{
|
2011-03-06 18:37:25 +00:00
|
|
|
y = 6000 - 3500;
|
|
|
|
y *= pow (0.09, (M_PI_2 * i) / 512) - pow (0.09, (M_PI_2 * 511) / 512);
|
2005-10-03 13:27:03 +00:00
|
|
|
y += 4500;
|
2011-03-06 18:37:25 +00:00
|
|
|
lpMotorTable[i] = (unsigned short) y; /* T0 */
|
|
|
|
lpMotorTable[i + 512 * 6] = (unsigned short) y; /* T6 */
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* motor T1 & T7 dec table */
|
2005-10-03 13:27:03 +00:00
|
|
|
for (i = 0; i < 256; i++)
|
|
|
|
{
|
2011-03-06 18:37:25 +00:00
|
|
|
y = 6000 - 3500;
|
|
|
|
y *= pow (0.3, (M_PI_2 * i) / 256);
|
2005-10-03 13:27:03 +00:00
|
|
|
y = 6000 - y;
|
2011-03-06 18:37:25 +00:00
|
|
|
lpMotorTable[i + 512] = (unsigned short) y; /* T1 */
|
|
|
|
lpMotorTable[i + 512 * 7] = (unsigned short) y; /* T7 */
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
2011-03-06 18:37:25 +00:00
|
|
|
for (i = 0; i < wScanAccSteps; i++)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
2011-03-06 18:37:25 +00:00
|
|
|
y = wStartSpeed - wEndSpeed;
|
|
|
|
y *= pow (0.09, (M_PI_2 * i) / wScanAccSteps) -
|
|
|
|
pow (0.09, (M_PI_2 * (wScanAccSteps - 1)) / wScanAccSteps);
|
|
|
|
y += wEndSpeed;
|
|
|
|
lpMotorTable[i + 512 * 2] = (unsigned short) y; /* T2 */
|
|
|
|
lpMotorTable[i + 512 * 4] = (unsigned short) y; /* T4 */
|
|
|
|
}
|
|
|
|
for (i = wScanAccSteps; i < 512; i++)
|
|
|
|
{
|
|
|
|
lpMotorTable[i + 512 * 2] = wEndSpeed; /* T2 */
|
|
|
|
lpMotorTable[i + 512 * 4] = wEndSpeed; /* T4 */
|
|
|
|
}
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:37:25 +00:00
|
|
|
for (i = 0; i < (unsigned short) bScanDecSteps; i++)
|
|
|
|
{
|
|
|
|
y = wStartSpeed - wEndSpeed;
|
|
|
|
y *= pow (0.3, (M_PI_2 * i) / bScanDecSteps);
|
|
|
|
y = wStartSpeed - y;
|
|
|
|
lpMotorTable[i + 512 * 3] = (unsigned short) y; /* T3 */
|
|
|
|
lpMotorTable[i + 512 * 5] = (unsigned short) y; /* T5 */
|
|
|
|
}
|
|
|
|
for (i = bScanDecSteps; i < 256; i++)
|
|
|
|
{
|
|
|
|
lpMotorTable[i + 512 * 3] = wStartSpeed; /* T3 */
|
|
|
|
lpMotorTable[i + 512 * 5] = wStartSpeed; /* T5 */
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "CalculateMotorTable: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
LLFCalculateMotorTable (LLF_CALCULATEMOTORTABLE * LLF_CalculateMotorTable)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 18:37:25 +00:00
|
|
|
unsigned short wEndSpeed, wStartSpeed;
|
|
|
|
unsigned short wScanAccSteps;
|
|
|
|
unsigned short * lpMotorTable;
|
|
|
|
long double y;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short i;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLF_CALCULATEMOTORTABLE: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:37:25 +00:00
|
|
|
wStartSpeed = LLF_CalculateMotorTable->StartSpeed;
|
|
|
|
wEndSpeed = LLF_CalculateMotorTable->EndSpeed;
|
|
|
|
wScanAccSteps = LLF_CalculateMotorTable->AccStepBeforeScan;
|
|
|
|
lpMotorTable = LLF_CalculateMotorTable->lpMotorTable;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
for (i = 0; i < 512; i++)
|
|
|
|
{
|
2011-03-06 18:16:16 +00:00
|
|
|
/* before scan acc table */
|
2011-03-08 22:10:57 +00:00
|
|
|
y = (wStartSpeed - wEndSpeed) *
|
|
|
|
pow (0.09, (M_PI_2 * i) / 512) + wEndSpeed;
|
2011-03-06 18:37:25 +00:00
|
|
|
lpMotorTable[i] = (unsigned short) y;
|
|
|
|
lpMotorTable[i + 512 * 2] = (unsigned short) y;
|
|
|
|
lpMotorTable[i + 512 * 4] = (unsigned short) y;
|
|
|
|
lpMotorTable[i + 512 * 6] = (unsigned short) y;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
2011-03-06 18:37:25 +00:00
|
|
|
for (i = 0; i < 256; i++)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
2011-03-08 22:10:57 +00:00
|
|
|
y = wStartSpeed - (wStartSpeed - wEndSpeed) *
|
|
|
|
pow (0.3, (M_PI_2 * i) / 256);
|
2011-03-06 18:37:25 +00:00
|
|
|
lpMotorTable[i + 512] = (unsigned short) y;
|
|
|
|
lpMotorTable[i + 512 * 3] = (unsigned short) y;
|
|
|
|
lpMotorTable[i + 512 * 5] = (unsigned short) y;
|
|
|
|
lpMotorTable[i + 512 * 7] = (unsigned short) y;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
2011-03-06 18:37:25 +00:00
|
|
|
|
|
|
|
for (i = 0; i < wScanAccSteps; i++)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
2011-03-08 22:10:57 +00:00
|
|
|
y = (wStartSpeed - wEndSpeed) *
|
|
|
|
(pow (0.09, (M_PI_2 * i) / wScanAccSteps) -
|
|
|
|
pow (0.09, (M_PI_2 * (wScanAccSteps - 1)) / wScanAccSteps)) +
|
|
|
|
wEndSpeed;
|
2011-03-06 18:37:25 +00:00
|
|
|
lpMotorTable[i + 512 * 2] = (unsigned short) y;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLF_CALCULATEMOTORTABLE: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-06 18:16:16 +00:00
|
|
|
SetMotorCurrent (unsigned short dwMotorSpeed,
|
2005-10-03 13:27:03 +00:00
|
|
|
LLF_MOTOR_CURRENT_AND_PHASE * CurrentPhase)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetMotorCurrent: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (dwMotorSpeed < 2000)
|
|
|
|
{
|
2011-03-09 00:26:09 +00:00
|
|
|
CurrentPhase->MotorCurrentA = 255;
|
|
|
|
CurrentPhase->MotorCurrentB = 255;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else if (dwMotorSpeed < 3500)
|
|
|
|
{
|
2011-03-09 00:26:09 +00:00
|
|
|
CurrentPhase->MotorCurrentA = 200;
|
|
|
|
CurrentPhase->MotorCurrentB = 200;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else if (dwMotorSpeed < 5000)
|
|
|
|
{
|
2011-03-09 00:26:09 +00:00
|
|
|
CurrentPhase->MotorCurrentA = 160;
|
|
|
|
CurrentPhase->MotorCurrentB = 160;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else if (dwMotorSpeed < 10000)
|
|
|
|
{
|
2011-03-09 00:26:09 +00:00
|
|
|
CurrentPhase->MotorCurrentA = 70;
|
|
|
|
CurrentPhase->MotorCurrentB = 70;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else if (dwMotorSpeed < 17000)
|
|
|
|
{
|
2011-03-09 00:26:09 +00:00
|
|
|
CurrentPhase->MotorCurrentA = 60;
|
|
|
|
CurrentPhase->MotorCurrentB = 60;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2011-03-09 00:26:09 +00:00
|
|
|
CurrentPhase->MotorCurrentA = 50;
|
|
|
|
CurrentPhase->MotorCurrentB = 50;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetMotorCurrent: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-11 01:08:46 +00:00
|
|
|
MotorBackHome (PAsic chip)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short BackHomeMotorTable[512 * 8];
|
2005-10-03 13:27:03 +00:00
|
|
|
LLF_CALCULATEMOTORTABLE CalMotorTable;
|
|
|
|
LLF_MOTOR_CURRENT_AND_PHASE CurrentPhase;
|
|
|
|
LLF_MOTORMOVE MotorMove;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "MotorBackHome: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
CalMotorTable.StartSpeed = 5000;
|
|
|
|
CalMotorTable.EndSpeed = 1200;
|
|
|
|
CalMotorTable.AccStepBeforeScan = 511;
|
|
|
|
CalMotorTable.DecStepAfterScan = 255;
|
|
|
|
CalMotorTable.lpMotorTable = BackHomeMotorTable;
|
|
|
|
LLFCalculateMotorTable (&CalMotorTable);
|
|
|
|
|
|
|
|
|
2011-03-09 00:26:09 +00:00
|
|
|
CurrentPhase.MotorCurrentA = 220;
|
|
|
|
CurrentPhase.MotorCurrentB = 220;
|
2005-10-03 13:27:03 +00:00
|
|
|
CurrentPhase.MoveType = _4_TABLE_SPACE_FOR_FULL_STEP;
|
|
|
|
LLFSetMotorCurrentAndPhase (chip, &CurrentPhase);
|
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
LLFSetMotorTable (chip, BackHomeMotorTable);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
MotorMove.ActionMode = ACTION_MODE_ACCDEC_MOVE;
|
|
|
|
MotorMove.ActionType = ACTION_TYPE_BACKTOHOME;
|
|
|
|
|
|
|
|
MotorMove.AccStep = 511;
|
|
|
|
MotorMove.DecStep = 255;
|
|
|
|
MotorMove.FixMoveSteps = 0;
|
|
|
|
MotorMove.FixMoveSpeed = 3000;
|
|
|
|
LLFMotorMove (chip, &MotorMove);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "MotorBackHome: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
LLFSetRamAddress (PAsic chip, unsigned int dwStartAddr, unsigned int dwEndAddr,
|
|
|
|
SANE_Byte byAccessTarget)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte * pStartAddr = (SANE_Byte *) & dwStartAddr;
|
|
|
|
SANE_Byte * pEndAddr = (SANE_Byte *) & dwEndAddr;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "LLFSetRamAddress:Enter\n");
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* Set start address. */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_A0_HostStartAddr0_7, *(pStartAddr));
|
|
|
|
Mustek_SendData (chip, ES01_A1_HostStartAddr8_15, *(pStartAddr + 1));
|
|
|
|
if (byAccessTarget == ACCESS_DRAM)
|
|
|
|
Mustek_SendData (chip, ES01_A2_HostStartAddr16_21,
|
|
|
|
*(pStartAddr + 2) | ACCESS_DRAM);
|
|
|
|
else
|
|
|
|
Mustek_SendData (chip, ES01_A2_HostStartAddr16_21,
|
|
|
|
*(pStartAddr + 2) | ACCESS_GAMMA_RAM);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* Set end address. */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_A3_HostEndAddr0_7, *(pEndAddr));
|
|
|
|
Mustek_SendData (chip, ES01_A4_HostEndAddr8_15, *(pEndAddr + 1));
|
|
|
|
Mustek_SendData (chip, ES01_A5_HostEndAddr16_21, *(pEndAddr + 2));
|
|
|
|
|
|
|
|
Mustek_ClearFIFO (chip);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "LLFSetRamAddress: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* ---------------------- medium level ASIC functions ---------------------- */
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
static STATUS
|
|
|
|
InitTiming (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "InitTiming: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
chip->Timing.AFE_ADCCLK_Timing = 1010580480;
|
|
|
|
chip->Timing.AFE_ADCVS_Timing = 12582912;
|
|
|
|
chip->Timing.AFE_ADCRS_Timing = 3072;
|
|
|
|
chip->Timing.AFE_ChannelA_LatchPos = 3080;
|
|
|
|
chip->Timing.AFE_ChannelB_LatchPos = 3602;
|
|
|
|
chip->Timing.AFE_ChannelC_LatchPos = 5634;
|
|
|
|
chip->Timing.AFE_ChannelD_LatchPos = 1546;
|
|
|
|
chip->Timing.AFE_Secondary_FF_LatchPos = 12;
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* sensor */
|
2005-10-03 13:27:03 +00:00
|
|
|
chip->Timing.CCD_DummyCycleTiming = 0;
|
2011-03-06 12:57:10 +00:00
|
|
|
chip->Timing.PHTG_PulseWidth = 12;
|
2005-10-03 13:27:03 +00:00
|
|
|
chip->Timing.PHTG_WaitWidth = 1;
|
|
|
|
chip->Timing.PHTG_TimingAdj = 1;
|
|
|
|
chip->Timing.PHTG_TimingSetup = 0;
|
|
|
|
chip->Timing.ChannelR_StartPixel = 100;
|
|
|
|
chip->Timing.ChannelR_EndPixel = 200;
|
|
|
|
chip->Timing.ChannelG_StartPixel = 100;
|
|
|
|
chip->Timing.ChannelG_EndPixel = 200;
|
|
|
|
chip->Timing.ChannelB_StartPixel = 100;
|
|
|
|
chip->Timing.ChannelB_EndPixel = 200;
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* 1200 dpi Timing */
|
2005-10-03 13:27:03 +00:00
|
|
|
chip->Timing.CCD_PH2_Timing_1200 = 1048320;
|
|
|
|
chip->Timing.CCD_PHRS_Timing_1200 = 983040;
|
|
|
|
chip->Timing.CCD_PHCP_Timing_1200 = 61440;
|
|
|
|
chip->Timing.CCD_PH1_Timing_1200 = 4293918720u;
|
|
|
|
chip->Timing.DE_CCD_SETUP_REGISTER_1200 = 32;
|
|
|
|
chip->Timing.wCCDPixelNumber_1200 = 11250;
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* 600 dpi Timing */
|
2005-10-03 13:27:03 +00:00
|
|
|
chip->Timing.CCD_PH2_Timing_600 = 1048320;
|
|
|
|
chip->Timing.CCD_PHRS_Timing_600 = 983040;
|
|
|
|
chip->Timing.CCD_PHCP_Timing_600 = 61440;
|
|
|
|
chip->Timing.CCD_PH1_Timing_600 = 4293918720u;
|
|
|
|
chip->Timing.DE_CCD_SETUP_REGISTER_600 = 0;
|
|
|
|
chip->Timing.wCCDPixelNumber_600 = 7500;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "InitTiming: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
OpenScanChip (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte x[4];
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "OpenScanChip: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
x[0] = 0x64;
|
|
|
|
x[1] = 0x64;
|
|
|
|
x[2] = 0x64;
|
|
|
|
x[3] = 0x64;
|
|
|
|
status = WriteIOControl (chip, 0x90, 0, 4, x);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
return status;
|
|
|
|
|
|
|
|
x[0] = 0x65;
|
|
|
|
x[1] = 0x65;
|
|
|
|
x[2] = 0x65;
|
|
|
|
x[3] = 0x65;
|
|
|
|
status = WriteIOControl (chip, 0x90, 0, 4, x);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
return status;
|
|
|
|
|
|
|
|
x[0] = 0x44;
|
|
|
|
x[1] = 0x44;
|
|
|
|
x[2] = 0x44;
|
|
|
|
x[3] = 0x44;
|
|
|
|
status = WriteIOControl (chip, 0x90, 0, 4, x);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
return status;
|
|
|
|
|
|
|
|
x[0] = 0x45;
|
|
|
|
x[1] = 0x45;
|
|
|
|
x[2] = 0x45;
|
|
|
|
x[3] = 0x45;
|
|
|
|
status = WriteIOControl (chip, 0x90, 0, 4, x);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "OpenScanChip: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
CloseScanChip (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte x[4];
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "CloseScanChip: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
x[0] = 0x64;
|
|
|
|
x[1] = 0x64;
|
|
|
|
x[2] = 0x64;
|
|
|
|
x[3] = 0x64;
|
|
|
|
status = WriteIOControl (chip, 0x90, 0, 4, x);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
return status;
|
|
|
|
|
|
|
|
x[0] = 0x65;
|
|
|
|
x[1] = 0x65;
|
|
|
|
x[2] = 0x65;
|
|
|
|
x[3] = 0x65;
|
|
|
|
status = WriteIOControl (chip, 0x90, 0, 4, x);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
return status;
|
|
|
|
|
|
|
|
x[0] = 0x16;
|
|
|
|
x[1] = 0x16;
|
|
|
|
x[2] = 0x16;
|
|
|
|
x[3] = 0x16;
|
|
|
|
status = WriteIOControl (chip, 0x90, 0, 4, x);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
return status;
|
|
|
|
|
|
|
|
x[0] = 0x17;
|
|
|
|
x[1] = 0x17;
|
|
|
|
x[2] = 0x17;
|
|
|
|
x[3] = 0x17;
|
|
|
|
status = WriteIOControl (chip, 0x90, 0, 4, x);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "CloseScanChip: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
SafeInitialChip (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SafeInitialChip: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_F3_ActionOption, 0);
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_86_DisableAllClockWhenIdle, 0);
|
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
status = Asic_WaitUnitReady (chip);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "isFirstOpenChip=%d\n", chip->isFirstOpenChip);
|
|
|
|
if (chip->isFirstOpenChip)
|
|
|
|
{
|
|
|
|
status = DRAM_Test (chip);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "DRAM_Test: Error\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
chip->isFirstOpenChip = FALSE;
|
|
|
|
}
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "SafeInitialChip: exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
DRAM_Test (PAsic chip)
|
|
|
|
{
|
2011-03-06 15:18:18 +00:00
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 14:39:23 +00:00
|
|
|
SANE_Byte temps[DRAM_TEST_SIZE];
|
2005-10-03 13:27:03 +00:00
|
|
|
unsigned int i;
|
|
|
|
|
2011-03-06 14:39:23 +00:00
|
|
|
DBG (DBG_ASIC, "DRAM_Test: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 14:39:23 +00:00
|
|
|
for (i = 0; i < sizeof(temps); i++)
|
|
|
|
temps[i] = i;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
status = Mustek_SendData (chip, ES01_A0_HostStartAddr0_7, 0x00);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
status = Mustek_SendData (chip, ES01_A1_HostStartAddr8_15, 0x00);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
status =
|
|
|
|
Mustek_SendData (chip, ES01_A2_HostStartAddr16_21, 0x00 | ACCESS_DRAM);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 14:39:23 +00:00
|
|
|
status = Mustek_SendData (chip, ES01_79_AFEMCLK_SDRAMCLK_DELAY_CONTROL,
|
2005-10-03 13:27:03 +00:00
|
|
|
SDRAMCLK_DELAY_12_ns);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 14:39:23 +00:00
|
|
|
status = Mustek_SendData (chip, ES01_A3_HostEndAddr0_7, 0xff);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
status = Mustek_SendData (chip, ES01_A4_HostEndAddr8_15, 0xff);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
status = Mustek_SendData (chip, ES01_A5_HostEndAddr16_21, 0xff);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 14:39:23 +00:00
|
|
|
status = Mustek_DMAWrite (chip, sizeof(temps), temps);
|
2005-10-03 13:27:03 +00:00
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "Mustek_DMAWrite error\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = Mustek_SendData (chip, ES01_A0_HostStartAddr0_7, 0x00);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
status = Mustek_SendData (chip, ES01_A1_HostStartAddr8_15, 0x00);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
status =
|
|
|
|
Mustek_SendData (chip, ES01_A2_HostStartAddr16_21, 0x00 | ACCESS_DRAM);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
status = Mustek_SendData (chip, ES01_A3_HostEndAddr0_7, 0xff);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
status = Mustek_SendData (chip, ES01_A4_HostEndAddr8_15, 0xff);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
status = Mustek_SendData (chip, ES01_A5_HostEndAddr16_21, 0xff);
|
|
|
|
if (status != STATUS_GOOD)
|
2011-03-06 14:39:23 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 14:39:23 +00:00
|
|
|
memset (temps, 0, sizeof(temps));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 14:39:23 +00:00
|
|
|
status = Mustek_DMARead (chip, sizeof(temps), temps);
|
2005-10-03 13:27:03 +00:00
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
2011-03-06 14:39:23 +00:00
|
|
|
DBG (DBG_ASIC, "Mustek_DMARead error\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2011-03-06 14:39:23 +00:00
|
|
|
for (i = 0; i < sizeof(temps); i++)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
2011-03-06 14:39:23 +00:00
|
|
|
if (temps[i] != i)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
2011-03-06 14:39:23 +00:00
|
|
|
DBG (DBG_ERR, "DRAM test error at offset %d\n", i);
|
2005-10-03 13:27:03 +00:00
|
|
|
return STATUS_IO_ERROR;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "DRAM_Text: Exit\n");
|
2011-03-06 15:18:18 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
SetLineTimeAndExposure (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetLineTimeAndExposure: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (chip->firmwarestate < FS_OPENED)
|
|
|
|
OpenScanChip (chip);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_C4_MultiTGTimesRed, 0);
|
|
|
|
Mustek_SendData (chip, ES01_C5_MultiTGTimesGreen, 0);
|
|
|
|
Mustek_SendData (chip, ES01_C6_MultiTGTimesBlue, 0);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_C7_MultiTGDummyPixelNumberLSB, 0);
|
|
|
|
Mustek_SendData (chip, ES01_C8_MultiTGDummyPixelNumberMSB, 0);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_C9_CCDDummyPixelNumberLSB, 0);
|
|
|
|
Mustek_SendData (chip, ES01_CA_CCDDummyPixelNumberMSB, 0);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_CB_CCDDummyCycleNumber, 0);
|
|
|
|
|
|
|
|
|
|
|
|
chip->firmwarestate = FS_OPENED;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetLineTimeAndExposure: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
CCDTiming (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned int dwPH1, dwPH2, dwPHRS, dwPHCP;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "CCDTiming: Enter\n");
|
2011-03-08 22:10:57 +00:00
|
|
|
DBG (DBG_ASIC, "dpi=%d\n", chip->Dpi);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (chip->firmwarestate < FS_OPENED)
|
|
|
|
OpenScanChip (chip);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_82_AFE_ADCCLK_TIMING_ADJ_BYTE0,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCCLK_Timing));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_83_AFE_ADCCLK_TIMING_ADJ_BYTE1,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCCLK_Timing >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_84_AFE_ADCCLK_TIMING_ADJ_BYTE2,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCCLK_Timing >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_85_AFE_ADCCLK_TIMING_ADJ_BYTE3,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCCLK_Timing >> 24));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_1F0_AFERS_TIMING_ADJ_B0,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCRS_Timing));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1F1_AFERS_TIMING_ADJ_B1,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCRS_Timing >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1F2_AFERS_TIMING_ADJ_B2,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCRS_Timing >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1F3_AFERS_TIMING_ADJ_B3,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCRS_Timing >> 24));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_1EC_AFEVS_TIMING_ADJ_B0,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCVS_Timing));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1ED_AFEVS_TIMING_ADJ_B1,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCVS_Timing >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1EE_AFEVS_TIMING_ADJ_B2,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCVS_Timing >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1EF_AFEVS_TIMING_ADJ_B3,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.AFE_ADCVS_Timing >> 24));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_160_CHANNEL_A_LATCH_POSITION_HB,
|
|
|
|
HIBYTE (chip->Timing.AFE_ChannelA_LatchPos));
|
|
|
|
Mustek_SendData (chip, ES01_161_CHANNEL_A_LATCH_POSITION_LB,
|
|
|
|
LOBYTE (chip->Timing.AFE_ChannelA_LatchPos));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_162_CHANNEL_B_LATCH_POSITION_HB,
|
|
|
|
HIBYTE (chip->Timing.AFE_ChannelB_LatchPos));
|
|
|
|
Mustek_SendData (chip, ES01_163_CHANNEL_B_LATCH_POSITION_LB,
|
|
|
|
LOBYTE (chip->Timing.AFE_ChannelB_LatchPos));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_164_CHANNEL_C_LATCH_POSITION_HB,
|
|
|
|
HIBYTE (chip->Timing.AFE_ChannelC_LatchPos));
|
|
|
|
Mustek_SendData (chip, ES01_165_CHANNEL_C_LATCH_POSITION_LB,
|
|
|
|
LOBYTE (chip->Timing.AFE_ChannelC_LatchPos));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_166_CHANNEL_D_LATCH_POSITION_HB,
|
|
|
|
HIBYTE (chip->Timing.AFE_ChannelD_LatchPos));
|
|
|
|
Mustek_SendData (chip, ES01_167_CHANNEL_D_LATCH_POSITION_LB,
|
|
|
|
LOBYTE (chip->Timing.AFE_ChannelD_LatchPos));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_168_SECONDARY_FF_LATCH_POSITION,
|
|
|
|
chip->Timing.AFE_Secondary_FF_LatchPos);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_1D0_DUMMY_CYCLE_TIMING_B0,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.CCD_DummyCycleTiming));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1D1_DUMMY_CYCLE_TIMING_B1,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.CCD_DummyCycleTiming >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1D2_DUMMY_CYCLE_TIMING_B2,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.CCD_DummyCycleTiming >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1D3_DUMMY_CYCLE_TIMING_B3,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->Timing.CCD_DummyCycleTiming >> 24));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 12:57:10 +00:00
|
|
|
if (chip->Dpi >= 1200)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
dwPH1 = chip->Timing.CCD_PH1_Timing_1200;
|
|
|
|
dwPH2 = chip->Timing.CCD_PH2_Timing_1200;
|
|
|
|
dwPHRS = chip->Timing.CCD_PHRS_Timing_1200;
|
|
|
|
dwPHCP = chip->Timing.CCD_PHCP_Timing_1200;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
dwPH1 = chip->Timing.CCD_PH1_Timing_600;
|
|
|
|
dwPH2 = chip->Timing.CCD_PH2_Timing_600;
|
|
|
|
dwPHRS = chip->Timing.CCD_PHRS_Timing_600;
|
|
|
|
dwPHCP = chip->Timing.CCD_PHCP_Timing_600;
|
|
|
|
}
|
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
Mustek_SendData (chip, ES01_1D4_PH1_TIMING_ADJ_B0, (SANE_Byte) (dwPH1));
|
|
|
|
Mustek_SendData (chip, ES01_1D5_PH1_TIMING_ADJ_B1, (SANE_Byte) (dwPH1 >> 8));
|
|
|
|
Mustek_SendData (chip, ES01_1D6_PH1_TIMING_ADJ_B2, (SANE_Byte) (dwPH1 >> 16));
|
|
|
|
Mustek_SendData (chip, ES01_1D7_PH1_TIMING_ADJ_B3, (SANE_Byte) (dwPH1 >> 24));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* set CCD ph1 ph2 rs cp */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_D0_PH1_0, 0);
|
|
|
|
Mustek_SendData (chip, ES01_D1_PH2_0, 4);
|
|
|
|
Mustek_SendData (chip, ES01_D4_PHRS_0, 0);
|
|
|
|
Mustek_SendData (chip, ES01_D5_PHCP_0, 0);
|
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
Mustek_SendData (chip, ES01_1D8_PH2_TIMING_ADJ_B0, (SANE_Byte) (dwPH2));
|
|
|
|
Mustek_SendData (chip, ES01_1D9_PH2_TIMING_ADJ_B1, (SANE_Byte) (dwPH2 >> 8));
|
|
|
|
Mustek_SendData (chip, ES01_1DA_PH2_TIMING_ADJ_B2, (SANE_Byte) (dwPH2 >> 16));
|
|
|
|
Mustek_SendData (chip, ES01_1DB_PH2_TIMING_ADJ_B3, (SANE_Byte) (dwPH2 >> 24));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
Mustek_SendData (chip, ES01_1E4_PHRS_TIMING_ADJ_B0, (SANE_Byte) (dwPHRS));
|
|
|
|
Mustek_SendData (chip, ES01_1E5_PHRS_TIMING_ADJ_B1, (SANE_Byte) (dwPHRS >> 8));
|
|
|
|
Mustek_SendData (chip, ES01_1E6_PHRS_TIMING_ADJ_B2, (SANE_Byte) (dwPHRS >> 16));
|
|
|
|
Mustek_SendData (chip, ES01_1E7_PHRS_TIMING_ADJ_B3, (SANE_Byte) (dwPHRS >> 24));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
Mustek_SendData (chip, ES01_1E8_PHCP_TIMING_ADJ_B0, (SANE_Byte) (dwPHCP));
|
|
|
|
Mustek_SendData (chip, ES01_1E9_PHCP_TIMING_ADJ_B1, (SANE_Byte) (dwPHCP >> 8));
|
|
|
|
Mustek_SendData (chip, ES01_1EA_PHCP_TIMING_ADJ_B2, (SANE_Byte) (dwPHCP >> 16));
|
|
|
|
Mustek_SendData (chip, ES01_1EB_PHCP_TIMING_ADJ_B3, (SANE_Byte) (dwPHCP >> 24));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
chip->firmwarestate = FS_OPENED;
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "CCDTiming: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-06 15:18:18 +00:00
|
|
|
IsCarriageHome (PAsic chip, SANE_Bool * LampHome)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte temp;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "IsCarriageHome: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
status = GetChipStatus (chip, H1H0L1L0_PS_MJ, &temp);
|
2005-10-03 13:27:03 +00:00
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "IsCarriageHome: Error!\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((temp & SENSOR0_DETECTED) == SENSOR0_DETECTED)
|
|
|
|
*LampHome = TRUE;
|
|
|
|
else
|
2011-03-06 15:18:18 +00:00
|
|
|
*LampHome = FALSE;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "LampHome=%d\n", *LampHome);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "IsCarriageHome: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
GetChipStatus (PAsic chip, SANE_Byte Selector, SANE_Byte * ChipStatus)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "GetChipStatus: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
status = Mustek_SendData (chip, ES01_8B_Status, Selector);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
return status;
|
|
|
|
|
|
|
|
status = Mustek_WriteAddressLineForRegister (chip, ES01_8B_Status);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
return status;
|
|
|
|
|
|
|
|
status = Mustek_ReceiveData (chip, ChipStatus);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
return status;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "GetChipStatus: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
SetAFEGainOffset (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
|
|
|
int i = 0;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetAFEGainOffset: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (chip->AD.DirectionR)
|
2011-03-08 22:10:57 +00:00
|
|
|
{ /* negative */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_60_AFE_AUTO_GAIN_OFFSET_RED_LB,
|
|
|
|
(chip->AD.GainR << 1) | 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_61_AFE_AUTO_GAIN_OFFSET_RED_HB,
|
|
|
|
chip->AD.OffsetR);
|
|
|
|
}
|
|
|
|
else
|
2011-03-08 22:10:57 +00:00
|
|
|
{ /* positive */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_60_AFE_AUTO_GAIN_OFFSET_RED_LB,
|
|
|
|
(chip->AD.GainR << 1));
|
|
|
|
Mustek_SendData (chip, ES01_61_AFE_AUTO_GAIN_OFFSET_RED_HB,
|
|
|
|
chip->AD.OffsetR);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chip->AD.DirectionG)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_62_AFE_AUTO_GAIN_OFFSET_GREEN_LB,
|
|
|
|
(chip->AD.GainG << 1) | 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_63_AFE_AUTO_GAIN_OFFSET_GREEN_HB,
|
|
|
|
chip->AD.OffsetG);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_62_AFE_AUTO_GAIN_OFFSET_GREEN_LB,
|
|
|
|
(chip->AD.GainG << 1));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_63_AFE_AUTO_GAIN_OFFSET_GREEN_HB,
|
|
|
|
chip->AD.OffsetG);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chip->AD.DirectionB)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_64_AFE_AUTO_GAIN_OFFSET_BLUE_LB,
|
|
|
|
(chip->AD.GainB << 1) | 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_65_AFE_AUTO_GAIN_OFFSET_BLUE_HB,
|
|
|
|
chip->AD.OffsetB);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_64_AFE_AUTO_GAIN_OFFSET_BLUE_LB,
|
|
|
|
(chip->AD.GainB << 1));
|
|
|
|
Mustek_SendData (chip, ES01_65_AFE_AUTO_GAIN_OFFSET_BLUE_HB,
|
|
|
|
chip->AD.OffsetB);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_2A0_AFE_GAIN_OFFSET_CONTROL, 0x01);
|
|
|
|
|
|
|
|
for (i = 0; i < 4; i++)
|
|
|
|
{
|
|
|
|
if (chip->AD.DirectionR == 0)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_2A1_AFE_AUTO_CONFIG_GAIN,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.GainR << 1));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_2A2_AFE_AUTO_CONFIG_OFFSET,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.OffsetR));
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_2A1_AFE_AUTO_CONFIG_GAIN,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.GainR << 1) | 0x01);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_2A2_AFE_AUTO_CONFIG_OFFSET,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.OffsetR));
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < 4; i++)
|
|
|
|
{
|
|
|
|
if (chip->AD.DirectionG == 0)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_2A1_AFE_AUTO_CONFIG_GAIN,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.GainG << 1));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_2A2_AFE_AUTO_CONFIG_OFFSET,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.OffsetG));
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_2A1_AFE_AUTO_CONFIG_GAIN,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.GainG << 1) | 0x01);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_2A2_AFE_AUTO_CONFIG_OFFSET,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.OffsetG));
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < 4; i++)
|
|
|
|
{
|
|
|
|
if (chip->AD.DirectionB == 0)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_2A1_AFE_AUTO_CONFIG_GAIN,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.GainB << 1));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_2A2_AFE_AUTO_CONFIG_OFFSET,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.OffsetB));
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_2A1_AFE_AUTO_CONFIG_GAIN,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.GainB << 1) | 0x01);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_2A2_AFE_AUTO_CONFIG_OFFSET,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (chip->AD.OffsetB));
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < 36; i++)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_2A1_AFE_AUTO_CONFIG_GAIN, 0);
|
|
|
|
Mustek_SendData (chip, ES01_2A2_AFE_AUTO_CONFIG_OFFSET, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_2A0_AFE_GAIN_OFFSET_CONTROL, 0x00);
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* set to AFE */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_04_ADAFEPGACH1, chip->AD.GainR);
|
|
|
|
Mustek_SendData (chip, ES01_06_ADAFEPGACH2, chip->AD.GainG);
|
|
|
|
Mustek_SendData (chip, ES01_08_ADAFEPGACH3, chip->AD.GainB);
|
|
|
|
|
|
|
|
if (chip->AD.DirectionR)
|
|
|
|
Mustek_SendData (chip, ES01_0B_AD9826OffsetRedN, chip->AD.OffsetR);
|
|
|
|
else
|
|
|
|
Mustek_SendData (chip, ES01_0A_AD9826OffsetRedP, chip->AD.OffsetR);
|
|
|
|
|
|
|
|
if (chip->AD.DirectionG)
|
|
|
|
Mustek_SendData (chip, ES01_0D_AD9826OffsetGreenN, chip->AD.OffsetG);
|
|
|
|
else
|
|
|
|
Mustek_SendData (chip, ES01_0C_AD9826OffsetGreenP, chip->AD.OffsetG);
|
|
|
|
|
|
|
|
if (chip->AD.DirectionB)
|
|
|
|
Mustek_SendData (chip, ES01_0F_AD9826OffsetBlueN, chip->AD.OffsetB);
|
|
|
|
else
|
|
|
|
Mustek_SendData (chip, ES01_0E_AD9826OffsetBlueP, chip->AD.OffsetB);
|
|
|
|
|
|
|
|
|
|
|
|
LLFSetRamAddress (chip, 0x0, PackAreaStartAddress - (512 * 8 - 1),
|
|
|
|
ACCESS_DRAM);
|
|
|
|
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_F3_ActionOption, SCAN_ENABLE |
|
|
|
|
UNIFORM_MOTOR_AND_SCAN_SPEED_ENABLE);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_9A_AFEControl, AD9826_AFE);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_00_ADAFEConfiguration, 0x70);
|
|
|
|
Mustek_SendData (chip, ES01_02_ADAFEMuxConfig, 0x80);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetAFEGainOffset: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
SetLEDTime (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetLEDTime: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_B8_ChannelRedExpStartPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelR_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_B9_ChannelRedExpStartPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelR_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_BA_ChannelRedExpEndPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelR_EndPixel));
|
|
|
|
Mustek_SendData (chip, ES01_BB_ChannelRedExpEndPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelR_EndPixel));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_BC_ChannelGreenExpStartPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelG_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_BD_ChannelGreenExpStartPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelG_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_BE_ChannelGreenExpEndPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelG_EndPixel));
|
|
|
|
Mustek_SendData (chip, ES01_BF_ChannelGreenExpEndPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelG_EndPixel));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_C0_ChannelBlueExpStartPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelB_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_C1_ChannelBlueExpStartPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelB_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_C2_ChannelBlueExpEndPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelB_EndPixel));
|
|
|
|
Mustek_SendData (chip, ES01_C3_ChannelBlueExpEndPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelB_EndPixel));
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetLEDTime: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
SetScanMode (PAsic chip, SANE_Byte bScanBits)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte temp_f5_register = 0;
|
|
|
|
SANE_Byte GrayBWChannel;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
DBG (DBG_ASIC, "SetScanMode(): Enter. Set F5 register\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (bScanBits >= 24)
|
2011-03-06 18:16:16 +00:00
|
|
|
temp_f5_register |= COLOR_ES02;
|
2005-10-03 13:27:03 +00:00
|
|
|
else
|
2011-03-06 18:16:16 +00:00
|
|
|
temp_f5_register |= GRAY_ES02;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if ((bScanBits == 8) || (bScanBits == 24))
|
2011-03-06 18:16:16 +00:00
|
|
|
temp_f5_register |= _8_BITS_ES02;
|
2005-10-03 13:27:03 +00:00
|
|
|
else if (bScanBits == 1)
|
2011-03-06 18:16:16 +00:00
|
|
|
temp_f5_register |= _1_BIT_ES02;
|
2005-10-03 13:27:03 +00:00
|
|
|
else
|
2011-03-06 18:16:16 +00:00
|
|
|
temp_f5_register |= _16_BITS_ES02;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (bScanBits < 24)
|
2011-03-06 18:16:16 +00:00
|
|
|
GrayBWChannel = 1;
|
2005-10-03 13:27:03 +00:00
|
|
|
else
|
2011-03-06 18:16:16 +00:00
|
|
|
GrayBWChannel = 4;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (GrayBWChannel == 0)
|
2011-03-06 18:16:16 +00:00
|
|
|
temp_f5_register |= GRAY_RED_ES02;
|
2005-10-03 13:27:03 +00:00
|
|
|
else if (GrayBWChannel == 1)
|
2011-03-06 18:16:16 +00:00
|
|
|
temp_f5_register |= GRAY_GREEN_ES02;
|
2005-10-03 13:27:03 +00:00
|
|
|
else if (GrayBWChannel == 2)
|
2011-03-06 18:16:16 +00:00
|
|
|
temp_f5_register |= GRAY_BLUE_ES02;
|
2005-10-03 13:27:03 +00:00
|
|
|
else
|
2011-03-06 18:16:16 +00:00
|
|
|
temp_f5_register |= GRAY_GREEN_BLUE_ES02;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
status = Mustek_SendData (chip, ES01_F5_ScanDataFormat, temp_f5_register);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "F5_ScanDataFormat=0x%x\n", temp_f5_register);
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetScanMode(): Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-06 18:16:16 +00:00
|
|
|
SetPackAddress (PAsic chip, unsigned short wWidth, unsigned short wX,
|
2005-10-03 13:27:03 +00:00
|
|
|
double XRatioAdderDouble, double XRatioTypeDouble,
|
2011-03-08 22:10:57 +00:00
|
|
|
SANE_Byte byClear_Pulse_Width,
|
|
|
|
unsigned short * PValidPixelNumber)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 18:16:16 +00:00
|
|
|
unsigned short ValidPixelNumber;
|
2005-10-03 13:27:03 +00:00
|
|
|
int i;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetPackAddress: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
ValidPixelNumber = (unsigned short) ((wWidth + 10 + 15) * XRatioAdderDouble);
|
2011-03-06 18:16:16 +00:00
|
|
|
ValidPixelNumber &= ~0x0f;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
for (i = 0; i < 16; i++)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_2B0_SEGMENT0_OVERLAP_SEGMENT1 + i,
|
2011-03-06 18:16:16 +00:00
|
|
|
0);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_2C0_VALID_PIXEL_PARAMETER_OF_SEGMENT1 + i,
|
|
|
|
0);
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_1B0_SEGMENT_PIXEL_NUMBER_LB,
|
|
|
|
LOBYTE (ValidPixelNumber));
|
|
|
|
Mustek_SendData (chip, ES01_1B1_SEGMENT_PIXEL_NUMBER_HB,
|
|
|
|
HIBYTE (ValidPixelNumber));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_169_NUMBER_OF_SEGMENT_PIXEL_LB,
|
|
|
|
LOBYTE (ValidPixelNumber));
|
|
|
|
Mustek_SendData (chip, ES01_16A_NUMBER_OF_SEGMENT_PIXEL_HB,
|
|
|
|
HIBYTE (ValidPixelNumber));
|
|
|
|
Mustek_SendData (chip, ES01_16B_BETWEEN_SEGMENT_INVALID_PIXEL, 0);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_B6_LineWidthPixelLSB,
|
|
|
|
LOBYTE (ValidPixelNumber));
|
|
|
|
Mustek_SendData (chip, ES01_B7_LineWidthPixelMSB,
|
|
|
|
HIBYTE (ValidPixelNumber));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_19A_CHANNEL_LINE_GAP_LB,
|
|
|
|
LOBYTE (ValidPixelNumber));
|
|
|
|
Mustek_SendData (chip, ES01_19B_CHANNEL_LINE_GAP_HB,
|
|
|
|
HIBYTE (ValidPixelNumber));
|
|
|
|
DBG (DBG_ASIC, "ValidPixelNumber=%d\n", ValidPixelNumber);
|
|
|
|
|
|
|
|
for (i = 0; i < 36; i++)
|
2011-03-06 18:16:16 +00:00
|
|
|
Mustek_SendData (chip, 0x270 + i, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, 0x270,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 2)));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, 0x271,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 2) >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, 0x272,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 2) >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, 0x27C,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 4)));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, 0x27D,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 4) >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, 0x27E,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 4) >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, 0x288,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 6)));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, 0x289,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 6) >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, 0x28A,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 6) >> 16));
|
|
|
|
DBG (DBG_ASIC, "channel gap=%d\n", ValidPixelNumber * 2);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
Mustek_SendData (chip, ES01_B4_StartPixelLSB, LOBYTE (wX));
|
|
|
|
Mustek_SendData (chip, ES01_B5_StartPixelMSB, HIBYTE (wX));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_1B9_LINE_PIXEL_NUMBER_LB,
|
2011-03-06 18:16:16 +00:00
|
|
|
LOBYTE (XRatioTypeDouble * (ValidPixelNumber - 1)));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1BA_LINE_PIXEL_NUMBER_HB,
|
2011-03-06 18:16:16 +00:00
|
|
|
HIBYTE (XRatioTypeDouble * (ValidPixelNumber - 1)));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
/* final start read out pixel */
|
2011-03-06 18:16:16 +00:00
|
|
|
Mustek_SendData (chip, ES01_1F4_START_READ_OUT_PIXEL_LB, 0);
|
|
|
|
Mustek_SendData (chip, ES01_1F5_START_READ_OUT_PIXEL_HB, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
if (wWidth > (ValidPixelNumber - 10))
|
|
|
|
DBG (DBG_ERR, "read out pixel greater than max pixel! image will shift!\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
/* final read pixel width */
|
|
|
|
Mustek_SendData (chip, ES01_1F6_READ_OUT_PIXEL_LENGTH_LB,
|
|
|
|
LOBYTE (wWidth + 9));
|
|
|
|
Mustek_SendData (chip, ES01_1F7_READ_OUT_PIXEL_LENGTH_HB,
|
|
|
|
HIBYTE (wWidth + 9));
|
|
|
|
|
|
|
|
/* data output sequence */
|
|
|
|
Mustek_SendData (chip, ES01_1F8_PACK_CHANNEL_SELECT_B0, 0);
|
|
|
|
Mustek_SendData (chip, ES01_1F9_PACK_CHANNEL_SELECT_B1, 0);
|
|
|
|
Mustek_SendData (chip, ES01_1FA_PACK_CHANNEL_SELECT_B2, 0x18);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_1FB_PACK_CHANNEL_SIZE_B0,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 2)));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1FC_PACK_CHANNEL_SIZE_B1,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 2) >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1FD_PACK_CHANNEL_SIZE_B2,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((ValidPixelNumber * 2) >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_16C_LINE_SHIFT_OUT_TIMES_DIRECTION, 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_1CE_LINE_SEGMENT_NUMBER, 0x00);
|
|
|
|
Mustek_SendData (chip, ES01_D8_PHTG_EDGE_TIMING_ADJUST, 0x17);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_D9_CLEAR_PULSE_WIDTH, byClear_Pulse_Width);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_DA_CLEAR_SIGNAL_INVERTING_OUTPUT, 0x54 | 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_CD_TG_R_CONTROL, 0x3C);
|
|
|
|
Mustek_SendData (chip, ES01_CE_TG_G_CONTROL, 0);
|
|
|
|
Mustek_SendData (chip, ES01_CF_TG_B_CONTROL, 0x3C);
|
|
|
|
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* set pack area address */
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "PackAreaStartAddress=%d\n", PackAreaStartAddress);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_16D_EXPOSURE_CYCLE1_SEGMENT1_START_ADDR_BYTE0,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress + 0)));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_16E_EXPOSURE_CYCLE1_SEGMENT1_START_ADDR_BYTE1,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress + 0) >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_16F_EXPOSURE_CYCLE1_SEGMENT1_START_ADDR_BYTE2,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress + 0) >> 16));
|
|
|
|
|
|
|
|
for ( i = ES01_170_EXPOSURE_CYCLE1_SEGMENT2_START_ADDR_BYTE0;
|
|
|
|
i <= ES01_18E_EXPOSURE_CYCLE3_SEGMENT4_START_ADDR_BYTE0; i += 3)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, i,
|
|
|
|
(SANE_Byte) ((PackAreaStartAddress + 0xC0000)));
|
|
|
|
Mustek_SendData (chip, i + 1,
|
|
|
|
(SANE_Byte) ((PackAreaStartAddress + 0xC0000) >> 8));
|
|
|
|
Mustek_SendData (chip, i + 2,
|
|
|
|
(SANE_Byte) ((PackAreaStartAddress + 0xC0000) >> 16));
|
|
|
|
}
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "set PackAreaStartAddress ok\n");
|
|
|
|
|
|
|
|
for (i = 0; i < 16; i++)
|
|
|
|
Mustek_SendData (chip, 0x260 + i, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
DBG (DBG_ASIC, "Set Invalid Pixel ok\n");
|
|
|
|
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* set pack start address */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_19E_PACK_AREA_R_START_ADDR_BYTE0,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) (PackAreaStartAddress));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_19F_PACK_AREA_R_START_ADDR_BYTE1,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) (PackAreaStartAddress >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1A0_PACK_AREA_R_START_ADDR_BYTE2,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) (PackAreaStartAddress >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_1A1_PACK_AREA_G_START_ADDR_BYTE0,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 2))));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1A2_PACK_AREA_G_START_ADDR_BYTE1,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 2)) >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1A3_PACK_AREA_G_START_ADDR_BYTE2,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 2)) >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_1A4_PACK_AREA_B_START_ADDR_BYTE0,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 4))));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1A5_PACK_AREA_B_START_ADDR_BYTE1,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 4)) >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1A6_PACK_AREA_B_START_ADDR_BYTE2,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 4)) >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* set pack end address */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1A7_PACK_AREA_R_END_ADDR_BYTE0,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 2 - 1))));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1A8_PACK_AREA_R_END_ADDR_BYTE1,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 2 - 1)) >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1A9_PACK_AREA_R_END_ADDR_BYTE2,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 2 - 1)) >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_1AA_PACK_AREA_G_END_ADDR_BYTE0,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 4 - 1))));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1AB_PACK_AREA_G_END_ADDR_BYTE1,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 4 - 1)) >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1AC_PACK_AREA_G_END_ADDR_BYTE2,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 4 - 1)) >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_1AD_PACK_AREA_B_END_ADDR_BYTE0,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 6 - 1))));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1AE_PACK_AREA_B_END_ADDR_BYTE1,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 6 - 1)) >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_1AF_PACK_AREA_B_END_ADDR_BYTE2,
|
2011-03-06 18:16:16 +00:00
|
|
|
(SANE_Byte) ((PackAreaStartAddress +
|
|
|
|
(ValidPixelNumber * 6 - 1)) >> 16));
|
|
|
|
DBG (DBG_ASIC, "PackAreaStartAddress + (ValidPixelNumber*2)=%d\n",
|
|
|
|
(PackAreaStartAddress + (ValidPixelNumber * 2)));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
Mustek_SendData (chip, ES01_19C_MAX_PACK_LINE, 2);
|
|
|
|
status = Mustek_SendData (chip, ES01_19D_PACK_THRESHOLD_LINE, 1);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
*PValidPixelNumber = ValidPixelNumber;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetPackAddress: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-08 22:10:57 +00:00
|
|
|
SetExtraSetting (PAsic chip, unsigned short wXResolution,
|
|
|
|
unsigned short wCCD_PixelNumber, SANE_Bool isCalibrate)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte temp_ff_register = 0;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetExtraSetting: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_B8_ChannelRedExpStartPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelR_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_B9_ChannelRedExpStartPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelR_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_BA_ChannelRedExpEndPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelR_EndPixel));
|
|
|
|
Mustek_SendData (chip, ES01_BB_ChannelRedExpEndPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelR_EndPixel));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_BC_ChannelGreenExpStartPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelG_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_BD_ChannelGreenExpStartPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelG_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_BE_ChannelGreenExpEndPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelG_EndPixel));
|
|
|
|
Mustek_SendData (chip, ES01_BF_ChannelGreenExpEndPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelG_EndPixel));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_C0_ChannelBlueExpStartPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelB_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_C1_ChannelBlueExpStartPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelB_StartPixel));
|
|
|
|
Mustek_SendData (chip, ES01_C2_ChannelBlueExpEndPixelLSB,
|
|
|
|
LOBYTE (chip->Timing.ChannelB_EndPixel));
|
|
|
|
Mustek_SendData (chip, ES01_C3_ChannelBlueExpEndPixelMSB,
|
|
|
|
HIBYTE (chip->Timing.ChannelB_EndPixel));
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
Mustek_SendData (chip, ES01_B2_PHTGPulseWidth, chip->Timing.PHTG_PulseWidth);
|
|
|
|
Mustek_SendData (chip, ES01_B3_PHTGWaitWidth, chip->Timing.PHTG_WaitWidth);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_CC_PHTGTimingAdjust,
|
|
|
|
chip->Timing.PHTG_TimingAdj);
|
|
|
|
Mustek_SendData (chip, ES01_D0_PH1_0, chip->Timing.PHTG_TimingSetup);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "ChannelR_StartPixel=%d,ChannelR_EndPixel=%d\n",
|
|
|
|
chip->Timing.ChannelR_StartPixel, chip->Timing.ChannelR_EndPixel);
|
|
|
|
|
|
|
|
if (wXResolution == 1200)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_DE_CCD_SETUP_REGISTER,
|
|
|
|
chip->Timing.DE_CCD_SETUP_REGISTER_1200);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_DE_CCD_SETUP_REGISTER,
|
|
|
|
chip->Timing.DE_CCD_SETUP_REGISTER_600);
|
|
|
|
}
|
|
|
|
|
|
|
|
temp_ff_register |= BYPASS_PRE_GAMMA_ENABLE;
|
|
|
|
temp_ff_register |= BYPASS_CONVOLUTION_ENABLE;
|
|
|
|
temp_ff_register |= BYPASS_MATRIX_ENABLE;
|
|
|
|
temp_ff_register |= BYPASS_GAMMA_ENABLE;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
if (isCalibrate == TRUE)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
2011-03-06 18:16:16 +00:00
|
|
|
temp_ff_register |= BYPASS_DARK_SHADING_ENABLE;
|
|
|
|
temp_ff_register |= BYPASS_WHITE_SHADING_ENABLE;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
Mustek_SendData (chip, ES01_FF_SCAN_IMAGE_OPTION, temp_ff_register);
|
|
|
|
DBG (DBG_ASIC, "FF_SCAN_IMAGE_OPTION=0x%x\n", temp_ff_register);
|
|
|
|
|
|
|
|
/* pixel process time */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_B0_CCDPixelLSB, LOBYTE (wCCD_PixelNumber));
|
|
|
|
Mustek_SendData (chip, ES01_B1_CCDPixelMSB, HIBYTE (wCCD_PixelNumber));
|
|
|
|
Mustek_SendData (chip, ES01_DF_ICG_CONTROL, 0x17);
|
|
|
|
DBG (DBG_ASIC, "wCCD_PixelNumber=%d\n", wCCD_PixelNumber);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
Mustek_SendData (chip, ES01_88_LINE_ART_THRESHOLD_HIGH_VALUE, 128);
|
|
|
|
Mustek_SendData (chip, ES01_89_LINE_ART_THRESHOLD_LOW_VALUE, 127);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
usleep (50000);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "SetExtraSetting: Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* ---------------------- high level asic functions ------------------------ */
|
|
|
|
|
|
|
|
|
|
|
|
/* HOLD: We don't want to have global vid/pids */
|
2011-03-06 15:18:18 +00:00
|
|
|
static const unsigned short ProductID = 0x0409;
|
|
|
|
static const unsigned short VendorID = 0x055f;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
static SANE_String_Const device_name;
|
|
|
|
|
|
|
|
static SANE_Status
|
|
|
|
attach_one_scanner (SANE_String_Const devname)
|
|
|
|
{
|
|
|
|
DBG (DBG_INFO, "attach_one_scanner: devname = %s\n", devname);
|
|
|
|
device_name = devname;
|
|
|
|
return SANE_STATUS_GOOD;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-06 00:03:14 +00:00
|
|
|
Asic_Open (PAsic chip)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status;
|
|
|
|
SANE_Status sane_status;
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_Open: Enter\n");
|
|
|
|
|
|
|
|
device_name = NULL;
|
|
|
|
|
|
|
|
if (chip->firmwarestate > FS_OPENED)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "chip has been opened. fd=%d\n", chip->fd);
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
sanei_usb_init ();
|
|
|
|
|
|
|
|
sane_status =
|
|
|
|
sanei_usb_find_devices (VendorID, ProductID, attach_one_scanner);
|
|
|
|
if (sane_status != SANE_STATUS_GOOD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_Open: sanei_usb_find_devices failed: %s\n",
|
|
|
|
sane_strstatus (sane_status));
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
if (device_name == NULL)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_Open: no scanner found\n");
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
2011-03-06 18:16:16 +00:00
|
|
|
|
2005-10-03 13:27:03 +00:00
|
|
|
sane_status = sanei_usb_open (device_name, &chip->fd);
|
|
|
|
if (sane_status != SANE_STATUS_GOOD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_Open: sanei_usb_open of %s failed: %s\n",
|
|
|
|
device_name, sane_strstatus (sane_status));
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = OpenScanChip (chip);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
|
|
|
sanei_usb_close (chip->fd);
|
|
|
|
DBG (DBG_ASIC, "Asic_Open: OpenScanChip error\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_94_PowerSaveControl, 0x27);
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_86_DisableAllClockWhenIdle, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_79_AFEMCLK_SDRAMCLK_DELAY_CONTROL,
|
|
|
|
SDRAMCLK_DELAY_12_ns);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* SDRAM initialization sequence */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_87_SDRAM_Timing, 0xf1);
|
|
|
|
Mustek_SendData (chip, ES01_87_SDRAM_Timing, 0xa5);
|
|
|
|
Mustek_SendData (chip, ES01_87_SDRAM_Timing, 0x91);
|
|
|
|
Mustek_SendData (chip, ES01_87_SDRAM_Timing, 0x81);
|
|
|
|
Mustek_SendData (chip, ES01_87_SDRAM_Timing, 0xf0);
|
|
|
|
|
|
|
|
|
|
|
|
chip->firmwarestate = FS_OPENED;
|
|
|
|
Asic_WaitUnitReady (chip);
|
|
|
|
DBG (DBG_ASIC, "Asic_WaitUnitReady\n");
|
|
|
|
status = SafeInitialChip (chip);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_Open: SafeInitialChip error\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2011-03-06 00:03:14 +00:00
|
|
|
DBG (DBG_INFO, "Asic_Open: device %s successfully opened\n", device_name);
|
2005-10-03 13:27:03 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_Open: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
Asic_Close (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status;
|
|
|
|
DBG (DBG_ASIC, "Asic_Close: Enter\n");
|
|
|
|
|
|
|
|
if (chip->firmwarestate < FS_OPENED)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "Asic_Close: Scanner is not opened\n");
|
|
|
|
return STATUS_GOOD;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chip->firmwarestate > FS_OPENED)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC,
|
|
|
|
"Asic_Close: Scanner is scanning, try to stop scanning\n");
|
|
|
|
Asic_ScanStop (chip);
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_86_DisableAllClockWhenIdle,
|
|
|
|
CLOSE_ALL_CLOCK_ENABLE);
|
|
|
|
|
|
|
|
status = CloseScanChip (chip);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_Close: CloseScanChip error\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
sanei_usb_close (chip->fd);
|
|
|
|
chip->firmwarestate = FS_ATTACHED;
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_Close: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
Asic_TurnLamp (PAsic chip, SANE_Bool isLampOn)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte PWM;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_TurnLamp: Enter\n");
|
|
|
|
|
|
|
|
if (chip->firmwarestate < FS_OPENED)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_TurnLamp: Scanner is not opened\n");
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chip->firmwarestate > FS_OPENED)
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (isLampOn)
|
2011-03-06 18:16:16 +00:00
|
|
|
PWM = LAMP0_PWM_DEFAULT;
|
2005-10-03 13:27:03 +00:00
|
|
|
else
|
2011-03-06 18:16:16 +00:00
|
|
|
PWM = 0;
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_99_LAMP_PWM_FREQ_CONTROL, 1);
|
|
|
|
Mustek_SendData (chip, ES01_90_Lamp0PWM, PWM);
|
|
|
|
DBG (DBG_ASIC, "Lamp0 PWM = %d\n", PWM);
|
|
|
|
|
|
|
|
chip->firmwarestate = FS_OPENED;
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_TurnLamp: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
Asic_TurnTA (PAsic chip, SANE_Bool isTAOn)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte PWM;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_TurnTA: Enter\n");
|
|
|
|
|
|
|
|
if (chip->firmwarestate < FS_OPENED)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_TurnTA: Scanner is not opened\n");
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chip->firmwarestate > FS_OPENED)
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (isTAOn)
|
2011-03-06 18:16:16 +00:00
|
|
|
PWM = LAMP1_PWM_DEFAULT;
|
2005-10-03 13:27:03 +00:00
|
|
|
else
|
2011-03-06 18:16:16 +00:00
|
|
|
PWM = 0;
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_99_LAMP_PWM_FREQ_CONTROL, 1);
|
|
|
|
Mustek_SendData (chip, ES01_91_Lamp1PWM, PWM);
|
|
|
|
DBG (DBG_ASIC, "Lamp1 PWM = %d\n", PWM);
|
|
|
|
|
|
|
|
chip->firmwarestate = FS_OPENED;
|
2011-03-06 18:16:16 +00:00
|
|
|
|
2005-10-03 13:27:03 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_TurnTA: Exit\n");
|
|
|
|
return STATUS_GOOD;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
Asic_WaitUnitReady (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte temp_status;
|
2005-10-03 13:27:03 +00:00
|
|
|
int i = 0;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_WaitUnitReady: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (chip->firmwarestate < FS_OPENED)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_WaitUnitReady: Scanner has not been opened\n");
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
do
|
|
|
|
{
|
2011-03-11 01:08:46 +00:00
|
|
|
status = GetChipStatus (chip, SCAN_STATE, &temp_status);
|
2005-10-03 13:27:03 +00:00
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "WaitChipIdle: Error!\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
i++;
|
|
|
|
usleep (100000);
|
|
|
|
}
|
|
|
|
while (((temp_status & 0x1f) != 0) && i < 300);
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Waited %d s\n", (unsigned short) (i * 0.1));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_WaitUnitReady: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
Asic_Initialize (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_Initialize: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
chip->dwBytesCountPerRow = 0;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "isFirstOpenChip=%d, setting to TRUE\n", chip->isFirstOpenChip);
|
2005-10-03 13:27:03 +00:00
|
|
|
chip->isFirstOpenChip = TRUE;
|
|
|
|
|
|
|
|
chip->lpShadingTable = NULL;
|
|
|
|
chip->isMotorMove = MOTOR_0_ENABLE;
|
|
|
|
|
|
|
|
Asic_Reset (chip);
|
|
|
|
InitTiming (chip);
|
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
chip->isMotorMoveToFirstLine = MOTOR_MOVE_TO_FIRST_LINE_ENABLE;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
chip->UsbHost = HT_USB10;
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_Initialize: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
Asic_SetWindow (PAsic chip, SANE_Byte bScanBits,
|
|
|
|
unsigned short wXResolution, unsigned short wYResolution,
|
2011-03-08 22:10:57 +00:00
|
|
|
unsigned short wX, unsigned short wY, unsigned short wWidth,
|
|
|
|
unsigned short wLength)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short ValidPixelNumber;
|
|
|
|
|
|
|
|
unsigned short BytePerPixel = 0;
|
2011-03-06 19:19:27 +00:00
|
|
|
unsigned int dwTotalLineTheBufferNeed;
|
|
|
|
unsigned short wThinkCCDResolution;
|
|
|
|
unsigned short wCCD_PixelNumber;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short XRatioTypeWord;
|
2005-10-03 13:27:03 +00:00
|
|
|
double XRatioTypeDouble;
|
|
|
|
double XRatioAdderDouble;
|
|
|
|
|
2011-03-09 00:05:41 +00:00
|
|
|
LLF_MOTORMOVE lpMotorStepsTable;
|
2011-03-06 19:19:27 +00:00
|
|
|
SANE_Byte byDummyCycleNum;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short Total_MotorDPI;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short wMultiMotorStep = 1;
|
2011-03-06 12:57:10 +00:00
|
|
|
SANE_Byte bMotorMoveType = _4_TABLE_SPACE_FOR_FULL_STEP;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned int dwLinePixelReport;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short StartSpeed, EndSpeed;
|
2005-10-03 13:27:03 +00:00
|
|
|
LLF_CALCULATEMOTORTABLE CalMotorTable;
|
|
|
|
LLF_MOTOR_CURRENT_AND_PHASE CurrentPhase;
|
|
|
|
LLF_RAMACCESS RamAccess;
|
2011-03-06 19:19:27 +00:00
|
|
|
unsigned int dwEndAddr, dwTableBaseAddr, dwShadingTableAddr;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
SANE_Byte isMotorMoveToFirstLine = chip->isMotorMoveToFirstLine;
|
|
|
|
SANE_Byte isUniformSpeedToScan = 0;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte isScanBackTracking = SCAN_BACK_TRACKING_ENABLE;
|
|
|
|
unsigned short * lpMotorTable;
|
|
|
|
unsigned int RealTableSize;
|
2005-10-03 13:27:03 +00:00
|
|
|
double dbXRatioAdderDouble;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short wFullBank;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_SetWindow: Enter\n");
|
2011-03-08 22:10:57 +00:00
|
|
|
DBG (DBG_ASIC, "bScanBits=%d,wXResolution=%d,wYResolution=%d,wX=%d,wY=%d," \
|
|
|
|
"wWidth=%d,wLength=%d\n",
|
2005-10-03 13:27:03 +00:00
|
|
|
bScanBits, wXResolution, wYResolution, wX, wY, wWidth, wLength);
|
|
|
|
|
|
|
|
if (chip->firmwarestate != FS_OPENED)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_SetWindow: Scanner is not opened\n");
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_F3_ActionOption, 0);
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_86_DisableAllClockWhenIdle, 0);
|
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
status = Asic_WaitUnitReady (chip);
|
|
|
|
|
|
|
|
/* dummy clock mode */
|
|
|
|
Mustek_SendData (chip, 0x1CD, 0);
|
|
|
|
|
2011-03-06 19:19:27 +00:00
|
|
|
/* LED flash */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_94_PowerSaveControl, 0x27 | 64 | 128);
|
|
|
|
|
|
|
|
/* calculate byte per line */
|
|
|
|
if (bScanBits > 24)
|
|
|
|
{
|
|
|
|
BytePerPixel = 6;
|
2011-03-06 19:19:27 +00:00
|
|
|
chip->dwBytesCountPerRow = (unsigned int) wWidth * 6;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else if (bScanBits == 24)
|
|
|
|
{
|
|
|
|
BytePerPixel = 3;
|
2011-03-06 19:19:27 +00:00
|
|
|
chip->dwBytesCountPerRow = (unsigned int) wWidth * 3;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else if ((bScanBits > 8) && (bScanBits <= 16))
|
|
|
|
{
|
|
|
|
BytePerPixel = 2;
|
2011-03-06 19:19:27 +00:00
|
|
|
chip->dwBytesCountPerRow = (unsigned int) wWidth * 2;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
2011-03-06 19:19:27 +00:00
|
|
|
else if (bScanBits == 8)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
BytePerPixel = 1;
|
2011-03-06 19:19:27 +00:00
|
|
|
chip->dwBytesCountPerRow = (unsigned int) wWidth;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
2011-03-06 19:19:27 +00:00
|
|
|
else if (bScanBits < 8)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
BytePerPixel = 1;
|
2011-03-06 19:19:27 +00:00
|
|
|
chip->dwBytesCountPerRow = (unsigned int) wWidth;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
DBG (DBG_ASIC, "dwBytesCountPerRow = %d\n", chip->dwBytesCountPerRow);
|
|
|
|
|
|
|
|
byDummyCycleNum = 0;
|
|
|
|
if (chip->lsLightSource == LS_REFLECTIVE)
|
|
|
|
{
|
|
|
|
if (chip->UsbHost == HT_USB10)
|
|
|
|
{
|
|
|
|
switch (wYResolution)
|
|
|
|
{
|
|
|
|
case 2400:
|
|
|
|
case 1200:
|
|
|
|
if (chip->dwBytesCountPerRow > 22000)
|
|
|
|
byDummyCycleNum = 4;
|
|
|
|
else if (chip->dwBytesCountPerRow > 15000)
|
|
|
|
byDummyCycleNum = 3;
|
|
|
|
else if (chip->dwBytesCountPerRow > 10000)
|
|
|
|
byDummyCycleNum = 2;
|
|
|
|
else if (chip->dwBytesCountPerRow > 5000)
|
|
|
|
byDummyCycleNum = 1;
|
|
|
|
break;
|
|
|
|
case 600:
|
|
|
|
case 300:
|
|
|
|
case 150:
|
|
|
|
case 100:
|
|
|
|
if (chip->dwBytesCountPerRow > 21000)
|
|
|
|
byDummyCycleNum = 7;
|
|
|
|
else if (chip->dwBytesCountPerRow > 18000)
|
|
|
|
byDummyCycleNum = 6;
|
|
|
|
else if (chip->dwBytesCountPerRow > 15000)
|
|
|
|
byDummyCycleNum = 5;
|
|
|
|
else if (chip->dwBytesCountPerRow > 12000)
|
|
|
|
byDummyCycleNum = 4;
|
|
|
|
else if (chip->dwBytesCountPerRow > 9000)
|
|
|
|
byDummyCycleNum = 3;
|
|
|
|
else if (chip->dwBytesCountPerRow > 6000)
|
|
|
|
byDummyCycleNum = 2;
|
|
|
|
else if (chip->dwBytesCountPerRow > 3000)
|
|
|
|
byDummyCycleNum = 1;
|
|
|
|
break;
|
|
|
|
case 75:
|
|
|
|
case 50:
|
|
|
|
byDummyCycleNum = 1;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
byDummyCycleNum = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
switch (wYResolution)
|
|
|
|
{
|
|
|
|
case 2400:
|
|
|
|
case 1200:
|
|
|
|
case 75:
|
|
|
|
case 50:
|
|
|
|
byDummyCycleNum = 1;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
byDummyCycleNum = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
dwTotalLineTheBufferNeed = wLength;
|
|
|
|
|
2011-03-06 12:57:10 +00:00
|
|
|
chip->Dpi = wXResolution;
|
2005-10-03 13:27:03 +00:00
|
|
|
CCDTiming (chip);
|
|
|
|
|
|
|
|
if (chip->lsLightSource == LS_REFLECTIVE)
|
|
|
|
{
|
2011-03-06 19:19:27 +00:00
|
|
|
if (wXResolution > (SENSOR_DPI / 2))
|
2011-03-08 22:10:57 +00:00
|
|
|
{ /* full CCD resolution 1200 dpi */
|
2011-03-06 19:19:27 +00:00
|
|
|
wThinkCCDResolution = SENSOR_DPI;
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_98_GPIOControl8_15, 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_96_GPIOValue8_15, 0x01);
|
|
|
|
wCCD_PixelNumber = chip->Timing.wCCDPixelNumber_1200;
|
|
|
|
}
|
|
|
|
else
|
2011-03-08 22:10:57 +00:00
|
|
|
{ /* 600 dpi */
|
2011-03-06 19:19:27 +00:00
|
|
|
wThinkCCDResolution = SENSOR_DPI / 2;
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_98_GPIOControl8_15, 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_96_GPIOValue8_15, 0x00);
|
|
|
|
wCCD_PixelNumber = chip->Timing.wCCDPixelNumber_600;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2011-03-06 19:19:27 +00:00
|
|
|
if (wXResolution > (SENSOR_DPI / 2))
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
2011-03-06 19:19:27 +00:00
|
|
|
wThinkCCDResolution = SENSOR_DPI;
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_98_GPIOControl8_15, 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_96_GPIOValue8_15, 0x01);
|
|
|
|
wCCD_PixelNumber = TA_IMAGE_PIXELNUMBER;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2011-03-06 19:19:27 +00:00
|
|
|
wThinkCCDResolution = SENSOR_DPI / 2;
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_98_GPIOControl8_15, 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_96_GPIOValue8_15, 0x00);
|
|
|
|
wCCD_PixelNumber = TA_IMAGE_PIXELNUMBER;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
SetLineTimeAndExposure (chip);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_CB_CCDDummyCycleNumber, byDummyCycleNum);
|
|
|
|
|
|
|
|
|
|
|
|
SetLEDTime (chip);
|
|
|
|
|
|
|
|
Total_MotorDPI = 1200;
|
|
|
|
|
|
|
|
|
|
|
|
/* SetADConverter */
|
|
|
|
Mustek_SendData (chip, ES01_74_HARDWARE_SETTING,
|
2011-03-09 00:56:04 +00:00
|
|
|
MOTOR1_SERIAL_INTERFACE_G10_8_ENABLE);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
/* set AFE */
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_9A_AFEControl, AD9826_AFE);
|
2005-10-03 13:27:03 +00:00
|
|
|
SetAFEGainOffset (chip);
|
|
|
|
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_F7_DigitalControl, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
/* calculate X ratio */
|
|
|
|
XRatioTypeDouble = wXResolution;
|
|
|
|
XRatioTypeDouble /= wThinkCCDResolution;
|
2011-03-08 22:10:57 +00:00
|
|
|
XRatioTypeWord = (unsigned short) (XRatioTypeDouble * 32768); /* x 2^15 */
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
XRatioAdderDouble = (double) (XRatioTypeWord) / 32768;
|
|
|
|
XRatioAdderDouble = 1 / XRatioAdderDouble;
|
|
|
|
|
|
|
|
/* 0x8000 = 1.00000 -> get all pixel */
|
|
|
|
Mustek_SendData (chip, ES01_9E_HorizontalRatio1to15LSB,
|
|
|
|
LOBYTE (XRatioTypeWord));
|
|
|
|
Mustek_SendData (chip, ES01_9F_HorizontalRatio1to15MSB,
|
|
|
|
HIBYTE (XRatioTypeWord));
|
|
|
|
|
|
|
|
/* SetMotorType */
|
|
|
|
Mustek_SendData (chip, ES01_A6_MotorOption, MOTOR_0_ENABLE |
|
2011-03-08 22:10:57 +00:00
|
|
|
HOME_SENSOR_0_ENABLE | TABLE_DEFINE_ES03);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
Mustek_SendData (chip, ES01_F6_MotorControl1, SPEED_UNIT_1_PIXEL_TIME |
|
2005-10-03 13:27:03 +00:00
|
|
|
MOTOR_SYNC_UNIT_1_PIXEL_TIME);
|
|
|
|
|
|
|
|
/* SetScanStepTable */
|
|
|
|
|
2011-03-06 19:19:27 +00:00
|
|
|
/* set motor movement type */
|
2005-10-03 13:27:03 +00:00
|
|
|
if (wYResolution >= 1200)
|
|
|
|
bMotorMoveType = _8_TABLE_SPACE_FOR_1_DIV_2_STEP;
|
|
|
|
|
|
|
|
switch (bMotorMoveType)
|
|
|
|
{
|
|
|
|
case _4_TABLE_SPACE_FOR_FULL_STEP:
|
|
|
|
wMultiMotorStep = 1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case _8_TABLE_SPACE_FOR_1_DIV_2_STEP:
|
|
|
|
wMultiMotorStep = 2;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case _16_TABLE_SPACE_FOR_1_DIV_4_STEP:
|
|
|
|
wMultiMotorStep = 4;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case _32_TABLE_SPACE_FOR_1_DIV_8_STEP:
|
|
|
|
wMultiMotorStep = 8;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
wY *= wMultiMotorStep;
|
|
|
|
|
|
|
|
SetScanMode (chip, bScanBits);
|
|
|
|
|
|
|
|
|
|
|
|
|
2011-03-06 19:19:27 +00:00
|
|
|
/* set white shading int and dec */
|
2005-10-03 13:27:03 +00:00
|
|
|
if (chip->lsLightSource == LS_REFLECTIVE)
|
|
|
|
Mustek_SendData (chip, ES01_F8_WHITE_SHADING_DATA_FORMAT,
|
2011-03-08 22:10:57 +00:00
|
|
|
SHADING_3_INT_13_DEC_ES01);
|
2005-10-03 13:27:03 +00:00
|
|
|
else
|
|
|
|
Mustek_SendData (chip, ES01_F8_WHITE_SHADING_DATA_FORMAT,
|
2011-03-08 22:10:57 +00:00
|
|
|
SHADING_4_INT_12_DEC_ES01);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
SetPackAddress (chip, wWidth, wX, XRatioAdderDouble,
|
2011-03-06 19:19:27 +00:00
|
|
|
XRatioTypeDouble, 0, &ValidPixelNumber);
|
2005-10-03 13:27:03 +00:00
|
|
|
SetExtraSetting (chip, wXResolution, wCCD_PixelNumber, FALSE);
|
|
|
|
|
2011-03-06 19:19:27 +00:00
|
|
|
/* calculate line time */
|
|
|
|
dwLinePixelReport = (2 + (chip->Timing.PHTG_PulseWidth + 1) +
|
|
|
|
(chip->Timing.PHTG_WaitWidth + 1) +
|
2005-10-03 13:27:03 +00:00
|
|
|
(wCCD_PixelNumber + 1)) * (byDummyCycleNum + 1);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Motor Time = %d\n",
|
2011-03-06 19:19:27 +00:00
|
|
|
(dwLinePixelReport * wYResolution / Total_MotorDPI) / wMultiMotorStep);
|
|
|
|
if ((dwLinePixelReport * wYResolution / Total_MotorDPI) / wMultiMotorStep >
|
2005-10-03 13:27:03 +00:00
|
|
|
64000)
|
|
|
|
{
|
2011-03-06 19:19:27 +00:00
|
|
|
DBG (DBG_ASIC, "Motor Time overflow!\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
EndSpeed =
|
2011-03-06 19:19:27 +00:00
|
|
|
(unsigned short) ((dwLinePixelReport * wYResolution / Total_MotorDPI) /
|
2005-10-03 13:27:03 +00:00
|
|
|
wMultiMotorStep);
|
2011-03-09 00:05:41 +00:00
|
|
|
SetMotorStepTable (chip, &lpMotorStepsTable, wY, dwTotalLineTheBufferNeed *
|
2011-03-08 22:10:57 +00:00
|
|
|
Total_MotorDPI / wYResolution * wMultiMotorStep,
|
|
|
|
wYResolution);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
|
|
|
|
if (EndSpeed >= 20000)
|
|
|
|
{
|
|
|
|
Asic_MotorMove (chip, 1, wY / wMultiMotorStep);
|
|
|
|
isUniformSpeedToScan = UNIFORM_MOTOR_AND_SCAN_SPEED_ENABLE;
|
2011-03-09 00:56:04 +00:00
|
|
|
isScanBackTracking = 0;
|
|
|
|
isMotorMoveToFirstLine = 0;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_F3_ActionOption, isMotorMoveToFirstLine |
|
2011-03-09 00:56:04 +00:00
|
|
|
SCAN_ENABLE | isScanBackTracking | isUniformSpeedToScan);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (EndSpeed > 8000)
|
|
|
|
{
|
|
|
|
StartSpeed = EndSpeed;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (EndSpeed <= 1000)
|
|
|
|
StartSpeed = EndSpeed + 4500;
|
|
|
|
else
|
|
|
|
StartSpeed = EndSpeed + 3500;
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_FD_MotorFixedspeedLSB, LOBYTE (EndSpeed));
|
|
|
|
Mustek_SendData (chip, ES01_FE_MotorFixedspeedMSB, HIBYTE (EndSpeed));
|
|
|
|
|
2011-03-09 00:05:41 +00:00
|
|
|
lpMotorTable = malloc (512 * 8 * 2);
|
2011-03-06 19:19:27 +00:00
|
|
|
if (lpMotorTable == NULL)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_SetWindow: lpMotorTable == NULL\n");
|
|
|
|
return STATUS_MEM_ERROR;
|
|
|
|
}
|
2005-10-16 16:37:13 +00:00
|
|
|
memset (lpMotorTable, 0, 512 * 8 * sizeof (unsigned short));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
CalMotorTable.StartSpeed = StartSpeed;
|
|
|
|
CalMotorTable.EndSpeed = EndSpeed;
|
2011-03-09 00:05:41 +00:00
|
|
|
CalMotorTable.AccStepBeforeScan = lpMotorStepsTable.wScanAccSteps;
|
|
|
|
CalMotorTable.DecStepAfterScan = lpMotorStepsTable.bScanDecSteps;
|
2005-10-03 13:27:03 +00:00
|
|
|
CalMotorTable.lpMotorTable = lpMotorTable;
|
|
|
|
|
2011-03-06 18:37:25 +00:00
|
|
|
CalculateMotorTable (&CalMotorTable);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
CurrentPhase.MotorDriverIs3967 = 0;
|
|
|
|
CurrentPhase.FillPhase = 1;
|
|
|
|
CurrentPhase.MoveType = bMotorMoveType;
|
2011-03-06 18:16:16 +00:00
|
|
|
SetMotorCurrent (EndSpeed, &CurrentPhase);
|
2005-10-03 13:27:03 +00:00
|
|
|
LLFSetMotorCurrentAndPhase (chip, &CurrentPhase);
|
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
DBG (DBG_ASIC, "EndSpeed = %d, MotorCurrentA=%d, LinePixelReport=%d\n",
|
|
|
|
EndSpeed, CurrentPhase.MotorCurrentA, dwLinePixelReport);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
/* write motor table */
|
|
|
|
RealTableSize = 512 * 8;
|
|
|
|
dwTableBaseAddr = PackAreaStartAddress - RealTableSize;
|
|
|
|
|
|
|
|
RamAccess.ReadWrite = WRITE_RAM;
|
|
|
|
RamAccess.IsOnChipGamma = EXTERNAL_RAM;
|
2011-03-06 19:19:27 +00:00
|
|
|
RamAccess.LoStartAddress = (unsigned short) (dwTableBaseAddr);
|
|
|
|
RamAccess.HiStartAddress = (unsigned short) (dwTableBaseAddr >> 16);
|
2005-10-03 13:27:03 +00:00
|
|
|
RamAccess.RwSize = RealTableSize * 2;
|
2005-10-16 16:37:13 +00:00
|
|
|
RamAccess.BufferPtr = (SANE_Byte *) lpMotorTable;
|
2005-10-03 13:27:03 +00:00
|
|
|
LLFRamAccess (chip, &RamAccess);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_DB_PH_RESET_EDGE_TIMING_ADJUST, 0x00);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_DC_CLEAR_EDGE_TO_PH_TG_EDGE_WIDTH, 0);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_9D_MotorTableAddrA14_A21,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (dwTableBaseAddr >> TABLE_OFFSET_BASE));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
|
2011-03-06 19:19:27 +00:00
|
|
|
/* set image buffer range and write shading table */
|
2005-10-03 13:27:03 +00:00
|
|
|
RealTableSize =
|
|
|
|
(ACC_DEC_STEP_TABLE_SIZE * NUM_OF_ACC_DEC_STEP_TABLE) +
|
|
|
|
ShadingTableSize (ValidPixelNumber);
|
|
|
|
dwShadingTableAddr =
|
|
|
|
PackAreaStartAddress -
|
|
|
|
(((RealTableSize +
|
|
|
|
(TABLE_BASE_SIZE - 1)) >> TABLE_OFFSET_BASE) << TABLE_OFFSET_BASE);
|
|
|
|
dwEndAddr = dwShadingTableAddr - 1;
|
|
|
|
|
|
|
|
if (wXResolution > 600)
|
|
|
|
dbXRatioAdderDouble = 1200 / wXResolution;
|
|
|
|
else
|
|
|
|
dbXRatioAdderDouble = 600 / wXResolution;
|
|
|
|
|
|
|
|
RamAccess.ReadWrite = WRITE_RAM;
|
|
|
|
RamAccess.IsOnChipGamma = EXTERNAL_RAM;
|
2011-03-06 19:19:27 +00:00
|
|
|
RamAccess.LoStartAddress = (unsigned short) (dwShadingTableAddr);
|
|
|
|
RamAccess.HiStartAddress = (unsigned short) (dwShadingTableAddr >> 16);
|
2005-10-03 13:27:03 +00:00
|
|
|
RamAccess.RwSize =
|
|
|
|
ShadingTableSize ((int) ((wWidth + 4) * dbXRatioAdderDouble)) *
|
2005-10-16 16:37:13 +00:00
|
|
|
sizeof (unsigned short);
|
2011-03-09 00:05:41 +00:00
|
|
|
RamAccess.BufferPtr = chip->lpShadingTable;
|
2005-10-03 13:27:03 +00:00
|
|
|
LLFRamAccess (chip, &RamAccess);
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
/* tell scan chip the shading table address, unit is 2^15 bytes */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_9B_ShadingTableAddrA14_A21,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (dwShadingTableAddr >> TABLE_OFFSET_BASE));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 19:19:27 +00:00
|
|
|
/* empty bank */
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_FB_BufferEmptySize16WordLSB,
|
|
|
|
LOBYTE (WaitBufferOneLineSize >> (7 - 3)));
|
|
|
|
Mustek_SendData (chip, ES01_FC_BufferEmptySize16WordMSB,
|
|
|
|
HIBYTE (WaitBufferOneLineSize >> (7 - 3)));
|
|
|
|
|
2011-03-06 19:19:27 +00:00
|
|
|
/* full bank */
|
2005-10-03 13:27:03 +00:00
|
|
|
wFullBank =
|
2005-10-16 16:37:13 +00:00
|
|
|
(unsigned short) ((dwEndAddr -
|
2011-03-06 19:19:27 +00:00
|
|
|
(((wWidth * BytePerPixel) / 2) * 3 * 1)) / BANK_SIZE);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_F9_BufferFullSize16WordLSB, LOBYTE (wFullBank));
|
|
|
|
Mustek_SendData (chip, ES01_FA_BufferFullSize16WordMSB, HIBYTE (wFullBank));
|
|
|
|
|
|
|
|
|
|
|
|
/* set buffer address */
|
|
|
|
LLFSetRamAddress (chip, 0x0, dwEndAddr, ACCESS_DRAM);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_00_ADAFEConfiguration, 0x70);
|
|
|
|
Mustek_SendData (chip, ES01_02_ADAFEMuxConfig, 0x80);
|
|
|
|
|
|
|
|
free (lpMotorTable);
|
|
|
|
chip->firmwarestate = FS_OPENED;
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_SetWindow: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
Asic_Reset (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
|
|
|
DBG (DBG_ASIC, "Asic_Reset: Enter\n");
|
|
|
|
|
|
|
|
chip->lsLightSource = LS_REFLECTIVE;
|
|
|
|
|
|
|
|
chip->dwBytesCountPerRow = 0;
|
|
|
|
chip->AD.DirectionR = 0;
|
|
|
|
chip->AD.DirectionG = 0;
|
|
|
|
chip->AD.DirectionB = 0;
|
|
|
|
chip->AD.GainR = 0;
|
|
|
|
chip->AD.GainG = 0;
|
|
|
|
chip->AD.GainB = 0;
|
|
|
|
chip->AD.OffsetR = 0;
|
|
|
|
chip->AD.OffsetG = 0;
|
|
|
|
chip->AD.OffsetB = 0;
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_Reset: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
Asic_SetSource (PAsic chip, LIGHTSOURCE lsLightSource)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
|
|
|
DBG (DBG_ASIC, "Asic_SetSource: Enter\n");
|
|
|
|
|
|
|
|
chip->lsLightSource = lsLightSource;
|
|
|
|
switch (chip->lsLightSource)
|
|
|
|
{
|
|
|
|
case 1:
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_SetSource: Source is Reflective\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
break;
|
|
|
|
case 2:
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_SetSource: Source is Positive\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
break;
|
|
|
|
case 4:
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_SetSource: Source is Negative\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
DBG (DBG_ASIC, "Asic_SetSource: Source error\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_SetSource: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
Asic_ScanStart (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
|
|
|
DBG (DBG_ASIC, "Asic_ScanStart: Enter\n");
|
|
|
|
|
|
|
|
if (chip->firmwarestate != FS_OPENED)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_ScanStart: Scanner is not opened\n");
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_8B_Status, 0x1c | 0x20);
|
|
|
|
Mustek_WriteAddressLineForRegister (chip, 0x8B);
|
|
|
|
Mustek_ClearFIFO (chip);
|
2011-03-06 12:57:10 +00:00
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, ACTION_TRIGGER_ENABLE);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
chip->firmwarestate = FS_SCANNING;
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_ScanStart: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
|
|
|
Asic_ScanStop (PAsic chip)
|
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte temps[2];
|
|
|
|
SANE_Byte buf[4];
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_ScanStop: Enter\n");
|
|
|
|
|
|
|
|
if (chip->firmwarestate < FS_SCANNING)
|
2011-03-06 18:16:16 +00:00
|
|
|
return status;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
usleep (100 * 1000);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
buf[0] = 0x02; /* stop */
|
2005-10-03 13:27:03 +00:00
|
|
|
buf[1] = 0x02;
|
|
|
|
buf[2] = 0x02;
|
|
|
|
buf[3] = 0x02;
|
|
|
|
status = WriteIOControl (chip, 0xc0, 0, 4, buf);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_ScanStop: Stop scan error\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
buf[0] = 0x00; /* clear */
|
2005-10-03 13:27:03 +00:00
|
|
|
buf[1] = 0x00;
|
|
|
|
buf[2] = 0x00;
|
|
|
|
buf[3] = 0x00;
|
|
|
|
status = WriteIOControl (chip, 0xc0, 0, 4, buf);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_ScanStop: Clear scan error\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = Mustek_DMARead (chip, 2, temps);
|
|
|
|
if (status != STATUS_GOOD)
|
|
|
|
{
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ERR, "Asic_ScanStop: DMARead error\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_F3_ActionOption, 0);
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_86_DisableAllClockWhenIdle, 0);
|
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_ClearFIFO (chip);
|
|
|
|
|
|
|
|
chip->firmwarestate = FS_OPENED;
|
|
|
|
DBG (DBG_ASIC, "Asic_ScanStop: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
Asic_ReadImage (PAsic chip, SANE_Byte * pBuffer, unsigned short LinesCount)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned int dwXferBytes;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_ReadImage: Enter. LinesCount = %d\n", LinesCount);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (chip->firmwarestate != FS_SCANNING)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_ReadImage: Scanner is not scanning\n");
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
dwXferBytes = (unsigned int) LinesCount * chip->dwBytesCountPerRow;
|
2005-10-03 13:27:03 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_ReadImage: chip->dwBytesCountPerRow = %d\n",
|
|
|
|
chip->dwBytesCountPerRow);
|
|
|
|
|
|
|
|
if (dwXferBytes == 0)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "Asic_ReadImage: dwXferBytes == 0\n");
|
|
|
|
return STATUS_GOOD;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = Mustek_DMARead (chip, dwXferBytes, pBuffer);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_ReadImage: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
#if SANE_UNUSED
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
Asic_CheckFunctionKey (PAsic chip, SANE_Byte * key)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte bBuffer_1 = 0xff;
|
|
|
|
SANE_Byte bBuffer_2 = 0xff;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_CheckFunctionKey: Enter\n");
|
|
|
|
|
|
|
|
if (chip->firmwarestate != FS_OPENED)
|
|
|
|
{
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ERR, "Asic_CheckFunctionKey: Scanner is not opened\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_97_GPIOControl0_7, 0x00);
|
|
|
|
Mustek_SendData (chip, ES01_95_GPIOValue0_7, 0x17);
|
|
|
|
Mustek_SendData (chip, ES01_98_GPIOControl8_15, 0x00);
|
|
|
|
Mustek_SendData (chip, ES01_96_GPIOValue8_15, 0x08);
|
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
GetChipStatus (chip, GPIO0_7, &bBuffer_1);
|
|
|
|
GetChipStatus (chip, GPIO8_15, &bBuffer_2);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
if ((~bBuffer_1 & 0x10) == 0x10)
|
2005-10-03 13:27:03 +00:00
|
|
|
*key = 0x01;
|
2011-03-11 01:08:46 +00:00
|
|
|
else if ((~bBuffer_1 & 0x01) == 0x01)
|
2005-10-03 13:27:03 +00:00
|
|
|
*key = 0x02;
|
2011-03-11 01:08:46 +00:00
|
|
|
else if ((~bBuffer_1 & 0x04) == 0x04)
|
2005-10-03 13:27:03 +00:00
|
|
|
*key = 0x04;
|
2011-03-11 01:08:46 +00:00
|
|
|
else if ((~bBuffer_2 & 0x08) == 0x08)
|
2005-10-03 13:27:03 +00:00
|
|
|
*key = 0x08;
|
2011-03-11 01:08:46 +00:00
|
|
|
else if ((~bBuffer_1 & 0x02) == 0x02)
|
2005-10-03 13:27:03 +00:00
|
|
|
*key = 0x10;
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "CheckFunctionKey=%d\n", *key);
|
|
|
|
DBG (DBG_ASIC, "Asic_CheckFunctionKey: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
Asic_IsTAConnected (PAsic chip, SANE_Bool * hasTA)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte bBuffer_1 = 0xff;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_IsTAConnected: Enter\n");
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_97_GPIOControl0_7, 0x00);
|
|
|
|
Mustek_SendData (chip, ES01_95_GPIOValue0_7, 0x00);
|
|
|
|
Mustek_SendData (chip, ES01_98_GPIOControl8_15, 0x00);
|
|
|
|
Mustek_SendData (chip, ES01_96_GPIOValue8_15, 0x00);
|
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
GetChipStatus (chip, GPIO0_7, &bBuffer_1);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
if ((~bBuffer_1 & 0x08) == 0x08)
|
2005-10-03 13:27:03 +00:00
|
|
|
*hasTA = TRUE;
|
|
|
|
else
|
|
|
|
*hasTA = FALSE;
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "hasTA=%d\n", *hasTA);
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_IsTAConnected(): Exit\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return STATUS_GOOD;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
Asic_ReadCalibrationData (PAsic chip, void * pBuffer,
|
|
|
|
unsigned int dwXferBytes, SANE_Byte bScanBits)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
SANE_Byte * pCalBuffer;
|
|
|
|
unsigned int dwTotalReadData;
|
|
|
|
unsigned int dwReadImageData;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_ReadCalibrationData: Enter\n");
|
|
|
|
|
|
|
|
if (chip->firmwarestate != FS_SCANNING)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_ReadCalibrationData: Scanner is not scanning\n");
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (bScanBits == 24)
|
|
|
|
{
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned int i;
|
2011-03-09 00:05:41 +00:00
|
|
|
pCalBuffer = malloc (dwXferBytes);
|
2005-10-03 13:27:03 +00:00
|
|
|
if (pCalBuffer == NULL)
|
|
|
|
{
|
2011-03-08 22:10:57 +00:00
|
|
|
DBG (DBG_ERR, "Asic_ReadCalibrationData: Can't malloc bCalBuffer " \
|
|
|
|
"memory\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
return STATUS_MEM_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (dwTotalReadData = 0; dwTotalReadData < dwXferBytes;)
|
|
|
|
{
|
|
|
|
dwReadImageData = (dwXferBytes - dwTotalReadData) < 65536 ?
|
|
|
|
(dwXferBytes - dwTotalReadData) : 65536;
|
|
|
|
|
2011-03-09 00:05:41 +00:00
|
|
|
Mustek_DMARead (chip, dwReadImageData, pCalBuffer + dwTotalReadData);
|
2005-10-03 13:27:03 +00:00
|
|
|
dwTotalReadData += dwReadImageData;
|
|
|
|
}
|
|
|
|
|
|
|
|
dwXferBytes /= 3;
|
|
|
|
for (i = 0; i < dwXferBytes; i++)
|
|
|
|
{
|
2005-10-16 16:37:13 +00:00
|
|
|
*((SANE_Byte *) pBuffer + i) = *(pCalBuffer + i * 3);
|
2011-03-08 22:10:57 +00:00
|
|
|
*((SANE_Byte *) pBuffer + dwXferBytes + i) =
|
|
|
|
*(pCalBuffer + i * 3 + 1);
|
2005-10-16 16:37:13 +00:00
|
|
|
*((SANE_Byte *) pBuffer + dwXferBytes * 2 + i) =
|
2005-10-03 13:27:03 +00:00
|
|
|
*(pCalBuffer + i * 3 + 2);
|
|
|
|
}
|
|
|
|
free (pCalBuffer);
|
|
|
|
}
|
|
|
|
else if (bScanBits == 8)
|
|
|
|
{
|
|
|
|
for (dwTotalReadData = 0; dwTotalReadData < dwXferBytes;)
|
|
|
|
{
|
|
|
|
dwReadImageData = (dwXferBytes - dwTotalReadData) < 65536 ?
|
|
|
|
(dwXferBytes - dwTotalReadData) : 65536;
|
|
|
|
|
|
|
|
Mustek_DMARead (chip, dwReadImageData,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte *) pBuffer + dwTotalReadData);
|
2005-10-03 13:27:03 +00:00
|
|
|
dwTotalReadData += dwReadImageData;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_ReadCalibrationData: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-06 12:57:10 +00:00
|
|
|
Asic_SetMotorType (PAsic chip, SANE_Bool isMotorMove)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_SetMotorType: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (isMotorMove)
|
2011-03-06 12:57:10 +00:00
|
|
|
chip->isMotorMove = MOTOR_0_ENABLE;
|
2005-10-03 13:27:03 +00:00
|
|
|
else
|
2011-03-09 00:56:04 +00:00
|
|
|
chip->isMotorMove = 0;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "isMotorMove=%d\n", chip->isMotorMove);
|
|
|
|
DBG (DBG_ASIC, "Asic_SetMotorType: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
Asic_MotorMove (PAsic chip, SANE_Bool isForward, unsigned int dwTotalSteps)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short *NormalMoveMotorTable;
|
2005-10-03 13:27:03 +00:00
|
|
|
LLF_CALCULATEMOTORTABLE CalMotorTable;
|
|
|
|
LLF_MOTOR_CURRENT_AND_PHASE CurrentPhase;
|
|
|
|
LLF_MOTORMOVE MotorMove;
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_MotorMove: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-09 00:05:41 +00:00
|
|
|
NormalMoveMotorTable = malloc (512 * 8 * 2);
|
2011-03-06 18:16:16 +00:00
|
|
|
if (NormalMoveMotorTable == NULL)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "NormalMoveMotorTable == NULL\n");
|
|
|
|
return STATUS_MEM_ERROR;
|
|
|
|
}
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
CalMotorTable.StartSpeed = 5000;
|
|
|
|
CalMotorTable.EndSpeed = 1800;
|
|
|
|
CalMotorTable.AccStepBeforeScan = 511;
|
|
|
|
CalMotorTable.lpMotorTable = NormalMoveMotorTable;
|
|
|
|
LLFCalculateMotorTable (&CalMotorTable);
|
|
|
|
|
|
|
|
CurrentPhase.MotorDriverIs3967 = 0;
|
2011-03-11 01:08:46 +00:00
|
|
|
CurrentPhase.FillPhase = 1; /* TODO: correct? */
|
2011-03-09 00:26:09 +00:00
|
|
|
CurrentPhase.MotorCurrentA = 200;
|
|
|
|
CurrentPhase.MotorCurrentB = 200;
|
2005-10-03 13:27:03 +00:00
|
|
|
CurrentPhase.MoveType = _4_TABLE_SPACE_FOR_FULL_STEP;
|
|
|
|
LLFSetMotorCurrentAndPhase (chip, &CurrentPhase);
|
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
LLFSetMotorTable (chip, NormalMoveMotorTable);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
free (NormalMoveMotorTable);
|
|
|
|
|
|
|
|
MotorMove.ActionMode = ACTION_MODE_ACCDEC_MOVE;
|
2011-03-11 01:08:46 +00:00
|
|
|
MotorMove.ActionType = isForward ? ACTION_TYPE_FORWARD : ACTION_TYPE_BACKWARD;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (dwTotalSteps > 1000)
|
|
|
|
{
|
|
|
|
MotorMove.AccStep = 511;
|
|
|
|
MotorMove.DecStep = 255;
|
|
|
|
MotorMove.FixMoveSteps = dwTotalSteps - (511 + 255);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
MotorMove.ActionMode = ACTION_MODE_UNIFORM_SPEED_MOVE;
|
|
|
|
MotorMove.AccStep = 1;
|
|
|
|
MotorMove.DecStep = 1;
|
|
|
|
MotorMove.FixMoveSteps = dwTotalSteps - 2;
|
|
|
|
}
|
|
|
|
|
|
|
|
MotorMove.FixMoveSpeed = 7000;
|
|
|
|
|
|
|
|
LLFMotorMove (chip, &MotorMove);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_MotorMove: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-06 15:18:18 +00:00
|
|
|
Asic_CarriageHome (PAsic chip)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2011-03-06 15:18:18 +00:00
|
|
|
SANE_Bool LampHome;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_CarriageHome: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 15:18:18 +00:00
|
|
|
status = IsCarriageHome (chip, &LampHome);
|
2005-10-03 13:27:03 +00:00
|
|
|
if (!LampHome)
|
2011-03-11 01:08:46 +00:00
|
|
|
status = MotorBackHome (chip);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_CarriageHome: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2005-10-16 16:37:13 +00:00
|
|
|
Asic_SetShadingTable (PAsic chip, unsigned short * lpWhiteShading,
|
|
|
|
unsigned short * lpDarkShading,
|
2011-03-06 18:16:16 +00:00
|
|
|
unsigned short wXResolution, unsigned short wWidth)
|
2005-10-03 13:27:03 +00:00
|
|
|
{
|
|
|
|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned short i, j, n;
|
|
|
|
unsigned short wValidPixelNumber;
|
2005-10-03 13:27:03 +00:00
|
|
|
double dbXRatioAdderDouble;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned int wShadingTableSize;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Asic_SetShadingTable: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (chip->firmwarestate < FS_OPENED)
|
|
|
|
OpenScanChip (chip);
|
|
|
|
if (chip->firmwarestate == FS_SCANNING)
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
|
|
|
|
if (wXResolution > 600)
|
|
|
|
dbXRatioAdderDouble = 1200 / wXResolution;
|
|
|
|
else
|
|
|
|
dbXRatioAdderDouble = 600 / wXResolution;
|
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
wValidPixelNumber = (unsigned short) ((wWidth + 4) * dbXRatioAdderDouble);
|
2005-10-03 13:27:03 +00:00
|
|
|
DBG (DBG_ASIC, "wValidPixelNumber = %d\n", wValidPixelNumber);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
/* Clear old shading table, if present.
|
|
|
|
First 4 and last 5 elements of shading table cannot be used. */
|
2011-03-08 22:10:57 +00:00
|
|
|
wShadingTableSize = (ShadingTableSize (wValidPixelNumber)) *
|
|
|
|
sizeof (unsigned short);
|
2005-10-03 13:27:03 +00:00
|
|
|
if (chip->lpShadingTable != NULL)
|
2011-03-06 18:16:16 +00:00
|
|
|
free (chip->lpShadingTable);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
DBG (DBG_ASIC, "Allocating a new shading table, size=%d byte\n",
|
|
|
|
wShadingTableSize);
|
2011-03-09 00:05:41 +00:00
|
|
|
chip->lpShadingTable = malloc (wShadingTableSize);
|
2005-10-03 13:27:03 +00:00
|
|
|
if (chip->lpShadingTable == NULL)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "lpShadingTable == NULL\n");
|
|
|
|
return STATUS_MEM_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
n = 0;
|
|
|
|
for (i = 0; i <= (wValidPixelNumber / 40); i++)
|
|
|
|
{
|
|
|
|
if (i < (wValidPixelNumber / 40))
|
|
|
|
{
|
|
|
|
for (j = 0; j < 40; j++)
|
|
|
|
{
|
2005-10-16 16:37:13 +00:00
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6) =
|
|
|
|
*((unsigned short *) lpDarkShading + n * 3);
|
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6 + 2) =
|
|
|
|
*((unsigned short *) lpDarkShading + n * 3 + 1);
|
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6 + 4) =
|
|
|
|
*((unsigned short *) lpDarkShading + n * 3 + 2);
|
|
|
|
|
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6 + 1) =
|
|
|
|
*((unsigned short *) lpWhiteShading + n * 3);
|
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6 + 3) =
|
|
|
|
*((unsigned short *) lpWhiteShading + n * 3 + 1);
|
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6 + 5) =
|
|
|
|
*((unsigned short *) lpWhiteShading + n * 3 + 2);
|
|
|
|
if ((j % (unsigned short) dbXRatioAdderDouble) ==
|
2005-10-03 13:27:03 +00:00
|
|
|
(dbXRatioAdderDouble - 1))
|
|
|
|
n++;
|
|
|
|
|
|
|
|
if (i == 0 && j < 4 * dbXRatioAdderDouble)
|
|
|
|
n = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
for (j = 0; j < (wValidPixelNumber % 40); j++)
|
|
|
|
{
|
2005-10-16 16:37:13 +00:00
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6) =
|
2011-03-06 18:16:16 +00:00
|
|
|
*((unsigned short *) lpDarkShading + n * 3);
|
2005-10-16 16:37:13 +00:00
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6 + 2) =
|
2011-03-06 18:16:16 +00:00
|
|
|
*((unsigned short *) lpDarkShading + n * 3 + 1);
|
2005-10-16 16:37:13 +00:00
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6 + 4) =
|
2011-03-06 18:16:16 +00:00
|
|
|
*((unsigned short *) lpDarkShading + n * 3 + 2);
|
2005-10-16 16:37:13 +00:00
|
|
|
|
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6 + 1) =
|
2011-03-06 18:16:16 +00:00
|
|
|
*((unsigned short *) lpWhiteShading + n * 3);
|
2005-10-16 16:37:13 +00:00
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6 + 3) =
|
2011-03-06 18:16:16 +00:00
|
|
|
*((unsigned short *) lpWhiteShading + n * 3 + 1);
|
2005-10-16 16:37:13 +00:00
|
|
|
*((unsigned short *) chip->lpShadingTable + i * 256 + j * 6 + 5) =
|
2011-03-06 18:16:16 +00:00
|
|
|
*((unsigned short *) lpWhiteShading + n * 3 + 2);
|
2005-10-16 16:37:13 +00:00
|
|
|
|
|
|
|
if ((j % (unsigned short) dbXRatioAdderDouble) ==
|
2005-10-03 13:27:03 +00:00
|
|
|
(dbXRatioAdderDouble - 1))
|
|
|
|
n++;
|
|
|
|
|
|
|
|
if (i == 0 && j < 4 * dbXRatioAdderDouble)
|
|
|
|
n = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_SetShadingTable: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static STATUS
|
2011-03-06 15:18:18 +00:00
|
|
|
Asic_WaitCarriageHome (PAsic chip)
|
2005-10-03 13:27:03 +00:00
|
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|
{
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|
STATUS status = STATUS_GOOD;
|
2011-03-06 15:18:18 +00:00
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SANE_Bool LampHome;
|
2005-10-03 13:27:03 +00:00
|
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|
int i;
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|
2011-03-06 18:16:16 +00:00
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DBG (DBG_ASIC, "Asic_WaitCarriageHome: Enter\n");
|
2005-10-03 13:27:03 +00:00
|
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for (i = 0; i < 100; i++)
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|
|
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{
|
2011-03-06 15:18:18 +00:00
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|
status = IsCarriageHome (chip, &LampHome);
|
2005-10-03 13:27:03 +00:00
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|
|
if (LampHome)
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|
break;
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usleep (300000);
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|
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|
}
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|
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if (i == 100)
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status = STATUS_DEVICE_BUSY;
|
2011-03-06 15:18:18 +00:00
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|
DBG (DBG_ASIC, "Waited %d s\n", (unsigned short) (i * 0.3));
|
2005-10-03 13:27:03 +00:00
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|
2011-03-09 00:56:04 +00:00
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|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, 0);
|
2005-10-03 13:27:03 +00:00
|
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|
chip->firmwarestate = FS_OPENED;
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DBG (DBG_ASIC, "Asic_WaitCarriageHome: Exit\n");
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return status;
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|
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}
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|
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|
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|
static STATUS
|
2005-10-16 16:37:13 +00:00
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|
Asic_SetCalibrate (PAsic chip, SANE_Byte bScanBits, unsigned short wXResolution,
|
2011-03-08 22:10:57 +00:00
|
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|
unsigned short wYResolution, unsigned short wX,
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unsigned short wY, unsigned short wWidth,
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unsigned short wLength, SANE_Bool isShading)
|
2005-10-03 13:27:03 +00:00
|
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|
{
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|
STATUS status = STATUS_GOOD;
|
2005-10-16 16:37:13 +00:00
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|
|
unsigned short ValidPixelNumber;
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unsigned short wPerLineNeedBufferSize = 0;
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unsigned short BytePerPixel = 0;
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|
|
unsigned int dwTotal_PerLineNeedBufferSize = 0;
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unsigned int dwTotalLineTheBufferNeed = 0;
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|
unsigned short dwTotal_CCDResolution = 0;
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|
|
unsigned short wThinkCCDResolution = 0;
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unsigned short wCCD_PixelNumber = 0;
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unsigned short wScanAccSteps = 1;
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|
SANE_Byte byScanDecSteps = 1;
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unsigned int dwLineWidthPixel = 0;
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unsigned short wNowMotorDPI;
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unsigned short XRatioTypeWord;
|
2005-10-03 13:27:03 +00:00
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|
double XRatioTypeDouble;
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double XRatioAdderDouble;
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|
2005-10-16 16:37:13 +00:00
|
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|
SANE_Byte byDummyCycleNum = 1;
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|
|
unsigned short Total_MotorDPI;
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unsigned short BeforeScanFixSpeedStep = 0;
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unsigned short BackTrackFixSpeedStep = 20;
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unsigned short wMultiMotorStep = 1;
|
2011-03-06 12:57:10 +00:00
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|
SANE_Byte bMotorMoveType = _4_TABLE_SPACE_FOR_FULL_STEP;
|
2011-03-09 00:56:04 +00:00
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|
SANE_Byte isScanBackTracking = 0;
|
2005-10-16 16:37:13 +00:00
|
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|
unsigned int TotalStep = 0;
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|
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|
unsigned short StartSpeed, EndSpeed;
|
2005-10-03 13:27:03 +00:00
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|
LLF_CALCULATEMOTORTABLE CalMotorTable;
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LLF_MOTOR_CURRENT_AND_PHASE CurrentPhase;
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LLF_RAMACCESS RamAccess;
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned int dwStartAddr, dwEndAddr, dwTableBaseAddr;
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|
SANE_Byte byClear_Pulse_Width = 0;
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|
unsigned int dwLinePixelReport = 0;
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|
|
SANE_Byte byPHTG_PulseWidth, byPHTG_WaitWidth;
|
2011-03-09 00:05:41 +00:00
|
|
|
unsigned short * lpMotorTable = malloc (512 * 8 * 2);
|
2005-10-16 16:37:13 +00:00
|
|
|
unsigned int RealTableSize;
|
|
|
|
unsigned short wFullBank;
|
2005-10-03 13:27:03 +00:00
|
|
|
|
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|
|
DBG (DBG_ASIC, "Asic_SetCalibrate: Enter\n");
|
2011-03-08 22:10:57 +00:00
|
|
|
DBG (DBG_ASIC, "bScanBits=%d,wXResolution=%d, wYResolution=%d, wX=%d, " \
|
|
|
|
"wY=%d, wWidth=%d, wLength=%d\n",
|
2005-10-03 13:27:03 +00:00
|
|
|
bScanBits, wXResolution, wYResolution, wX, wY, wWidth, wLength);
|
|
|
|
|
2011-03-06 15:18:18 +00:00
|
|
|
if (lpMotorTable == NULL)
|
|
|
|
{
|
|
|
|
DBG (DBG_ASIC, "lpMotorTable == NULL\n");
|
|
|
|
return STATUS_MEM_ERROR;
|
|
|
|
}
|
|
|
|
|
2005-10-03 13:27:03 +00:00
|
|
|
if (chip->firmwarestate != FS_OPENED)
|
|
|
|
{
|
|
|
|
DBG (DBG_ERR, "Asic_SetCalibrate: Scanner is not opened\n");
|
|
|
|
return STATUS_INVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_F3_ActionOption, 0);
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_86_DisableAllClockWhenIdle, 0);
|
|
|
|
Mustek_SendData (chip, ES01_F4_ActiveTrigger, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
status = Asic_WaitUnitReady (chip);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, 0x1CD, 0);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_94_PowerSaveControl, 0x27 | 64 | 128);
|
|
|
|
|
|
|
|
if (bScanBits > 24)
|
|
|
|
{
|
|
|
|
wPerLineNeedBufferSize = wWidth * 6;
|
|
|
|
BytePerPixel = 6;
|
2005-10-16 16:37:13 +00:00
|
|
|
chip->dwBytesCountPerRow = (unsigned int) (wWidth) * 6;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else if (bScanBits == 24)
|
|
|
|
{
|
|
|
|
wPerLineNeedBufferSize = wWidth * 3;
|
|
|
|
BytePerPixel = 3;
|
2005-10-16 16:37:13 +00:00
|
|
|
chip->dwBytesCountPerRow = (unsigned int) (wWidth) * 3;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else if ((bScanBits > 8) && (bScanBits <= 16))
|
|
|
|
{
|
|
|
|
wPerLineNeedBufferSize = wWidth * 2;
|
|
|
|
BytePerPixel = 2;
|
2005-10-16 16:37:13 +00:00
|
|
|
chip->dwBytesCountPerRow = (unsigned int) (wWidth) * 2;
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else if ((bScanBits == 8))
|
|
|
|
{
|
|
|
|
wPerLineNeedBufferSize = wWidth;
|
|
|
|
BytePerPixel = 1;
|
2005-10-16 16:37:13 +00:00
|
|
|
chip->dwBytesCountPerRow = (unsigned int) (wWidth);
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
else if ((bScanBits < 8))
|
|
|
|
{
|
|
|
|
wPerLineNeedBufferSize = wWidth >> 3;
|
|
|
|
BytePerPixel = 1;
|
2005-10-16 16:37:13 +00:00
|
|
|
chip->dwBytesCountPerRow = (unsigned int) (wWidth);
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
DBG (DBG_ASIC,
|
|
|
|
"wPerLineNeedBufferSize=%d,BytePerPixel=%d,dwBytesCountPerRow=%d\n",
|
|
|
|
wPerLineNeedBufferSize, BytePerPixel, chip->dwBytesCountPerRow);
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|
|
|
|
|
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|
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|
dwTotal_PerLineNeedBufferSize = wPerLineNeedBufferSize;
|
|
|
|
dwTotalLineTheBufferNeed = wLength;
|
|
|
|
DBG (DBG_ASIC, "wPerLineNeedBufferSize=%d,wLength=%d\n",
|
|
|
|
wPerLineNeedBufferSize, wLength);
|
|
|
|
|
|
|
|
|
2011-03-06 12:57:10 +00:00
|
|
|
chip->Dpi = wXResolution;
|
2005-10-03 13:27:03 +00:00
|
|
|
CCDTiming (chip);
|
|
|
|
|
|
|
|
dwTotal_CCDResolution = SENSOR_DPI;
|
|
|
|
if (chip->lsLightSource == LS_REFLECTIVE)
|
|
|
|
{
|
|
|
|
if (wXResolution > (dwTotal_CCDResolution / 2))
|
|
|
|
{
|
|
|
|
wThinkCCDResolution = dwTotal_CCDResolution;
|
|
|
|
Mustek_SendData (chip, ES01_98_GPIOControl8_15, 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_96_GPIOValue8_15, 0x01);
|
|
|
|
wCCD_PixelNumber = chip->Timing.wCCDPixelNumber_1200;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
wThinkCCDResolution = dwTotal_CCDResolution / 2;
|
|
|
|
Mustek_SendData (chip, ES01_98_GPIOControl8_15, 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_96_GPIOValue8_15, 0x00);
|
|
|
|
wCCD_PixelNumber = chip->Timing.wCCDPixelNumber_600;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (wXResolution > (dwTotal_CCDResolution / 2))
|
|
|
|
{
|
|
|
|
wThinkCCDResolution = dwTotal_CCDResolution;
|
|
|
|
Mustek_SendData (chip, ES01_98_GPIOControl8_15, 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_96_GPIOValue8_15, 0x01);
|
|
|
|
wCCD_PixelNumber = TA_CAL_PIXELNUMBER;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
wThinkCCDResolution = dwTotal_CCDResolution / 2;
|
|
|
|
Mustek_SendData (chip, ES01_98_GPIOControl8_15, 0x01);
|
|
|
|
Mustek_SendData (chip, ES01_96_GPIOValue8_15, 0x00);
|
|
|
|
wCCD_PixelNumber = TA_CAL_PIXELNUMBER;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
DBG (DBG_ASIC, "wThinkCCDResolution=%d,wCCD_PixelNumber=%d\n",
|
|
|
|
wThinkCCDResolution, wCCD_PixelNumber);
|
|
|
|
|
|
|
|
dwLineWidthPixel = wWidth;
|
|
|
|
|
|
|
|
if (isShading)
|
|
|
|
wYResolution = 600;
|
|
|
|
DBG (DBG_ASIC, "dwLineWidthPixel=%d,wYResolution=%d\n", dwLineWidthPixel,
|
|
|
|
wYResolution);
|
|
|
|
|
|
|
|
SetLineTimeAndExposure (chip);
|
|
|
|
if (wYResolution == 600)
|
|
|
|
{
|
|
|
|
Mustek_SendData (chip, ES01_CB_CCDDummyCycleNumber, byDummyCycleNum);
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "find boundary CCDDummyCycleNumber=%d\n",
|
2005-10-03 13:27:03 +00:00
|
|
|
byDummyCycleNum);
|
|
|
|
}
|
|
|
|
|
|
|
|
SetLEDTime (chip);
|
|
|
|
|
|
|
|
/* calculate Y ratio */
|
|
|
|
Total_MotorDPI = 1200;
|
|
|
|
|
|
|
|
wNowMotorDPI = Total_MotorDPI;
|
|
|
|
DBG (DBG_ASIC, "wNowMotorDPI=%d\n", wNowMotorDPI);
|
|
|
|
|
|
|
|
/* SetADConverter */
|
|
|
|
Mustek_SendData (chip, ES01_74_HARDWARE_SETTING,
|
2011-03-09 00:56:04 +00:00
|
|
|
MOTOR1_SERIAL_INTERFACE_G10_8_ENABLE);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
/* set AFE */
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_9A_AFEControl, AD9826_AFE);
|
|
|
|
Mustek_SendData (chip, ES01_F7_DigitalControl, 0);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
XRatioTypeDouble = wXResolution;
|
|
|
|
XRatioTypeDouble /= wThinkCCDResolution;
|
|
|
|
XRatioAdderDouble = 1 / XRatioTypeDouble;
|
2005-10-16 16:37:13 +00:00
|
|
|
XRatioTypeWord = (unsigned short) (XRatioTypeDouble * 32768);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
XRatioAdderDouble = (double) (XRatioTypeWord) / 32768;
|
|
|
|
XRatioAdderDouble = 1 / XRatioAdderDouble;
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_9E_HorizontalRatio1to15LSB,
|
|
|
|
LOBYTE (XRatioTypeWord));
|
|
|
|
Mustek_SendData (chip, ES01_9F_HorizontalRatio1to15MSB,
|
|
|
|
HIBYTE (XRatioTypeWord));
|
|
|
|
DBG (DBG_ASIC,
|
|
|
|
"XRatioTypeDouble=%.2f,XRatioAdderDouble=%.2f,XRatioTypeWord=%d\n",
|
|
|
|
XRatioTypeDouble, XRatioAdderDouble, XRatioTypeWord);
|
|
|
|
|
2011-03-09 00:56:04 +00:00
|
|
|
Mustek_SendData (chip, ES01_A6_MotorOption, chip->isMotorMove |
|
|
|
|
HOME_SENSOR_0_ENABLE | TABLE_DEFINE_ES03);
|
2005-10-03 13:27:03 +00:00
|
|
|
DBG (DBG_ASIC, "isMotorMove=%d\n", chip->isMotorMove);
|
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
Mustek_SendData (chip, ES01_F6_MotorControl1, SPEED_UNIT_1_PIXEL_TIME |
|
2005-10-03 13:27:03 +00:00
|
|
|
MOTOR_SYNC_UNIT_1_PIXEL_TIME);
|
|
|
|
|
|
|
|
wScanAccSteps = 1;
|
|
|
|
byScanDecSteps = 1;
|
|
|
|
DBG (DBG_ASIC, "wScanAccSteps=%d,byScanDecSteps=%d\n", wScanAccSteps,
|
|
|
|
byScanDecSteps);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_AE_MotorSyncPixelNumberM16LSB, LOBYTE (0));
|
|
|
|
Mustek_SendData (chip, ES01_AF_MotorSyncPixelNumberM16MSB, HIBYTE (0));
|
|
|
|
DBG (DBG_ASIC, "MotorSyncPixelNumber=%d\n", 0);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_EC_ScanAccStep0_7, LOBYTE (wScanAccSteps));
|
|
|
|
Mustek_SendData (chip, ES01_ED_ScanAccStep8_8, HIBYTE (wScanAccSteps));
|
|
|
|
DBG (DBG_ASIC, "wScanAccSteps=%d\n", wScanAccSteps);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "BeforeScanFixSpeedStep=%d,BackTrackFixSpeedStep=%d\n",
|
|
|
|
BeforeScanFixSpeedStep, BackTrackFixSpeedStep);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_EE_FixScanStepLSB,
|
|
|
|
LOBYTE (BeforeScanFixSpeedStep));
|
|
|
|
Mustek_SendData (chip, ES01_8A_FixScanStepMSB,
|
|
|
|
HIBYTE (BeforeScanFixSpeedStep));
|
|
|
|
DBG (DBG_ASIC, "BeforeScanFixSpeedStep=%d\n", BeforeScanFixSpeedStep);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_EF_ScanDecStep, byScanDecSteps);
|
|
|
|
DBG (DBG_ASIC, "byScanDecSteps=%d\n", byScanDecSteps);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_E6_ScanBackTrackingStepLSB,
|
|
|
|
LOBYTE (BackTrackFixSpeedStep));
|
|
|
|
Mustek_SendData (chip, ES01_E7_ScanBackTrackingStepMSB,
|
|
|
|
HIBYTE (BackTrackFixSpeedStep));
|
|
|
|
DBG (DBG_ASIC, "BackTrackFixSpeedStep=%d\n", BackTrackFixSpeedStep);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_E8_ScanRestartStepLSB,
|
|
|
|
LOBYTE (BackTrackFixSpeedStep));
|
|
|
|
Mustek_SendData (chip, ES01_E9_ScanRestartStepMSB,
|
|
|
|
HIBYTE (BackTrackFixSpeedStep));
|
|
|
|
DBG (DBG_ASIC, "BackTrackFixSpeedStep=%d\n", BackTrackFixSpeedStep);
|
|
|
|
|
|
|
|
switch (bMotorMoveType)
|
|
|
|
{
|
|
|
|
case _4_TABLE_SPACE_FOR_FULL_STEP:
|
|
|
|
wMultiMotorStep = 1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case _8_TABLE_SPACE_FOR_1_DIV_2_STEP:
|
|
|
|
wMultiMotorStep = 2;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case _16_TABLE_SPACE_FOR_1_DIV_4_STEP:
|
|
|
|
wMultiMotorStep = 4;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case _32_TABLE_SPACE_FOR_1_DIV_8_STEP:
|
|
|
|
wMultiMotorStep = 8;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
DBG (DBG_ASIC, "wMultiMotorStep=%d\n", wMultiMotorStep);
|
|
|
|
|
|
|
|
TotalStep = wScanAccSteps + BeforeScanFixSpeedStep +
|
|
|
|
(dwTotalLineTheBufferNeed * wNowMotorDPI / wYResolution) + byScanDecSteps;
|
|
|
|
DBG (DBG_ASIC, "TotalStep=%d\n", TotalStep);
|
|
|
|
|
2005-10-16 16:37:13 +00:00
|
|
|
Mustek_SendData (chip, ES01_F0_ScanImageStep0_7, (SANE_Byte) (TotalStep));
|
2011-03-11 01:08:46 +00:00
|
|
|
Mustek_SendData (chip, ES01_F1_ScanImageStep8_15,
|
|
|
|
(SANE_Byte) (TotalStep >> 8));
|
2005-10-03 13:27:03 +00:00
|
|
|
Mustek_SendData (chip, ES01_F2_ScanImageStep16_19,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (TotalStep >> 16));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
SetScanMode (chip, bScanBits);
|
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
DBG (DBG_ASIC, "isScanBackTracking=%d\n", isScanBackTracking);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-11 01:08:46 +00:00
|
|
|
Mustek_SendData (chip, ES01_F3_ActionOption,
|
|
|
|
SCAN_ENABLE | isScanBackTracking |
|
|
|
|
UNIFORM_MOTOR_AND_SCAN_SPEED_ENABLE);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (chip->lsLightSource == LS_REFLECTIVE)
|
|
|
|
Mustek_SendData (chip, ES01_F8_WHITE_SHADING_DATA_FORMAT,
|
2011-03-08 22:10:57 +00:00
|
|
|
SHADING_3_INT_13_DEC_ES01);
|
2005-10-03 13:27:03 +00:00
|
|
|
else
|
|
|
|
Mustek_SendData (chip, ES01_F8_WHITE_SHADING_DATA_FORMAT,
|
2011-03-08 22:10:57 +00:00
|
|
|
SHADING_4_INT_12_DEC_ES01);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
2011-03-06 18:16:16 +00:00
|
|
|
SetPackAddress (chip, wWidth, wX, XRatioAdderDouble,
|
2005-10-03 13:27:03 +00:00
|
|
|
XRatioTypeDouble, byClear_Pulse_Width, &ValidPixelNumber);
|
|
|
|
SetExtraSetting (chip, wXResolution, wCCD_PixelNumber, TRUE);
|
|
|
|
|
2011-03-06 12:57:10 +00:00
|
|
|
byPHTG_PulseWidth = chip->Timing.PHTG_PulseWidth;
|
2005-10-03 13:27:03 +00:00
|
|
|
byPHTG_WaitWidth = chip->Timing.PHTG_WaitWidth;
|
|
|
|
dwLinePixelReport = ((byClear_Pulse_Width + 1) * 2 +
|
|
|
|
(byPHTG_PulseWidth + 1) * (1) +
|
|
|
|
(byPHTG_WaitWidth + 1) * (1) +
|
|
|
|
(wCCD_PixelNumber + 1)) * (byDummyCycleNum + 1);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Motor Time = %d\n",
|
|
|
|
(dwLinePixelReport * wYResolution / wNowMotorDPI));
|
|
|
|
if ((dwLinePixelReport * wYResolution / wNowMotorDPI) > 64000)
|
|
|
|
{
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "Motor Time overflow!\n");
|
2005-10-03 13:27:03 +00:00
|
|
|
}
|
|
|
|
|
2011-03-08 22:10:57 +00:00
|
|
|
EndSpeed = (unsigned short) (dwLinePixelReport /
|
|
|
|
(wNowMotorDPI / wYResolution));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
if (wXResolution > 600)
|
|
|
|
{
|
|
|
|
StartSpeed = EndSpeed;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
StartSpeed = EndSpeed + 3500;
|
|
|
|
}
|
2011-03-06 18:16:16 +00:00
|
|
|
DBG (DBG_ASIC, "StartSpeed=%d, EndSpeed=%d\n", StartSpeed, EndSpeed);
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_FD_MotorFixedspeedLSB, LOBYTE (EndSpeed));
|
|
|
|
Mustek_SendData (chip, ES01_FE_MotorFixedspeedMSB, HIBYTE (EndSpeed));
|
2005-10-16 16:37:13 +00:00
|
|
|
memset (lpMotorTable, 0, 512 * 8 * sizeof (unsigned short));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
CalMotorTable.StartSpeed = StartSpeed;
|
|
|
|
CalMotorTable.EndSpeed = EndSpeed;
|
|
|
|
CalMotorTable.AccStepBeforeScan = wScanAccSteps;
|
|
|
|
CalMotorTable.lpMotorTable = lpMotorTable;
|
|
|
|
|
|
|
|
LLFCalculateMotorTable (&CalMotorTable);
|
|
|
|
|
|
|
|
CurrentPhase.MotorDriverIs3967 = 0;
|
|
|
|
CurrentPhase.FillPhase = 1;
|
|
|
|
CurrentPhase.MoveType = bMotorMoveType;
|
2011-03-09 00:26:09 +00:00
|
|
|
CurrentPhase.MotorCurrentA = 200;
|
|
|
|
CurrentPhase.MotorCurrentB = 200;
|
2005-10-03 13:27:03 +00:00
|
|
|
LLFSetMotorCurrentAndPhase (chip, &CurrentPhase);
|
|
|
|
|
|
|
|
RealTableSize = 512 * 8;
|
|
|
|
dwTableBaseAddr = PackAreaStartAddress - RealTableSize;
|
|
|
|
|
|
|
|
dwStartAddr = dwTableBaseAddr;
|
|
|
|
|
|
|
|
RamAccess.ReadWrite = WRITE_RAM;
|
|
|
|
RamAccess.IsOnChipGamma = EXTERNAL_RAM;
|
2005-10-16 16:37:13 +00:00
|
|
|
RamAccess.LoStartAddress = (unsigned short) (dwStartAddr);
|
|
|
|
RamAccess.HiStartAddress = (unsigned short) (dwStartAddr >> 16);
|
2005-10-03 13:27:03 +00:00
|
|
|
RamAccess.RwSize = RealTableSize * 2;
|
2005-10-16 16:37:13 +00:00
|
|
|
RamAccess.BufferPtr = (SANE_Byte *) lpMotorTable;
|
2005-10-03 13:27:03 +00:00
|
|
|
LLFRamAccess (chip, &RamAccess);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_9D_MotorTableAddrA14_A21,
|
2005-10-16 16:37:13 +00:00
|
|
|
(SANE_Byte) (dwTableBaseAddr >> TABLE_OFFSET_BASE));
|
2005-10-03 13:27:03 +00:00
|
|
|
|
|
|
|
dwEndAddr = PackAreaStartAddress - (512 * 8) - 1;
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_FB_BufferEmptySize16WordLSB,
|
|
|
|
LOBYTE (WaitBufferOneLineSize >> (7 - 3)));
|
|
|
|
Mustek_SendData (chip, ES01_FC_BufferEmptySize16WordMSB,
|
|
|
|
HIBYTE (WaitBufferOneLineSize >> (7 - 3)));
|
|
|
|
|
|
|
|
wFullBank =
|
2005-10-16 16:37:13 +00:00
|
|
|
(unsigned short) ((dwEndAddr -
|
2005-10-03 13:27:03 +00:00
|
|
|
(((dwLineWidthPixel * BytePerPixel) / 2) * 3 * 1)) / BANK_SIZE);
|
|
|
|
Mustek_SendData (chip, ES01_F9_BufferFullSize16WordLSB, LOBYTE (wFullBank));
|
|
|
|
Mustek_SendData (chip, ES01_FA_BufferFullSize16WordMSB, HIBYTE (wFullBank));
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_DB_PH_RESET_EDGE_TIMING_ADJUST, 0x00);
|
|
|
|
|
|
|
|
LLFSetRamAddress (chip, 0x0, dwEndAddr, ACCESS_DRAM);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_DC_CLEAR_EDGE_TO_PH_TG_EDGE_WIDTH, 0);
|
|
|
|
|
|
|
|
Mustek_SendData (chip, ES01_00_ADAFEConfiguration, 0x70);
|
|
|
|
Mustek_SendData (chip, ES01_02_ADAFEMuxConfig, 0x80);
|
|
|
|
|
|
|
|
|
|
|
|
free (lpMotorTable);
|
|
|
|
|
|
|
|
DBG (DBG_ASIC, "Asic_SetCalibrate: Exit\n");
|
|
|
|
return status;
|
|
|
|
}
|