kopia lustrzana https://github.com/piotr022/rf96
73 wiersze
2.4 KiB
C
73 wiersze
2.4 KiB
C
/*
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* spi.c
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*
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* Created on: Mar 24, 2020
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* Author: Piotr Lewandowski
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*/
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#include "stm32f3xx.h"
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#include "gpio.h"
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#include "spi.h"
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//////////////////////////////SPI//////////////////////////////////////////
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//To do stm32f103 compatibility
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void spiInit()
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{
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RCC->AHBENR |= RCC_AHBENR_GPIOAEN|RCC_AHBENR_GPIOBEN; //en clock for gpio a and spi1
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RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
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__DSB(); __DSB();
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gpio_pin_cfg(GPIOB,13,GPIO_OUT_PP_50MHz); //PB13 is
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GPIOB->ODR |= GPIO_ODR_13; //soft NSS pin
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GPIOA->MODER |= GPIO_MODER_MODER4_1|GPIO_MODER_MODER5_1| //setting alternate fx
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GPIO_MODER_MODER6_1|GPIO_MODER_MODER7_1; //for PA 4,5,6,7
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GPIOA->AFR[0] = (0b0101 << 16) | (0b0101 << 20) |
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(0b0101 << 24) | (0b0101 << 28); //setting AF5(0101) for this pins
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SPI1->CR1 |= SPI_CR1_BR_1|SPI_CR1_BR_0 //PI_CR1_BR_0|SPI_CR1_BR_2
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|SPI_CR1_MSTR|SPI_CR1_SSM; //setting baudrate to Fpclk/128 + master mode
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SPI1->CR2 |= SPI_CR2_SSOE|SPI_CR2_DS; //rx buffer not empty interrupt enable + hw ss enable
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//+ nss pulse, cont. transfer + 16data interrupt for rx ne SPI_CR2_RXNEIE
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}
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uint8_t spiWrite(uint8_t reg_u8, uint8_t val_u8)
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{
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uint8_t recTrash_u8;
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if(reg_u8 & (1 << 7))
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return 2; //error, reg_u8 is bigger than 7 bits
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reg_u8 |= (0b1 << 7); //msb = 1 if reg write operation
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GPIOB->ODR &= ~GPIO_ODR_13; //nss low
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SPI1->CR1 |= SPI_CR1_SPE; //enabling spi
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SPI1->DR = val_u8 | (reg_u8 << 8); //if MSB is 1, rf96 is in register write mode
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//sending value to be set in register
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while(SPI1->SR & SPI_SR_BSY){}; //waiting until all data is transmitted
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while(SPI1->SR & SPI_SR_RXNE)
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recTrash_u8 = SPI1->DR; //clearing buffer
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SPI1->CR1 &= ~SPI_CR1_SPE; //disabling spi
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GPIOB->ODR |= GPIO_ODR_13; //nss high
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return 0;
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}
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uint16_t spiRead(uint8_t reg_u8)
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{
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if(reg_u8 & (1 << 7))
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return 0xFF; //error, reg_u8 is bigger than 7 bits
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uint8_t recTrash_u8;
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GPIOB->ODR &= ~GPIO_ODR_13; //nss low
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SPI1->CR1 |= SPI_CR1_SPE; //enabling spi
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while(SPI1->SR & SPI_SR_RXNE)
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recTrash_u8 = SPI1->DR; //clearing buffer
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SPI1->DR = reg_u8 << 8;
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while(!(SPI1->SR & SPI_SR_RXNE)){}; //waiting for rx
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uint16_t rec_u16 = SPI1->DR; //recived data
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SPI1->CR1 &= ~SPI_CR1_SPE; //disabling spi
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GPIOB->ODR |= GPIO_ODR_13; //nss high
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return rec_u16; //returning recieved value
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}
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