From 3add9c6a117fb753c017fe69af058de2ad90643f Mon Sep 17 00:00:00 2001
From: Mikhail Yudin <fagci.nsk@gmail.com>
Date: Wed, 14 Jun 2023 01:56:24 +0700
Subject: [PATCH] feat: fw library ++

---
 fw.py   |  3 +++
 uvk5.py | 53 ++++++++++++++++++++++++++++++++++-------------------
 2 files changed, 37 insertions(+), 19 deletions(-)

diff --git a/fw.py b/fw.py
index 59b259b..03f089a 100755
--- a/fw.py
+++ b/fw.py
@@ -12,6 +12,9 @@ def main(cmd):
         return
 
     if cmd == 'mod':
+        if argc == 3:
+            print('Mods:', ','.join(list(fw.get_available_mods())))
+            return
         eprint('mods:', argv[3])
         fw.apply_mods(argv[3].split(','))
         fw.write()
diff --git a/uvk5.py b/uvk5.py
index 86fe2f7..9c70f9d 100755
--- a/uvk5.py
+++ b/uvk5.py
@@ -144,11 +144,6 @@ class Firmware(bytearray):
         self[addr:addr+size] = new_bytes
 
 
-    def apply_mods(self, names):
-        eprint('Not implemented for', self.version)
-        exit(128)
-
-
     def write(self, path=None):
         encrypted = encrypt(self, self.version)
 
@@ -158,7 +153,40 @@ class Firmware(bytearray):
             os.write(1, encrypted)
 
 
-class Firmware_2_01_26(Firmware):
+class FirmwareModifiable(Firmware):
+    def apply_mods(self, mod_names):
+        for mod in mod_names:
+            getattr(self, f'mod_{mod}')()
+
+    def get_available_mods(self):
+        for func in dir(self):
+            if callable(getattr(self, func)) and func.startswith('mod_'):
+                yield func[4:]
+
+    def mod_unlimit_rx(self):
+        self.patch_single(self.ADR_BANDS[0][0], 18_000_000//10)
+        self.patch_single(self.ADR_BANDS[6][1], 1_300_000_000//10)
+        self.patch_single(self.ADR_LIMITS[0], 18_000_000//10)
+        self.patch_single(self.ADR_LIMITS[1], 1_300_000_000//10)
+
+    def mod_unlimit_tx(self):
+        self.patch_single(self.ADR_TX_CHECK, b'\x5d\xe0', 2)
+
+
+class Firmware_2_01_17(FirmwareModifiable):
+    ADR_BANDS = [
+        [0xEAE4,0xEB00],
+        [0xEAE8,0xEB04],
+        [0xEAEC,0xEB08],
+        [0xEAF0,0xEB0C],
+        [0xEAF4,0xEB10],
+        [0xEAF8,0xEB14],
+        [0xEAFC,0xEB18],
+    ]
+    ADR_LIMITS = [0x1AF0, 0x1AF4]
+
+
+class Firmware_2_01_26(FirmwareModifiable):
     ADR_BANDS = [
         [0xE074, 0xE090],
         [0xE078, 0xE094],
@@ -171,19 +199,6 @@ class Firmware_2_01_26(Firmware):
     ADR_LIMITS = [0x150C, 0x1510]
     ADR_TX_CHECK = 0x180E
 
-    def mod_unlimit_rx(self):
-        self.patch_single(self.ADR_BANDS[0][0], 18_000_000//10)
-        self.patch_single(self.ADR_BANDS[6][1], 1_300_000_000//10)
-        self.patch_single(self.ADR_LIMITS[0], 18_000_000//10)
-        self.patch_single(self.ADR_LIMITS[1], 1_300_000_000//10)
-
-    def mod_unlimit_tx(self):
-        self.patch_single(self.ADR_TX_CHECK, b'\x5d\xe0', 2)
-
-
-    def apply_mods(self, mod_names):
-        for mod in mod_names:
-            getattr(self, f'mod_{mod}')()
 
 
 class UVK5(Serial):