kopia lustrzana https://github.com/amedes/pico_tnc
250 wiersze
6.5 KiB
C
250 wiersze
6.5 KiB
C
/*
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Copyright (c) 2021, Kazuhisa Yokota, JN1DFF
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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* Neither the name of the <organization> nor the names of its contributors
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may be used to endorse or promote products derived from this software
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without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include "pico/stdlib.h"
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// For ADC input:
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#include "hardware/adc.h"
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#include "hardware/dma.h"
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#include "hardware/pwm.h"
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#include "hardware/irq.h"
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#include "pico/sem.h"
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#include "hardware/watchdog.h"
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// For resistor DAC output:
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//#include "pico/multicore.h"
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//#include "hardware/pio.h"
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//#include "resistor_dac.pio.h"
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#include "tnc.h"
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#include "decode.h"
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#include "bell202.h"
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//#include "timer.h"
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// Channel 0 is GPIO26
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#define ADC_GPIO 26
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#define BUF_NUM 16
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#define BUF_LEN ((BAUD_RATE * SAMPLING_N * PORT_N + 50) / 100) // ADC samples in 10 ms
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#define DEBUG_PIN 22
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#if ADC_BIT == 8
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static uint8_t buf[BUF_NUM][BUF_LEN];
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#else
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static uint16_t buf[BUF_NUM][BUF_LEN];
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#endif
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// DMA channel for ADC
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static int dma_chan;
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static semaphore_t sem;
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static void dma_handler(void) {
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static int buf_next = 1;
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#if 0
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if (sem_available(&sem) == BUF_NUM) {
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printf("ADC: DMA buffer overrun\n");
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assert(false);
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}
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#endif
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// set buffer address
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dma_channel_set_write_addr(dma_chan, buf[buf_next], true); // trigger DMA
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// release semaphore
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sem_release(&sem);
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// advance ADC buffer
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++buf_next;
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buf_next &= BUF_NUM - 1;
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// clear the interrupt request, ADC DMA using irq1
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dma_hw->ints1 = dma_hw->ints1;
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}
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static const uint8_t cdt_pins[] = {
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#ifdef PICO_DEFAULT_LED_PIN
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PICO_DEFAULT_LED_PIN,
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#else
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20, // port 0
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#endif
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21, // port 1
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22, // port 2
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22, // dummy
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22, // dummy
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};
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void receive_init(void)
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{
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// Init GPIO for analogue use: hi-Z, no pulls, disable digital input buffer.
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uint8_t adc_rr_mask = 0;
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for (int i = 0; i < PORT_N; i++) {
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// initialize GPIO pin for ADC
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int adc_pin = ADC_GPIO + i;
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adc_gpio_init(adc_pin);
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adc_rr_mask |= 1 << i;
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tnc_t *tp = &tnc[i];
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// set cdt led pin
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uint8_t pin = cdt_pins[i];
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gpio_init(pin);
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gpio_set_dir(pin, GPIO_OUT);
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tp->cdt_pin = pin;
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// initialize variables
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tp->cdt = false;
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tp->cdt_lvl = 0;
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tp->avg = 0;
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}
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adc_init();
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adc_select_input(0); // start at ADC 0
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adc_set_round_robin(adc_rr_mask);
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adc_fifo_setup(
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true, // Write each completed conversion to the sample FIFO
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true, // Enable DMA data request (DREQ)
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1, // DREQ (and IRQ) asserted when at least 1 sample present
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false, // We won't see the ERR bit because of 8 bit reads; disable.
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#if ADC_BIT == 8
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true // Shift each sample to 8 bits when pushing to FIFO
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#else
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false // ADC sample 12 bits
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#endif
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);
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#define ADC_CLK (48ULL * 1000 * 1000)
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adc_hw->div = (ADC_CLK * 256 + ADC_SAMPLING_RATE/2) / ADC_SAMPLING_RATE - 256; // (INT part - 1) << 8 | FRAC part
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//
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//printf("adc.div = 0x%x, freq. = %f Hz\n", adc_hw->div, 48e6 * 256 / (adc_hw->div + 256));
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//sleep_ms(1000);
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// Set up the DMA to start transferring data as soon as it appears in FIFO
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dma_chan = dma_claim_unused_channel(true);
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dma_channel_config cfg = dma_channel_get_default_config(dma_chan);
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//printf("initialize DMA channel: %d\n", dma_chan);
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// Reading from constant address, writing to incrementing byte addresses
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#if ADC_BIT == 8
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channel_config_set_transfer_data_size(&cfg, DMA_SIZE_8);
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#else
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channel_config_set_transfer_data_size(&cfg, DMA_SIZE_16);
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#endif
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channel_config_set_read_increment(&cfg, false);
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channel_config_set_write_increment(&cfg, true);
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// Pace transfers based on availability of ADC samples
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channel_config_set_dreq(&cfg, DREQ_ADC);
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channel_config_set_enable(&cfg, true);
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dma_channel_configure(dma_chan, &cfg,
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buf[0], // dst
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&adc_hw->fifo, // src
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BUF_LEN, // transfer count
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false // start immediately
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);
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// DMA irq
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dma_channel_set_irq1_enabled(dma_chan, true);
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irq_set_exclusive_handler(DMA_IRQ_1, dma_handler);
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irq_set_priority(DMA_IRQ_1, 0x40); // high priority
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irq_set_enabled(DMA_IRQ_1, true);
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// initialize semaphore
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sem_init(&sem, 0, BUF_NUM);
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//tnc_init();
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//bell202_init();
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// DMA start
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dma_channel_start(dma_chan);
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// ADC start
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adc_run(true);
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}
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void receive(void)
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{
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static int buf_next = 0;
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static uint8_t port = 0;
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// wait for ADC samples
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if (!sem_acquire_timeout_ms(&sem, 0)) return;
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#ifdef BUSY_PIN
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gpio_put(BUSY_PIN, 1);
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#endif
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++__tnc_time; // advance 10ms timer
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// process adc data
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for (int i = 0; i < BUF_LEN; i++) {
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int val = buf[buf_next][i];
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tnc_t *tp = &tnc[port];
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if (++port >= PORT_N) port = 0; // ADC ch round robin
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// decode Bell202
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#if 0
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#if ADC_BIT == 8
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demodulator(tp, val - 128);
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#else
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demodulator(tp, val - 2048);
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#endif
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#else
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demodulator(tp, val); // pass raw value
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#endif
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}
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// advance next buffer
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++buf_next;
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buf_next &= BUF_NUM - 1;
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#ifdef BUSY_PIN
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gpio_put(BUSY_PIN, 0);
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#endif
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}
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void receive_off(void)
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{
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adc_run(false);
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}
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void receive_on(void)
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{
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adc_run(true);
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}
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