kopia lustrzana https://github.com/bristol-seds/pico-tracker
216 wiersze
7.3 KiB
C
216 wiersze
7.3 KiB
C
/*
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* Functions for turning the GPS timepulse into a HF Clock
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* Copyright (C) 2014 Richard Meadows <richardeoin>
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "samd20.h"
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#include "system/clock.h"
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#include "system/gclk.h"
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#include "system/pinmux.h"
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#include "tc/tc_driver.h"
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#include "hw_config.h"
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#define DFLL48_MUL (DFLL48M_CLK / GPS_TIMEPULSE_FREQ)
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/* Check that DFLL48_MUL is an integer */
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//#if ((DFLL48M_CLK * 100000000) / GPS_TIMEPULSE_FREQ != (DFLL48_MUL * 100000000))
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//#error DFLL48M_CLK must be a integer multiple of GPS_TIMEPULSE_FREQ!
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//#endif
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void timepulse_init(void)
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{
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/* Set up the DFLL GCLK channel */
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system_gclk_chan_set_config(SYSCTRL_GCLK_ID_DFLL48, DFLL48M_GCLK);
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system_gclk_chan_enable(SYSCTRL_GCLK_ID_DFLL48);
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/* Configure DFLL48 */
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system_clock_source_dfll_set_config(
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SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED, /* Loop Mode */
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false, /* On demand */
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SYSTEM_CLOCK_DFLL_QUICK_LOCK_DISABLE, /* Quick Lock */
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SYSTEM_CLOCK_DFLL_CHILL_CYCLE_ENABLE, /* Chill Cycle */
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SYSTEM_CLOCK_DFLL_WAKEUP_LOCK_KEEP, /* Lock during wakeup */
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SYSTEM_CLOCK_DFLL_STABLE_TRACKING_TRACK_AFTER_LOCK,
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0x1f / 4, /* Open Loop - Coarse calibration value */
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0xff / 4, /* Open Loop - Fine calibration value */
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1, /* Closed Loop - Coarse Maximum step */
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1, /* Closed Loop - Fine Maximum step */
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DFLL48_MUL); /* Frequency Multiplication Factor */
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/* Enable DFLL48 */
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system_clock_source_enable(SYSTEM_CLOCK_SOURCE_DFLL);
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/* Wait for it to be ready */
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while(!system_clock_source_is_ready(SYSTEM_CLOCK_SOURCE_DFLL));
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/* system_clock_source_xosc_set_config(SYSTEM_CLOCK_EXTERNAL_CLOCK, */
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/* SYSTEM_XOSC_STARTUP_16384, */
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/* true, /\* Auto gain control *\/ */
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/* 16000000UL, /\* Frequency *\/ */
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/* true, /\* Run in Standby *\/ */
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/* false); /\* Run on demand *\/ */
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/* system_clock_source_enable(SYSTEM_CLOCK_SOURCE_XOSC); */
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/* Configure the HF GCLK */
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system_gclk_gen_set_config(SI406X_HF_GCLK,
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GCLK_SOURCE_DFLL48M, /* Source */
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false, /* High When Disabled */
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48, /* Division Factor */
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false, /* Run in standby */
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true); /* Output Pin Enable */
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/* Configure the output pin */
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system_pinmux_pin_set_config(SI406X_HF_CLK_PINMUX >> 16, /* GPIO Pin */
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SI406X_HF_CLK_PINMUX & 0xFFFF, /* Mux Position */
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SYSTEM_PINMUX_PIN_DIR_INPUT, /* Direction */
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SYSTEM_PINMUX_PIN_PULL_NONE, /* Pull */
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false); /* Powersave */
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/* Enable the HF GCLK */
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system_gclk_gen_enable(SI406X_HF_GCLK);
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}
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/**
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* Switches GCLK_MAIN (a.k.a. GCLK0) to the gps timepulse
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*/
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void switch_gclk_main_to_timepulse(void)
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{
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/* Enable GCLK_IO[0] */
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system_pinmux_pin_set_config(GPS_TIME_PINMUX >> 16, /* GPIO Pin */
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GPS_TIME_PINMUX & 0xFFFF, /* Mux Position */
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SYSTEM_PINMUX_PIN_DIR_INPUT, /* Direction */
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SYSTEM_PINMUX_PIN_PULL_NONE, /* Pull */
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false); /* Powersave */
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/* Switch GCLK_MAIN to GCLK_IO[0] */
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system_gclk_gen_set_config(GCLK_GENERATOR_0, /* GCLK 0 */
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GCLK_SOURCE_GCLKIN,/* Source from pin */
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false, /* High When Disabled */
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1, /* Division Factor */
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true, /* Run in standby */
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true); /* Output Pin Enable */
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/* Wait for switch? */
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}
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/**
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* Outputs GCLK0 div 2 on the HF CLK pin
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*/
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void half_glck_main_on_hf_clk(void)
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{
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bool capture_channel_enables[] = {true, true};
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uint32_t compare_channel_values[] = {0x0000, 0x0000};
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tc_init(TC2,
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GCLK_GENERATOR_0,
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TC_COUNTER_SIZE_8BIT,
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TC_CLOCK_PRESCALER_DIV1,
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TC_WAVE_GENERATION_NORMAL_FREQ,
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TC_RELOAD_ACTION_GCLK,
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TC_COUNT_DIRECTION_UP,
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TC_WAVEFORM_INVERT_OUTPUT_NONE,
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false, /* Oneshot = false */
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false, /* Run in standby = false */
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0x0000, /* Initial value */
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0x0000, /* Top value */
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capture_channel_enables, /* Capture Channel Enables */
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compare_channel_values); /* Compare Channels Values */
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/* Enable the output pin */
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system_pinmux_pin_set_config(PINMUX_PA17F_TC2_WO1 >> 16, /* GPIO Pin */
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PINMUX_PA17F_TC2_WO1 & 0xFFFF, /* Mux Position */
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SYSTEM_PINMUX_PIN_DIR_INPUT, /* Direction */
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SYSTEM_PINMUX_PIN_PULL_NONE, /* Pull */
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false); /* Powersave */
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tc_enable(TC2);
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tc_start_counter(TC2);
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}
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/**
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* Returns the current GCLK_MAIN frequency, as measured against OSC8M
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*/
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uint32_t gclk_main_frequency(void)
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{
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uint32_t osc8m_frequency = 8000000UL >> SYSCTRL->OSC8M.bit.PRESC;
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/* Configure GCLK Gen 6 as reference */
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system_gclk_gen_set_config(GCLK_GENERATOR_6,
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GCLK_SOURCE_OSC8M, /* Source */
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false, /* High When Disabled */
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4, /* Division Factor */
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false, /* Run in standby */
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false); /* Output Pin Enable */
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/* Enable GCLK 6 */
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system_gclk_gen_enable(GCLK_GENERATOR_6);
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/* Timer 0 free runs on GLCK 0 */
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bool t0_capture_channel_enables[] = {false, false};
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uint32_t t0_compare_channel_values[] = {0x0000, 0x0000};
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tc_init(TC0,
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GCLK_GENERATOR_0,
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TC_COUNTER_SIZE_32BIT,
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TC_CLOCK_PRESCALER_DIV1,
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TC_WAVE_GENERATION_NORMAL_FREQ,
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TC_RELOAD_ACTION_GCLK,
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TC_COUNT_DIRECTION_UP,
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TC_WAVEFORM_INVERT_OUTPUT_NONE,
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false, /* Oneshot */
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false, /* Run in standby */
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0x0000, /* Initial value */
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0xFFFFFFFF, /* Top value */
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t0_capture_channel_enables, /* Capture Channel Enables */
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t0_compare_channel_values); /* Compare Channels Values */
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/* Timer 3 counts 10000 cycles of GLCK 6 */
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bool t1_capture_channel_enables[] = {false, false};
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uint32_t t1_compare_channel_values[] = {10000, 0x0000};
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tc_init(TC3,
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GCLK_GENERATOR_6,
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TC_COUNTER_SIZE_16BIT,
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TC_CLOCK_PRESCALER_DIV1,
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TC_WAVE_GENERATION_NORMAL_FREQ,
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TC_RELOAD_ACTION_GCLK,
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TC_COUNT_DIRECTION_UP,
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TC_WAVEFORM_INVERT_OUTPUT_NONE,
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false, /* Oneshot */
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false, /* Run in standby */
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0x0000, /* Initial value */
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0xFFFF, /* Top value */
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t1_capture_channel_enables, /* Capture Channel Enables */
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t1_compare_channel_values); /* Compare Channels Values */
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tc_enable(TC0);
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tc_enable(TC3);
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tc_start_counter(TC0);
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tc_start_counter(TC3);
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/* Wait 10000 cycles of GCLK 6 */
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while (!(tc_get_status(TC3) & TC_STATUS_CHANNEL_0_MATCH));
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uint32_t gclk_main_count = tc_get_count_value(TC0) - 50;
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return gclk_main_count / 10;
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}
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