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733 wiersze
23 KiB
C
733 wiersze
23 KiB
C
/**
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* \file
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*
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* \brief SAM D20/D21/R21 RTC Driver (Count Mode)
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*
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* Copyright (C) 2012-2014 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#ifndef RTC_COUNT_H_INCLUDED
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#define RTC_COUNT_H_INCLUDED
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/**
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* \defgroup asfdoc_sam0_rtc_count_group SAM D20/D21/R21 RTC Count Driver (RTC COUNT)
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*
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* This driver for SAM D20/D21/R21 devices provides an interface for the configuration
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* and management of the device's Real Time Clock functionality in Count
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* operating mode, for the configuration and retrieval of the current RTC
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* counter value. The following driver API modes are covered by this
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* manual:
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*
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* - Polled APIs
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* \if RTC_COUNT_CALLBACK_MODE
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* - Callback APIs
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* \endif
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*
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* The following peripherals are used by this module:
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*
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* - RTC (Real Time Clock)
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*
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* The outline of this documentation is as follows:
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* - \ref asfdoc_sam0_rtc_count_prerequisites
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* - \ref asfdoc_sam0_rtc_count_module_overview
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* - \ref asfdoc_sam0_rtc_count_special_considerations
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* - \ref asfdoc_sam0_rtc_count_extra_info
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* - \ref asfdoc_sam0_rtc_count_examples
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* - \ref asfdoc_sam0_rtc_count_api_overview
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*
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*
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* \section asfdoc_sam0_rtc_count_prerequisites Prerequisites
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*
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* There are no prerequisites for this module.
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*
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*
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* \section asfdoc_sam0_rtc_count_module_overview Module Overview
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*
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* The RTC module in the SAM D20/D21/R21 devices is a 32-bit counter, with a 10-bit
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* programmable prescaler. Typically, the RTC clock is run continuously,
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* including in the device's low-power sleep modes, to track the current time
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* and date information. The RTC can be used as a source to wake up the system
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* at a scheduled time or periodically using the alarm functions.
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*
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* In this driver, the RTC is operated in Count mode. This allows for an
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* easy integration of an asynchronous counter into a user application, which is
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* capable of operating while the device is in sleep mode.
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*
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* Whilst operating in Count mode, the RTC features:
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* - 16-bit counter mode
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* - Selectable counter period
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* - Up to 6 configurable compare values
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* - 32-bit counter mode
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* - Clear counter value on match
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* - Up to 4 configurable compare values
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*
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*
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* \section asfdoc_sam0_rtc_count_module_overview_compares Compare and Overflow
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* The RTC can be used with up to 4/6 compare values (depending on selected
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* operation mode). These compare values will trigger on match with the current
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* RTC counter value, and can be set up to trigger an interrupt, event, or both.
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* The RTC can also be configured to clear the counter value on compare match
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* in 32-bit mode, resetting the count value back to zero.
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*
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* If the RTC is operated without the Clear on Match option enabled, or in
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* 16-bit mode, the RTC counter value will instead be cleared on overflow once
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* the maximum count value has been reached:
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*
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* \f[ COUNT_{MAX} = 2^{32}-1 \f] for 32-bit counter mode, and
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* \f[ COUNT_{MAX} = 2^{16}-1 \f] for 16-bit counter mode.
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*
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* When running in 16-bit mode, the overflow value is selectable with a period
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* value. The counter overflow will then occur when the counter value reaches
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* the specified period value.
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*
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* \subsection asfdoc_sam0_rtc_count_module_overview_periodic Periodic Events
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* The RTC can generate events at periodic intervals, allowing for direct
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* peripheral actions without CPU intervention. The periodic events can be
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* generated on the upper 8 bits of the RTC prescaler, and will be generated on
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* the rising edge transition of the specified bit. The resulting periodic
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* frequency can be calculated by the following formula:
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*
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* \f[ f_{PERIODIC}=\frac{f_{ASY}}{2^{n+3}} \f]
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*
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* Where \f$f_{ASY}\f$ refers to the \e asynchronous clock set up in the RTC
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* module configuration. The \b n parameter is the event source generator index
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* of the RTC module. If the asynchronous clock is operated at the recommended
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* frequency of 1 KHz, the formula results in the values shown in
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* \ref asfdoc_sam0_rtc_count_module_rtc_hz "the table below".
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*
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* \anchor asfdoc_sam0_rtc_count_module_rtc_hz
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* <table>
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* <caption>RTC event frequencies for each prescaler bit using a 1KHz clock</caption>
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* <tr>
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* <th>n</th> <th>Periodic event</th>
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* </tr>
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* <tr>
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* <td>7</td> <td>1 Hz</td>
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* </tr>
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* <tr>
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* <td>6</td> <td>2 Hz</td>
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* </tr>
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* <tr>
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* <td>5</td> <td>4 Hz</td>
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* </tr>
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* <tr>
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* <td>4</td> <td>8 Hz</td>
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* </tr>
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* <tr>
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* <td>3</td> <td>16 Hz</td>
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* </tr>
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* <tr>
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* <td>2</td> <td>32 Hz</td>
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* </tr>
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* <tr>
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* <td>1</td> <td>64 Hz</td>
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* </tr>
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* <tr>
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* <td>0</td> <td>128 Hz</td>
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* </tr>
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* </table>
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*
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* \note The connection of events between modules requires the use of the
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* \ref asfdoc_sam0_events_group "SAM D20/D21/R21 Event System Driver (EVENTS)"
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* to route output event of one module to the the input event of another.
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* For more information on event routing, refer to the event driver
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* documentation.
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*
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* \subsection asfdoc_sam0_rtc_count_module_overview_correction Digital Frequency Correction
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* The RTC module contains Digital Frequency Correction logic to compensate for
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* inaccurate source clock frequencies which would otherwise result in skewed
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* time measurements. The correction scheme requires that at least two bits
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* in the RTC module prescaler are reserved by the correction logic. As a
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* result of this implementation, frequency correction is only available when
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* the RTC is running from a 1 Hz reference clock.
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*
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* The correction procedure is implemented by subtracting or adding a single
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* cycle from the RTC prescaler every 1024 RTC GCLK cycles. The adjustment is
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* applied the specified number of time (max 127) over 976 of these periods. The
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* corresponding correction in PPM will be given by:
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*
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* \f[ Correction(PPM) = \frac{VALUE}{999424}10^6 \f]
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*
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* The RTC clock will tick faster if provided with a positive correction value,
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* and slower when given a negative correction value.
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*
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*
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* \section asfdoc_sam0_rtc_count_special_considerations Special Considerations
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*
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* \subsection asfdoc_sam0_rtc_count_special_considerations_clock Clock Setup
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* The RTC is typically clocked by a specialized GCLK generator that has a
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* smaller prescaler than the others. By default the RTC clock is on, selected
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* to use the internal 32 KHz RC-oscillator with a prescaler of 32, giving a
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* resulting clock frequency of 1 KHz to the RTC. When the internal RTC
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* prescaler is set to 1024, this yields an end-frequency of 1 Hz.
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*
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* The implementer also has the option to set other end-frequencies.
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* \ref asfdoc_sam0_rtc_count_rtc_out_freq "The table below" lists the
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* available RTC frequencies for each possible GCLK and RTC input prescaler
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* options.
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*
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* \anchor asfdoc_sam0_rtc_count_rtc_out_freq
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* <table>
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* <caption>RTC output frequencies from allowable input clocks</caption>
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* <tr>
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* <th>End-frequency</th>
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* <th>GCLK prescaler</th>
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* <th>RTC Prescaler</th>
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* </tr>
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* <tr>
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* <td>32 KHz</td>
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* <td>1</td>
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* <td>1</td>
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* </tr>
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* <tr>
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* <td>1 KHz</td>
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* <td>32</td>
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* <td>1</td>
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* </tr>
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* <tr>
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* <td>1 Hz</td>
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* <td>32</td>
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* <td>1024</td>
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* </tr>
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* </table>
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*
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* The overall RTC module clocking scheme is shown in
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* \ref asfdoc_sam0_rtc_count_rtc_clock_fig "the figure below".
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*
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* \anchor asfdoc_sam0_rtc_count_rtc_clock_fig
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* \dot
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* digraph clocking_scheme {
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* rankdir=LR;
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* GCLK [shape="record", label="<f0> GCLK | <f1> RTC_GCLK",
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* bgcolor="lightgray", style="filled"];
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* RTCPRE [shape="record" label="<f0> RTC | <f1> RTC PRESCALER"];
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* RTC [shape="record", label="<f0> RTC | <f1> RTC CLOCK"];
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*
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* GCLK:f1 -> RTCPRE:f1;
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* RTCPRE:f1 -> RTC:f1;
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* }
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* \enddot
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*
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*
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* \section asfdoc_sam0_rtc_count_extra_info Extra Information
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*
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* For extra information see \ref asfdoc_sam0_rtc_count_extra. This includes:
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* - \ref asfdoc_sam0_rtc_count_extra_acronyms
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* - \ref asfdoc_sam0_rtc_count_extra_dependencies
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* - \ref asfdoc_sam0_rtc_count_extra_errata
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* - \ref asfdoc_sam0_rtc_count_extra_history
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*
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*
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* \section asfdoc_sam0_rtc_count_examples Examples
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*
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* For a list of examples related to this driver, see
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* \ref asfdoc_sam0_rtc_count_exqsg.
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*
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*
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* \section asfdoc_sam0_rtc_count_api_overview API Overview
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* @{
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*/
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#include "samd20.h"
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#include <stdbool.h>
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/**
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* \brief Available operation modes for the RTC.
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*
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* RTC Count operating modes, to select the counting width and associated module
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* operation.
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*/
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enum rtc_count_mode {
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/** RTC Count module operates in 16-bit mode. */
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RTC_COUNT_MODE_16BIT = 0,
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/** RTC Count module operates in 32-bit mode. */
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RTC_COUNT_MODE_32BIT = 1,
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};
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/**
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* \brief Available compare channels.
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*
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* \note Not all compare channels are available in all devices and modes.
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*/
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enum rtc_count_compare {
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/** Compare channel 0. */
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RTC_COUNT_COMPARE_0 = 0,
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#if (RTC_NUM_OF_COMP16 > 1) || defined(__DOXYGEN__)
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/** Compare channel 1. */
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RTC_COUNT_COMPARE_1 = 1,
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#endif
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#if (RTC_NUM_OF_COMP16 > 2) || defined(__DOXYGEN__)
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/** Compare channel 2. */
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RTC_COUNT_COMPARE_2 = 2,
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#endif
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#if (RTC_NUM_OF_COMP16 > 3) || defined(__DOXYGEN__)
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/** Compare channel 3. */
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RTC_COUNT_COMPARE_3 = 3,
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#endif
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#if (RTC_NUM_OF_COMP16 > 4) || defined(__DOXYGEN__)
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/** Compare channel 4. */
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RTC_COUNT_COMPARE_4 = 4,
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#endif
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#if (RTC_NUM_OF_COMP16 > 5) || defined(__DOXYGEN__)
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/** Compare channel 5. */
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RTC_COUNT_COMPARE_5 = 5,
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#endif
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};
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/**
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* \brief RTC input clock prescaler settings
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*
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* The available input clock prescaler values for the RTC count module.
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*/
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enum rtc_count_prescaler {
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/** RTC input clock frequency is prescaled by a factor of 1. */
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RTC_COUNT_PRESCALER_DIV_1 = RTC_MODE0_CTRL_PRESCALER_DIV1,
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/** RTC input clock frequency is prescaled by a factor of 2. */
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RTC_COUNT_PRESCALER_DIV_2 = RTC_MODE0_CTRL_PRESCALER_DIV2,
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/** RTC input clock frequency is prescaled by a factor of 4. */
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RTC_COUNT_PRESCALER_DIV_4 = RTC_MODE0_CTRL_PRESCALER_DIV4,
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/** RTC input clock frequency is prescaled by a factor of 8. */
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RTC_COUNT_PRESCALER_DIV_8 = RTC_MODE0_CTRL_PRESCALER_DIV8,
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/** RTC input clock frequency is prescaled by a factor of 16. */
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RTC_COUNT_PRESCALER_DIV_16 = RTC_MODE0_CTRL_PRESCALER_DIV16,
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/** RTC input clock frequency is prescaled by a factor of 32. */
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RTC_COUNT_PRESCALER_DIV_32 = RTC_MODE0_CTRL_PRESCALER_DIV32,
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/** RTC input clock frequency is prescaled by a factor of 64. */
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RTC_COUNT_PRESCALER_DIV_64 = RTC_MODE0_CTRL_PRESCALER_DIV64,
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/** RTC input clock frequency is prescaled by a factor of 128. */
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RTC_COUNT_PRESCALER_DIV_128 = RTC_MODE0_CTRL_PRESCALER_DIV128,
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/** RTC input clock frequency is prescaled by a factor of 256. */
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RTC_COUNT_PRESCALER_DIV_256 = RTC_MODE0_CTRL_PRESCALER_DIV256,
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/** RTC input clock frequency is prescaled by a factor of 512. */
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RTC_COUNT_PRESCALER_DIV_512 = RTC_MODE0_CTRL_PRESCALER_DIV512,
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/** RTC input clock frequency is prescaled by a factor of 1024. */
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RTC_COUNT_PRESCALER_DIV_1024 = RTC_MODE0_CTRL_PRESCALER_DIV1024,
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};
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/**
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* \brief RTC Count event enable/disable structure.
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*
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* Event flags for the \ref rtc_count_enable_events() and
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* \ref rtc_count_disable_events().
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*/
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struct rtc_count_events {
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/** Generate an output event on each overflow of the RTC count. */
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bool generate_event_on_overflow;
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/** Generate an output event on a compare channel match against the RTC
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* count. */
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bool generate_event_on_compare[RTC_NUM_OF_COMP16];
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/** Generate an output event periodically at a binary division of the RTC
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* counter frequency (see
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* \ref asfdoc_sam0_rtc_count_module_overview_periodic).
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*/
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bool generate_event_on_periodic[8];
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};
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/**
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* \brief RTC Count configuration structure
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*
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* Configuration structure for the RTC instance. This structure should
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* be initialized using the \ref rtc_count_get_config_defaults() before any
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* user configurations are set.
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*/
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struct rtc_count_config {
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/** Input clock prescaler for the RTC module. */
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enum rtc_count_prescaler prescaler;
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/** Select the operation mode of the RTC.*/
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enum rtc_count_mode mode;
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/** If true, clears the counter value on compare match. Only available
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* whilst running in 32-bit mode. */
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bool clear_on_match;
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/** Continuously update the counter value so no synchronization is
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* needed for reading. */
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bool continuously_update;
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/** Array of Compare values. Not all Compare values are available in 32-bit
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* mode. */
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uint32_t compare_values[RTC_NUM_OF_COMP16];
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};
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/**
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* \brief Determines if the hardware module(s) are currently synchronizing to the bus.
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*
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* Checks to see if the underlying hardware peripheral module(s) are currently
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* synchronizing across multiple clock domains to the hardware bus, This
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* function can be used to delay further operations on a module until such time
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* that it is ready, to prevent blocking delays for synchronization in the
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* user application.
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*
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* \param[in] module RTC hardware module
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*
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* \return Synchronization status of the underlying hardware module(s).
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*
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* \retval true if the module has completed synchronization
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* \retval false if the module synchronization is ongoing
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*/
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static inline bool rtc_count_is_syncing(void)
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{
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if (RTC->MODE0.STATUS.reg & RTC_STATUS_SYNCBUSY) {
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return true;
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}
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return false;
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}
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/**
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* \brief Gets the RTC default configurations.
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*
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* Initializes the configuration structure to default values. This
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* function should be called at the start of any RTC initialization.
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*
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* The default configuration is as follows:
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* - Input clock divided by a factor of 1024.
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* - RTC in 32 bit mode.
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* - Clear on compare match off.
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* - Continuously sync count register off.
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* - No event source on.
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* - All compare values equal 0.
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*
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* \param[out] config Configuration structure to be initialized to default
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* values.
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*/
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static inline void rtc_count_get_config_defaults(
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struct rtc_count_config *const config)
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{
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/* Set default into configuration structure */
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config->prescaler = RTC_COUNT_PRESCALER_DIV_1024;
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config->mode = RTC_COUNT_MODE_32BIT;
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config->clear_on_match = false;
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config->continuously_update = false;
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for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) {
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config->compare_values[i] = 0;
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}
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}
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void rtc_count_reset(void);
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/**
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* \brief Enables the RTC module.
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*
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* Enables the RTC module once it has been configured, ready for use. Most
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* module configuration parameters cannot be altered while the module is enabled.
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*
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* \param[in,out] module RTC hardware module
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*/
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static inline void rtc_count_enable(void)
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{
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while (rtc_count_is_syncing()) {
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/* Wait for synchronization */
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}
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/* Enable RTC module. */
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RTC->MODE0.CTRL.reg |= RTC_MODE0_CTRL_ENABLE;
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}
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/**
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* \brief Disables the RTC module.
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*
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* Disables the RTC module.
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*
|
|
* \param[in,out] module RTC hardware module
|
|
*/
|
|
static inline void rtc_count_disable(void)
|
|
{
|
|
while (rtc_count_is_syncing()) {
|
|
/* Wait for synchronization */
|
|
}
|
|
|
|
/* Disable RTC module. */
|
|
RTC->MODE0.CTRL.reg &= ~RTC_MODE0_CTRL_ENABLE;
|
|
}
|
|
|
|
enum status_code rtc_count_init(
|
|
const struct rtc_count_config *const config);
|
|
|
|
enum status_code rtc_count_frequency_correction(
|
|
const int8_t value);
|
|
|
|
enum status_code rtc_count_set_count(
|
|
const uint32_t count_value);
|
|
|
|
uint32_t rtc_count_get_count(void);
|
|
|
|
enum status_code rtc_count_set_compare(
|
|
const uint32_t comp_value,
|
|
const enum rtc_count_compare comp_index);
|
|
|
|
enum status_code rtc_count_get_compare(
|
|
uint32_t *const comp_value,
|
|
const enum rtc_count_compare comp_index);
|
|
|
|
enum status_code rtc_count_set_period(
|
|
uint16_t period_value);
|
|
|
|
enum status_code rtc_count_get_period(
|
|
uint16_t *const period_value);
|
|
|
|
|
|
/**
|
|
* \brief Check if an RTC overflow has occurred.
|
|
*
|
|
* Checks the overflow flag in the RTC. The flag is set when there
|
|
* is an overflow in the clock.
|
|
*
|
|
* \param[in,out] module RTC hardware module
|
|
*
|
|
* \return Overflow state of the RTC module.
|
|
*
|
|
* \retval true If the RTC count value has overflowed
|
|
* \retval false If the RTC count value has not overflowed
|
|
*/
|
|
|
|
static inline bool rtc_count_is_overflow(void)
|
|
{
|
|
/* Return status of flag */
|
|
return (RTC->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_OVF);
|
|
}
|
|
|
|
/**
|
|
* \brief Clears the RTC overflow flag.
|
|
*
|
|
* Clears the RTC module counter overflow flag, so that new overflow conditions
|
|
* can be detected.
|
|
*
|
|
* \param[in,out] module RTC hardware module
|
|
*/
|
|
static inline void rtc_count_clear_overflow(void)
|
|
{
|
|
/* Clear OVF flag */
|
|
RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_OVF;
|
|
}
|
|
|
|
bool rtc_count_is_compare_match(
|
|
const enum rtc_count_compare comp_index);
|
|
|
|
enum status_code rtc_count_clear_compare_match(
|
|
const enum rtc_count_compare comp_index);
|
|
|
|
|
|
/**
|
|
* \brief Enables a RTC event output.
|
|
*
|
|
* Enables one or more output events from the RTC module. See
|
|
* \ref rtc_count_events for a list of events this module supports.
|
|
*
|
|
* \note Events cannot be altered while the module is enabled.
|
|
*
|
|
* \param[in,out] module RTC hardware module
|
|
* \param[in] events Struct containing flags of events to enable
|
|
*/
|
|
static inline void rtc_count_enable_events(
|
|
struct rtc_count_events *const events)
|
|
{
|
|
uint32_t event_mask = 0;
|
|
|
|
/* Check if the user has requested an overflow event. */
|
|
if (events->generate_event_on_overflow) {
|
|
event_mask |= RTC_MODE0_EVCTRL_OVFEO;
|
|
}
|
|
|
|
/* Check if the user has requested any compare events. */
|
|
for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) {
|
|
if (events->generate_event_on_compare[i]) {
|
|
event_mask |= RTC_MODE0_EVCTRL_CMPEO(1 << i);
|
|
}
|
|
}
|
|
|
|
/* Check if the user has requested any periodic events. */
|
|
for (uint8_t i = 0; i < 8; i++) {
|
|
if (events->generate_event_on_periodic[i]) {
|
|
event_mask |= RTC_MODE0_EVCTRL_PEREO(1 << i);
|
|
}
|
|
}
|
|
|
|
/* Enable given event(s). */
|
|
RTC->MODE0.EVCTRL.reg |= event_mask;
|
|
}
|
|
|
|
/**
|
|
* \brief Disables a RTC event output.
|
|
*
|
|
* Disabled one or more output events from the RTC module. See
|
|
* \ref rtc_count_events for a list of events this module supports.
|
|
*
|
|
* \note Events cannot be altered while the module is enabled.
|
|
*
|
|
* \param[in,out] module RTC hardware module
|
|
* \param[in] events Struct containing flags of events to disable
|
|
*/
|
|
static inline void rtc_count_disable_events(
|
|
struct rtc_count_events *const events)
|
|
{
|
|
uint32_t event_mask = 0;
|
|
|
|
/* Check if the user has requested an overflow event. */
|
|
if (events->generate_event_on_overflow) {
|
|
event_mask |= RTC_MODE0_EVCTRL_OVFEO;
|
|
}
|
|
|
|
/* Check if the user has requested any compare events. */
|
|
for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) {
|
|
if (events->generate_event_on_compare[i]) {
|
|
event_mask |= RTC_MODE0_EVCTRL_CMPEO(1 << i);
|
|
}
|
|
}
|
|
|
|
/* Check if the user has requested any periodic events. */
|
|
for (uint8_t i = 0; i < 8; i++) {
|
|
if (events->generate_event_on_periodic[i]) {
|
|
event_mask |= RTC_MODE0_EVCTRL_PEREO(1 << i);
|
|
}
|
|
}
|
|
|
|
/* Disable given event(s). */
|
|
RTC->MODE0.EVCTRL.reg &= ~event_mask;
|
|
}
|
|
|
|
|
|
/**
|
|
* \page asfdoc_sam0_rtc_count_extra Extra Information for RTC COUNT Driver
|
|
*
|
|
* \section asfdoc_sam0_rtc_count_extra_acronyms Acronyms
|
|
* Below is a table listing the acronyms used in this module, along with their
|
|
* intended meanings.
|
|
*
|
|
* <table>
|
|
* <tr>
|
|
* <th>Acronym</td>
|
|
* <th>Description</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>RTC</td>
|
|
* <td>Real Time Counter</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>PPM</td>
|
|
* <td>Part Per Million</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>RC</td>
|
|
* <td>Resistor/Capacitor</td>
|
|
* </tr>
|
|
* </table>
|
|
*
|
|
*
|
|
* \section asfdoc_sam0_rtc_count_extra_dependencies Dependencies
|
|
* This driver has the following dependencies:
|
|
*
|
|
* - None
|
|
*
|
|
*
|
|
* \section asfdoc_sam0_rtc_count_extra_errata Errata
|
|
* There are no errata related to this driver.
|
|
*
|
|
*
|
|
* \section asfdoc_sam0_rtc_count_extra_history Module History
|
|
* An overview of the module history is presented in the table below, with
|
|
* details on the enhancements and fixes made to the module since its first
|
|
* release. The current version of this corresponds to the newest version in
|
|
* the table.
|
|
*
|
|
* <table>
|
|
* <tr>
|
|
* <th>Changelog</th>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>
|
|
* Added support for SAMD21 and added driver instance parameter to all
|
|
* API function calls, except get_config_defaults.
|
|
* </td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>Updated initialization function to also enable the digital interface
|
|
* clock to the module if it is disabled.</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>Initial Release</td>
|
|
* </tr>
|
|
* </table>
|
|
*/
|
|
|
|
/**
|
|
* \page asfdoc_sam0_rtc_count_exqsg Examples for RTC (COUNT) Driver
|
|
*
|
|
* This is a list of the available Quick Start guides (QSGs) and example
|
|
* applications for \ref asfdoc_sam0_rtc_count_group. QSGs are simple
|
|
* examples with step-by-step instructions to configure and use this driver in a
|
|
* selection of use cases. Note that QSGs can be compiled as a standalone
|
|
* application or be added to the user application.
|
|
*
|
|
* - \subpage asfdoc_sam0_rtc_count_basic_use_case
|
|
* \if RTC_COUNT_CALLBACK_MODE
|
|
* - \subpage asfdoc_sam0_rtc_count_callback_use_case
|
|
* \endif
|
|
*
|
|
* \page asfdoc_sam0_rtc_count_document_revision_history Document Revision History
|
|
*
|
|
* <table>
|
|
* <tr>
|
|
* <th>Doc. Rev.</td>
|
|
* <th>Date</td>
|
|
* <th>Comments</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>D</td>
|
|
* <td>03/2014</td>
|
|
* <td>Added support for SAMR21.</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>C</td>
|
|
* <td>01/2014</td>
|
|
* <td>Added support for SAMD21.</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>B</td>
|
|
* <td>06/2013</td>
|
|
* <td>Added additional documentation on the event system. Corrected
|
|
* documentation typos.</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>A</td>
|
|
* <td>06/2013</td>
|
|
* <td>Initial release</td>
|
|
* </tr>
|
|
* </table>
|
|
*/
|
|
|
|
#endif /* RTC_COUNT_H_INCLUDED */
|