[Refactor] Now uses si_trx for the radio

rocketry
Richard Eoin Meadows 2014-11-18 14:37:36 +00:00
rodzic afabff5734
commit 41717efce2
4 zmienionych plików z 72 dodań i 85 usunięć

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@ -25,7 +25,9 @@
#ifndef SI_TRX_H
#define SI_TRX_H
void si_trx_reset(void);
void si_trx_on(void);
void si_trx_off(void);
void si_trx_init(void);
void spi_loopback_test(void);

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@ -170,6 +170,14 @@ enum {
SI_PROPERTY_GROUP_SYNTH = 0x23,
SI_PROPERTY_GROUP_FREQ_CONTROL = 0x40,
};
/**
* Si Interrupt Control Properties
*/
enum {
SI_INT_CTL_ENABLE = 0x00,
SI_INT_CTL_PH_ENABLE = 0x01,
SI_INT_CTL_CHIP_ENABLE = 0x02,
};
/**
* Si Global Properties
*/

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@ -38,11 +38,9 @@
#include "system/wdt.h"
#include "timepulse.h"
#include "telemetry.h"
#include "si_trx.h"
#include "si_trx_defs.h"
#include "analogue.h"
#include "si4060.h"
#include "spi_bitbang.h"
#include "rtty.h"
#include "system/interrupt.h"
@ -332,7 +330,7 @@ int main(void)
system_set_sleepmode(SYSTEM_SLEEPMODE_IDLE_2); /* Disable CPU, AHB and APB */
/* Configure the Power Manager */
powermananger_init();
//powermananger_init();
/* Timer 0 for 50Hz triggering */
timer0_tick_init(50);
@ -343,40 +341,23 @@ int main(void)
*/
/* Set the wdt here. We should get to the first reset in one min */
wdt_init();
wdt_reset_count();
//wdt_init();
//wdt_reset_count();
led_init();
gps_init();
/* Initialise Si4060 */
// si_trx_init();
si_trx_init();
si4060_hw_init();
si4060_gpio_init();
si4060_reset();
/* check radio communication */
int i = si4060_part_info();
if (i != 0x4063) {
while(1);
}
// si_trx_ptt_on();
si4060_power_up();
si4060_setup(MOD_TYPE_2FSK);
si4060_gpio_init();
si4060_start_tx(0);
//si_trx_state_tx();
/* Start transmitting */
si_trx_on();
led_on();
while (1) {
/* Watchdog */
wdt_reset_count();
//wdt_reset_count();
/* Send the next packet */
output_telemetry_string();

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@ -62,10 +62,10 @@ void _si_trx_transfer(int tx_count, int rx_count, uint8_t *data)
* procedure.
*/
for (int i = 0; i < 20000; i++); // 20µS
_si_trx_cs_enable();
do {
for (int i = 0; i < 200; i++); /* Approx. 20µS */
_si_trx_cs_enable();
/* Issue READ_CMD_BUFF */
spi_bitbang_transfer(SI_CMD_READ_CMD_BUFF);
response = spi_bitbang_transfer(0xFF);
@ -75,8 +75,6 @@ void _si_trx_transfer(int tx_count, int rx_count, uint8_t *data)
/* Otherwise repeat the procedure */
_si_trx_cs_disable();
for (int i = 0; i < 200; i++); // 20µS
_si_trx_cs_enable();
} while (1); /* TODO: Timeout? */
@ -112,7 +110,7 @@ static void si_trx_power_up(uint8_t clock_source, uint32_t xo_freq)
buffer[5] = (xo_freq >> 8);
buffer[6] = (xo_freq);
_si_trx_transfer(7, 0, buffer + 1);
_si_trx_transfer(7, 0, buffer);
}
/**
* Gets the 16 bit part number
@ -127,12 +125,30 @@ static uint16_t si_trx_get_part_info(void)
return (buffer[1] << 8) | buffer[2];
}
/**
* Clears pending interrupts. Set the corresponding bit low to clear
* the interrupt.
*/
static void si_trx_clear_pending_interrupts(uint8_t packet_handler_clear_pending,
uint8_t chip_clear_pending)
{
uint8_t buffer[4];
buffer[0] = SI_CMD_GET_INT_STATUS;
buffer[1] = packet_handler_clear_pending & ((1<<5)|(1<<1)); /* Mask used bits */
buffer[2] = 0;
buffer[3] = chip_clear_pending;
_si_trx_transfer(4, 0, buffer);
/* This command returns the interrupts status, but we don't use it */
}
/**
* Sets the GPIO configuration for each pin
*/
static void si_trx_gpio_configuration(si_gpio_t gpio0, si_gpio_t gpio1,
si_gpio_t gpio2, si_gpio_t gpio3,
uint8_t drive_strength)
si_gpio_t gpio2, si_gpio_t gpio3,
uint8_t drive_strength)
{
uint8_t buffer[8];
buffer[0] = SI_CMD_GPIO_PIN_CFG;
@ -158,6 +174,16 @@ static void si_trx_frequency_control_set_divider(uint8_t integer_divider,
SI_FREQ_CONTROL_INTE,
divider);
}
/**
* Sets the step size between adjacent channels, in units of the
* resolution of the frac-n pll synthesiser.
*/
static void si_trx_frequency_control_set_channel_step_size(uint16_t step_size)
{
_si_trx_set_property_16(SI_PROPERTY_GROUP_FREQ_CONTROL,
SI_FREQ_CONTROL_CHANNEL_STEP_SIZE,
step_size);
}
/**
* Sets the output divider of the frac-n pll synthesiser
*/
@ -260,59 +286,32 @@ static void si_trx_set_frequency(uint32_t frequency)
*/
void si_trx_reset(void)
{
_si_trx_sdn_enable(); // active high shutdown = reset
_si_trx_sdn_enable(); /* active high shutdown = reset */
for (int i = 0; i < 15*10000; i++); // 15ms
_si_trx_sdn_disable(); // booting
for (int i = 0; i < 15*10000; i++); // 15ms
for (int i = 0; i < 15*10000; i++); /* Approx. 15ms */
_si_trx_sdn_disable(); /* booting */
for (int i = 0; i < 15*10000; i++); /* Approx. 15ms */
//const uint8_t PART_INFO_command[] = {0x01}; // Part Info
//_si_trx_transfer(1, 9, PART_INFO_command);
uint16_t part_number = si_trx_get_part_info();
/* Power Up */
si_trx_power_up(SI_POWER_UP_TCXO, VCXO_FREQUENCY);
/* no patch, boot main app. img, FREQ_VCXO, return 1 byte */
//const uint8_t init_command[] = {0x02, 0x01, 0x01, x3, x2, x1, x0};
//_si_trx_transfer(7, 1 , init_command);
// Clear all pending interrupts and get the interrupt status back
const uint8_t get_int_status_command[] = {0x20, 0x00, 0x00, 0x00};
_si_trx_transfer(4, 9, get_int_status_command);
// cliPrint("Radio ready\n");
const uint8_t set_int_ctrl_enable[] = {0x11, 0x01, 0x01, 0x00, 0x00};
_si_trx_transfer(5, 1, set_int_ctrl_enable);
// cliPrint("Setting no Interrupts (see WDS)\n");
/* Clear pending interrupts */
si_trx_clear_pending_interrupts(0, 0);
/* Disable all interrupts */
_si_trx_set_property_8(SI_PROPERTY_GROUP_INT_CTL, SI_INT_CTL_ENABLE, 0);
// TODO Lower drive dtrength
/* Configure GPIOs */
si_trx_gpio_configuration(SI_GPIO_PIN_CFG_GPIO_MODE_INPUT,
SI_GPIO_PIN_CFG_GPIO_MODE_INPUT | SI_GPIO_PIN_CFG_PULL_ENABLE,
SI_GPIO_PIN_CFG_GPIO_MODE_INPUT,
SI_GPIO_PIN_CFG_GPIO_MODE_INPUT | SI_GPIO_PIN_CFG_PULL_ENABLE,
SI_GPIO_PIN_CFG_DRV_STRENGTH_HIGH);
//const uint8_t set_global_config1[] = {0x11, 0x00, 0x01, 0x03, 0x60};
//_si_trx_transfer(5, 1, set_global_config1);
// Sequencer Mode = Fast, Fifo = Half Duplex
// cliPrint("Setting special global Config 1 changes (see WDS)\n");
// const uint8_t set_global_xo_tune_command[] = {0x11, 0x00, 0x01, 0x00, 0x00};
//_si_trx_transfer(5, 1, set_global_xo_tune_command);
// cliPrint("Setting no additional capacitance on VXCO\n");
si_trx_set_frequency(RADIO_FREQUENCY);
si_trx_set_tx_power(RADIO_POWER);
@ -325,20 +324,25 @@ void si_trx_reset(void)
si_trx_state_tx_tune();
}
void si_trx_ptt_on(void)
/**
* Enables the radio and starts transmitting
*/
void si_trx_on(void)
{
si_trx_reset();
si_trx_state_tx();
}
void si_trx_ptt_off(void)
/**
* Disables the radio and places it in shutdown
*/
void si_trx_off(void)
{
si_trx_state_ready();
_si_trx_sdn_enable();
}
/**
* Initialises the radio hardware
* Initialises the radio interface to the radio
*/
void si_trx_init(void)
{
@ -379,14 +383,6 @@ void si_trx_init(void)
spi_bitbang_init(SI406X_SERCOM_MOSI_PIN,
SI406X_SERCOM_MISO_PIN,
SI406X_SERCOM_SCK_PIN);
/* Boot */
for (int i = 0; i < 15*10000; i++); // 15ms
_si_trx_sdn_disable();
for (int i = 0; i < 15*10000; i++); // 15ms
const uint8_t PART_INFO_command[] = {0x01}; // Part Info
_si_trx_transfer(1, 9, PART_INFO_command);
}