Add README.md content that msised the squash

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graham sanderson 2021-01-24 16:21:45 -06:00 zatwierdzone przez Graham Sanderson
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@ -10,6 +10,12 @@ RP2040 design was final and as such were all run against FPGA. As a result some
that you wouldn't necessarily need to if you had more clock speed available (which you do), but on the plus side,
you have that much more time to do even more things!
Finally, you may wonder why many of these demos set the system clock to 48Mhz. The reason is that until we had physical
chips, we were running at a fixed 48Mhz system clock using an FPGA. Most of these examples were written before the
RP2040 design was final, so were all developed with that fixed 48MHz system clock. As a result some of the examples do things in a way
that you wouldn't necessarily need to if you had more clock speed available (which you do), but on the plus side,
you have that much more time to do even more things!
## Full Applications
Name|Description