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pico-hf-oscillator
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It works up to ~9.8 MHz nicely. +refactor.

gpstest
roman 2023-11-10 23:36:35 +03:00
rodzic f143e1cd17
commit cfcb7ba717
6 zmienionych plików z 370 dodań i 73 usunięć
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2
CMakeLists.txt
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@ -2,6 +2,8 @@
cmake_minimum_required(VERSION 3.13)
set(CMAKE_BUILD_TYPE "Release")
set(CMAKE_C_STANDARD 11)
set(CMAKE_CXX_STANDARD 17)

77
defines.h 100644
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@ -0,0 +1,77 @@
///////////////////////////////////////////////////////////////////////////////
//
// Roman Piksaykin [piksaykin@gmail.com], R2BDY
// https://www.qrz.com/db/r2bdy
//
///////////////////////////////////////////////////////////////////////////////
//
//
// defines.h - Macro definitions of the project.
//
//
// DESCRIPTION
//
// .
//
// PLATFORM
// Raspberry Pi pico.
//
// REVISION HISTORY
//
// Rev 0.1 05 Nov 2023
// Initial release.
//
// LICENCE
// MIT License (http://www.opensource.org/licenses/mit-license.php)
//
// Copyright (c) 2023 by Roman Piksaykin
//
// Permission is hereby granted, free of charge,to any person obtaining a copy
// of this software and associated documentation files (the Software), to deal
// in the Software without restriction,including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY,WHETHER IN AN ACTION OF CONTRACT,TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
// THE SOFTWARE.
///////////////////////////////////////////////////////////////////////////////
#ifndef DEFINES_H
#define DEFINES_H
#define DEBUGLOG 1
#define FALSE 0 /* Something is false. */
#define TRUE 1 /* Something is true. */
#define BAD 0 /* Something is bad. */
#define GOOD 1 /* Something is good. */
#define INVALID 0 /* Something is invalid. */
#define VALID 1 /* Something is valid. */
#define NO 0 /* The answer is no. */
#define YES 1 /* The answer is yes. */
#define OFF 0 /* Turn something off. */
#define ON 1 /* Turn something on. */
#define RAM __not_in_flash_func /* Place time-critical func in RAM */
#define RAM_A __not_in_flash("A") /* Place time-critical var in RAM */
#define TWO_PI (1<<24)
/* A macro for arithmetic right shifts, with casting of the argument. */
#define iSAR(arg, rcount) (((int32_t)(arg)) >> (rcount))
/* A macro of multiplication guarantees of doing so using 1 ASM command. */
#define iMUL32ASM(a,b) __mul_instruction((int32_t)(a), (int32_t)(b))
/* Performing the square by ASM. */
#define iSquare32ASM(x) (iMUL32ASM((x), (x)))
#endif

74
piodco/dco.pio
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@ -1,51 +1,67 @@
.program dco
set x, 0
set y, 0
.wrap_target
pull ifempty // 1
out y, 32 // load 8-bit delay value in terms of cycles. 2
.wrap_target // CYCLES
pull // load full 32-bit register. 1c
out y, 8 // load 8-bit delay value. 2c
mov x, y // copy value in order to do next PI cycle. 3c
LOOP0:
jmp y-- LOOP0 // do accurate delay. 3+t
set pins, 1 // set pins = 1. 4+t.
pull ifempty // 5+t
out y, 32 // load 8-bit delay value in terms of cycles. 6+t
jmp x-- LOOP0 // do exactly X*CPU CLK delay. 4c+x
set pins, 1 [3] // set output high. 5c+x
LOOP1:
jmp y-- LOOP1 // 7+t
set pins, 0 // 8+t
// CLK/8 max, 250MHz/8 = 31.25 MHz output max frq.
// CLK/(255+8) min, 250MHz/263 = 950 kHz min frq.
// So, it covers 3..30 MHz HF band + 160 meter band.
// pull ifempty
// out y, 32
//LOOP2:
// jmp y-- LOOP2
// set pins, 1
jmp y-- LOOP1 // do exactly X*CPU CLK delay. 8c+x
set pins, 0 // set output high. 9c+x
// RPix: The next sections repeat aforementioned algo 3 times.
out y, 8
mov x, y [1]
LOOP2:
jmp x-- LOOP2
set pins, 1 [3]
LOOP3:
jmp y-- LOOP3
set pins, 0
// pull ifempty
// out y, 32
//LOOP3:
// jmp y-- LOOP3
// set pins, 0
out y, 8
mov x, y [1]
LOOP4:
jmp x-- LOOP4
set pins, 1 [3]
LOOP5:
jmp y-- LOOP5
set pins, 0
out y, 8
mov x, y [1]
LOOP6:
jmp x-- LOOP6
set pins, 1 [3]
LOOP7:
jmp y-- LOOP7
set pins, 0
.wrap
% c-sdk {
#define PIOASM_DELAY_CYCLES 5
static inline void dco_program_init(PIO pio, uint sm, uint offset, uint pin)
{
pio_sm_config c = dco_program_get_default_config(offset);
sm_config_set_out_pins(&c, pin, 1);
pio_gpio_init(pio, pin);
sm_config_set_out_shift(&c, false, true, 32); // Autopull.
sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
//sm_config_set_out_shift(&c, true, true, 32); // Autopull.
pio_sm_set_consecutive_pindirs(pio, sm, pin, 1, true);
sm_config_set_clkdiv(&c, 1.f);
sm_config_set_clkdiv_int_frac(&c, 1u, 0u);
pio_sm_init(pio, sm, offset, &c);
pio_sm_set_enabled(pio, sm, true);
@ -63,4 +79,8 @@ static inline void dco_program_puts(PIO pio, uint sm, const uint32_t *s)
pio_sm_put_blocking(pio, sm, s[7]);
}
static inline void dco_program_puts1w(PIO pio, uint sm, const uint32_t val)
{
pio_sm_put_blocking(pio, sm, val);
}
%}

145
piodco/piodco.c
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@ -1,3 +1,64 @@
///////////////////////////////////////////////////////////////////////////////
//
// Roman Piksaykin [piksaykin@gmail.com], R2BDY
// https://www.qrz.com/db/r2bdy
//
///////////////////////////////////////////////////////////////////////////////
//
//
// piodco.c - Digital controlled radio freq oscillator based on PIO.
//
//
// DESCRIPTION
//
// The oscillator provides precise generation of any frequency ranging
// from 1.5 to 9.8 MHz with tenth's of millihertz resolution (please note that
// this is relative resolution owing to the fact that the absolute accuracy of
// onboard crystal of pi pico is limited).
// The DCO uses phase locked loop principle programmed in C.
// The DCO does *NOT* use any floating point operations - all time-critical
// instructions run in 1 CPU cycle.
// Currently the upper freq. limit is about 9.8 MHz and it is achieved only
// using pi pico overclocking to 270MHz.
// Owing to the meager frequency step, it is possible to use 3, 5, or 7th
// harmonics of generated frequency. Such solution completely cover all HF and
// low band up to about 66 MHz.
// This is an experimental project of amateur radio class and it is devised
// by me on the free will base in order to experiment with QRP narrowband
// digital modes.
// I gracefully appreciate any thoughts or comments on that matter.
//
// PLATFORM
// Raspberry Pi pico.
//
// REVISION HISTORY
//
// Rev 0.1 05 Nov 2023
// Initial release.
//
// LICENCE
// MIT License (http://www.opensource.org/licenses/mit-license.php)
//
// Copyright (c) 2023 by Roman Piksaykin
//
// Permission is hereby granted, free of charge,to any person obtaining a copy
// of this software and associated documentation files (the Software), to deal
// in the Software without restriction,including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY,WHETHER IN AN ACTION OF CONTRACT,TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
// THE SOFTWARE.
///////////////////////////////////////////////////////////////////////////////
#include "piodco.h"
#include <string.h>
@ -5,15 +66,21 @@
#include "build/dco.pio.h"
int PioDCOInit(PioDco *pdco, uint32_t ui32_clock_hz)
/// @brief Initializes DCO context and prepares PIO hardware.
/// @param pdco Ptr to DCO context.
/// @param gpio The GPIO of DCO output.
/// @param cpuclkhz The system CPU clock freq., Hz.
/// @return 0 if OK.
int PioDCOInit(PioDco *pdco, int gpio, int cpuclkhz)
{
assert_(pdco);
assert_(cpuclkhz);
memset(pdco, 0, sizeof(PioDco));
pdco->_clkfreq_hz = ui32_clock_hz;
pdco->_clkfreq_hz = cpuclkhz;
pdco->_pio = pio0;
pdco->_gpio = 6;
pdco->_gpio = gpio;
pdco->_offset = pio_add_program(pdco->_pio, &dco_program);
pdco->_ism = pio_claim_unused_sm(pdco->_pio, true);
@ -23,35 +90,89 @@ int PioDCOInit(PioDco *pdco, uint32_t ui32_clock_hz)
sm_config_set_set_pins(&pdco->_pio_sm, pdco->_gpio, 1);
pio_gpio_init(pdco->_pio, pdco->_gpio);
pio_sm_init(pdco->_pio, pdco->_ism, pdco->_offset, &pdco->_pio_sm);
pio_sm_set_enabled(pdco->_pio, pdco->_ism, true);
//pio_sm_set_enabled(pdco->_pio, pdco->_ism, true);
return 0;
}
int PioDCOSet(PioDco *pdco, uint32_t ui32_frq_hz)
/// @brief Sets DCO working frequency in Hz.
/// @param pdco Ptr to DCO context.
/// @param ui32_frq_hz The frequency [Hz].
/// @return 0 if OK. -1 invalid freq.
/// @attention The func can be called while DCO running.
int PioDCOSetFreq(PioDco *pdco, uint32_t ui32_frq_hz)
{
assert_(pdco);
assert(pdco->_clkfreq_hz);
/* RPix: Calculate an accurate value of phase increment of the synth freq
per 1 tick of CPU clock, here 2^32 = 2PI. */
const uint64_t frq_lsh32 = (pdco->_clkfreq_hz >> 1) + ((uint64_t)ui32_frq_hz << 32);
pdco->_phase_increment = (uint32_t)(frq_lsh32 / (uint64_t)pdco->_clkfreq_hz);
if(pdco->_clkfreq_hz / ui32_frq_hz < 27)
{
//return -1;
}
/* RPix: Calculate an accurate value of phase increment of the freq
per 1 tick of CPU clock, here 2^24 is scaling coefficient. */
pdco->_frq_cycles_per_pi = (int32_t)(((int64_t)pdco->_clkfreq_hz * (int64_t)(1<<24)
+ (ui32_frq_hz>>1)) / (int64_t)ui32_frq_hz);
return 0;
}
/// @brief Starts the DCO.
/// @param pdco Ptr to DCO context.
void PioDCOStart(PioDco *pdco)
{
assert_(pdco);
pio_sm_set_enabled(pdco->_pio, pdco->_ism, true);
}
/// @brief Stops the DCO.
/// @param pdco Ptr to DCO context.
void PioDCOStop(PioDco *pdco)
{
assert_(pdco);
pio_sm_set_enabled(pdco->_pio, pdco->_ism, false);
}
void PioDCOTick(PioDco *pdco)
/// @brief Main worker task of DCO. It is time critical, so it ought to be run on
/// @brief the dedicated pi pico core.
/// @param pDCO Ptr to DCO context.
/// @return No return. It spins forever.
static int32_t si32precise_cycles;
void RAM (PioDCOWorker)(PioDco *pDCO)
{
assert_(pDCO);
register PIO pio = pDCO->_pio;
register uint sm = pDCO->_ism;
register int32_t i32acc_error = 0;
register uint32_t *preg32 = pDCO->_ui32_pioreg;
register uint8_t *pu8reg = (uint8_t *)preg32;
si32precise_cycles = pDCO->_frq_cycles_per_pi;
for(;;)
{
/* RPix: Load the next precise value of CPU CLK cycles per DCO cycle,
scaled by 2^24. It yields about 24 millihertz resolution at @10MHz
DCO frequency. */
for(int i = 0; i < 32; ++i)
{
/* RPix: Calculate the integer number of CPU CLK cycles per next
DCO cycle, corrected by accumulated error (feedback of the PLL). */
const int32_t i32wc = iSAR(si32precise_cycles - i32acc_error + (1<<23), 24);
/* RPix: Calculate the difference btw calculated value scaled to
`fine` state and precise value of DCO cycles per CPU CLK cycle.
This forms a phase locked loop which provides precise freq
on long run. */
i32acc_error += (i32wc<<24) - si32precise_cycles;
/* RPix: Set PIO array contents corrected by pio program delay
of N CPU CLK cycles owing to pio asm instructions. */
pu8reg[i] = i32wc - PIOASM_DELAY_CYCLES;
}
dco_program_puts(pio, sm, preg32);
}
}

72
piodco/piodco.h
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@ -1,3 +1,64 @@
///////////////////////////////////////////////////////////////////////////////
//
// Roman Piksaykin [piksaykin@gmail.com], R2BDY
// https://www.qrz.com/db/r2bdy
//
///////////////////////////////////////////////////////////////////////////////
//
//
// piodco.h - Digital controlled radio freq oscillator based on PIO.
//
//
// DESCRIPTION
//
// The oscillator provides precise generation of any frequency ranging
// from 1.5 to 9.8 MHz with tenth's of millihertz resolution (please note that
// this is relative resolution owing to the fact that the absolute accuracy of
// onboard crystal of pi pico is limited).
// The DCO uses phase locked loop principle programmed in C.
// The DCO does *NOT* use any floating point operations - all time-critical
// instructions run in 1 CPU cycle.
// Currently the upper freq. limit is about 9.8 MHz and it is achieved only
// using pi pico overclocking to 270MHz.
// Owing to the meager frequency step, it is possible to use 3, 5, or 7th
// harmonics of generated frequency. Such solution completely cover all HF and
// low band up to about 66 MHz.
// This is an experimental project of amateur radio class and it is devised
// by me on the free will base in order to experiment with QRP narrowband
// digital modes.
// I gracefully appreciate any thoughts or comments on that matter.
//
// PLATFORM
// Raspberry Pi pico.
//
// REVISION HISTORY
//
// Rev 0.1 05 Nov 2023
// Initial release.
//
// LICENCE
// MIT License (http://www.opensource.org/licenses/mit-license.php)
//
// Copyright (c) 2023 by Roman Piksaykin
//
// Permission is hereby granted, free of charge,to any person obtaining a copy
// of this software and associated documentation files (the Software), to deal
// in the Software without restriction,including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY,WHETHER IN AN ACTION OF CONTRACT,TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
// THE SOFTWARE.
///////////////////////////////////////////////////////////////////////////////
#ifndef PIODCO_H_
#define PIODCO_H_
@ -6,6 +67,8 @@
#include "pico/stdlib.h"
#include "hardware/pio.h"
#include "defines.h"
typedef struct
{
PIO _pio; /* Worker PIO on this DCO. */
@ -15,8 +78,7 @@ typedef struct
int _ism; /* Index of state maschine. */
int _offset; /* Worker PIO u-program offset. */
uint32_t _phase_prompt; /* Last DCO phase val, [0...2PI). */
uint32_t _phase_increment; /* DCO phase increment, per 1 CLK. */
int32_t _frq_cycles_per_pi; /* CPU CLK cycles per PI. */
uint32_t _ui32_pioreg[8]; /* Shift register to PIO. */
@ -24,12 +86,12 @@ typedef struct
} PioDco;
int PioDCOInit(PioDco *pdco, uint32_t ui32_clock_hz);
int PioDCOSet(PioDco *pdco, uint32_t ui32_frq_hz);
int PioDCOInit(PioDco *pdco, int gpio, int cpuclkhz);
int PioDCOSetFreq(PioDco *pdco, uint32_t ui32_frq_hz);
void PioDCOStart(PioDco *pdco);
void PioDCOStop(PioDco *pdco);
void PioDCOTick(PioDco *pdco);
void RAM (PioDCOWorker)(PioDco *pDCO);
#endif

73
test.c
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@ -1,6 +1,8 @@
#include <string.h>
#include <stdlib.h>
#include "defines.h"
#include "piodco/piodco.h"
#include "build/dco.pio.h"
#include "hardware/vreg.h"
@ -9,10 +11,34 @@
#include "hwdefs.h"
#include "./dcoisr/dcoisr.h"
void __not_in_flash_func (WorkerCycle)(PioDco *pDCO, const int32_t i32frq_in_clk, uint32_t *preg32)
{
register int32_t acc_phase_error = 0;
register uint8_t *preg8 = (uint8_t *)preg32;
register PIO pio = pDCO->_pio;
register uint sm = pDCO->_ism;
pio_sm_set_enabled(pio, sm, true);
for(;;)
{
preg8 = (uint8_t *)preg32;
for(int i = 0; i < 32; ++i)
{
register const int32_t i32wc = (i32frq_in_clk - acc_phase_error + (1<<23)) >> 24;
acc_phase_error += (i32wc<<24) - i32frq_in_clk;
*preg8++ = i32wc - PIOASM_DELAY_CYCLES;
}
dco_program_puts(pio, sm, preg32);
}
}
int main()
{
PioDco DCO;
DcoIsrContext ISRC;
//DcoIsrContext ISRC;
const uint32_t clkhz = PLL_SYS_MHZ * 1000000L;
set_sys_clock_khz(clkhz / 1000L, true);
@ -20,38 +46,27 @@ int main()
gpio_init(PICO_DEFAULT_LED_PIN);
gpio_set_dir(PICO_DEFAULT_LED_PIN, GPIO_OUT);
assert_(0 == PioDCOInit(&DCO, PLL_SYS_MHZ * 1000000L));
const uint32_t freq_hz = 2*10000000L;
assert_(0 == PioDCOInit(&DCO, 6, clkhz));
PioDCOStart(&DCO);
assert_(0 == PioDCOSetFreq(&DCO, freq_hz));
PioDCOWorker(&DCO);
/*
//DcoIsrInit(&ISRC, &DCO);
uint32_t preg32[8] = {0};
uint8_t *preg8 = (uint8_t *)preg32;
const uint64_t frqhz = 2*(3573000L);
//const uint64_t frqhz = 2*(7074000L);
const uint64_t u64frq_in_clk_E20 = ((uint64_t)clkhz * (uint64_t)(1<<20) + (frqhz>>1)) / frqhz;
uint32_t u32frq_in_clk_E20 = u64frq_in_clk_E20;
//const uint64_t frqhz = 2*(3573000L);
//const uint64_t frqhz = 2*7074000L + 1;
const uint64_t frqhz = 2*10000000L;
//const uint64_t frqhz = 2*10136000L;
//const int64_t frqhz = 2*(14074000L);
const int64_t i64frq_in_clk = ((int64_t)clkhz * (int64_t)(1<<24) + (frqhz>>1)) / frqhz;
const int32_t i32frq_in_clk = i64frq_in_clk;
int32_t acc_phase_discriminator = 0;
int tick;
for(;;)
{
++tick;
for(int i = 0; i < 8; ++i)
{
const int32_t i32wc = (u32frq_in_clk_E20 - acc_phase_discriminator + (1<<19)) >> 20;
acc_phase_discriminator += (i32wc<<20) - u32frq_in_clk_E20;
preg32[i] = i32wc - 4;
}
dco_program_puts(DCO._pio, DCO._ism, preg32);
if(tick > 10000000L)
{
tick = 0;
}
u32frq_in_clk_E20 = u64frq_in_clk_E20 + tick/10000;
}
WorkerCycle(&DCO, i32frq_in_clk, preg32);
*/
}