2023-11-01 23:41:14 +00:00
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.program dco
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2023-11-07 00:07:42 +00:00
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set x, 0
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2023-11-01 23:41:14 +00:00
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.wrap_target
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2023-11-07 00:07:42 +00:00
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pull ifempty // 1
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2023-11-08 21:28:29 +00:00
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out y, 32 // load 8-bit delay value in terms of cycles. 2
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2023-11-07 00:07:42 +00:00
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LOOP0:
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jmp y-- LOOP0 // do accurate delay. 3+t
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set pins, 1 // set pins = 1. 4+t.
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pull ifempty // 5+t
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2023-11-08 21:28:29 +00:00
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out y, 32 // load 8-bit delay value in terms of cycles. 6+t
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2023-11-07 00:07:42 +00:00
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LOOP1:
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jmp y-- LOOP1 // 7+t
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set pins, 0 // 8+t
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// CLK/8 max, 250MHz/8 = 31.25 MHz output max frq.
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// CLK/(255+8) min, 250MHz/263 = 950 kHz min frq.
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// So, it covers 3..30 MHz HF band + 160 meter band.
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2023-11-08 21:28:29 +00:00
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// pull ifempty
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// out y, 32
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//LOOP2:
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// jmp y-- LOOP2
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// set pins, 1
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2023-11-07 00:07:42 +00:00
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2023-11-01 23:41:14 +00:00
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2023-11-08 21:28:29 +00:00
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// pull ifempty
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// out y, 32
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//LOOP3:
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// jmp y-- LOOP3
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// set pins, 0
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2023-11-01 23:41:14 +00:00
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.wrap
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% c-sdk {
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static inline void dco_program_init(PIO pio, uint sm, uint offset, uint pin)
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{
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pio_sm_config c = dco_program_get_default_config(offset);
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sm_config_set_out_pins(&c, pin, 1);
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pio_gpio_init(pio, pin);
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2023-11-08 21:28:29 +00:00
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sm_config_set_out_shift(&c, false, true, 32); // Autopull.
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2023-11-01 23:41:14 +00:00
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sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
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pio_sm_set_consecutive_pindirs(pio, sm, pin, 1, true);
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sm_config_set_clkdiv(&c, 1.f);
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pio_sm_init(pio, sm, offset, &c);
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pio_sm_set_enabled(pio, sm, true);
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}
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2023-11-03 23:54:39 +00:00
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//
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2023-11-01 23:41:14 +00:00
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static inline void dco_program_puts(PIO pio, uint sm, const uint32_t *s)
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{
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2023-11-07 00:07:42 +00:00
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pio_sm_put_blocking(pio, sm, s[0]);
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pio_sm_put_blocking(pio, sm, s[1]);
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pio_sm_put_blocking(pio, sm, s[2]);
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pio_sm_put_blocking(pio, sm, s[3]);
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pio_sm_put_blocking(pio, sm, s[4]);
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pio_sm_put_blocking(pio, sm, s[5]);
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pio_sm_put_blocking(pio, sm, s[6]);
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pio_sm_put_blocking(pio, sm, s[7]);
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2023-11-01 23:41:14 +00:00
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}
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%}
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