kopia lustrzana https://github.com/majbthrd/pico-debug
157 wiersze
4.0 KiB
ArmAsm
157 wiersze
4.0 KiB
ArmAsm
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Peter Lawrence
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/* this code was tweaked specifically for pico-debug; it is *NOT* a generic crt implementation */
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.macro ISR_HANDLER name=
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.section .vectors, "ax"
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.word \name
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.endm
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.macro ISR_RESERVED
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.section .vectors, "ax"
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.word 0
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.endm
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.macro ISR_UNUSED name=
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.section .vectors, "ax"
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.word exit_handler
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.endm
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.syntax unified
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.global boot_entry
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.extern main
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.extern multicore_launch_core1_raw
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.global exit
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.weak exit
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.section .boot, "ax"
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.thumb_func
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boot_entry:
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#ifndef STAY_IN_SRAM
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/* disable flash cache (allowing XIP_SRAM access) */
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ldr r0, =0x14000000
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ldr r1, =0
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str r1, [r0]
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/* undocumented step to ensure XIP_SRAM is ready for accesses */
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ldr r1, [r0, #4]
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#endif
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ldr r0, =__SRAM_segment_end__
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mov sp, r0
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bl SystemInit
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ldr r2, =__vectors_start__ /* origin of where vector table now resides */
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ldr r1, [r2] /* load stack pointer from user app */
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ldr r0, [r2, #4] /* load reset address from user app */
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ldr r3, =multicore_launch_core1_raw
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blx r3
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sleep:
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wfi
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b sleep
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.section .vectors, "ax"
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.code 16
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.global _vectors
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.align 8
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_vectors:
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.word __stack_end__
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.word reset_handler
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ISR_UNUSED NMI_Handler
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ISR_UNUSED HardFault_Handler
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ISR_UNUSED MemManage_Handler
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ISR_UNUSED BusFault_Handler
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ISR_UNUSED UsageFault_Handler
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ISR_RESERVED
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ISR_RESERVED
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ISR_RESERVED
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ISR_RESERVED
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ISR_UNUSED SVC_Handler
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ISR_UNUSED DebugMon_Handler
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ISR_RESERVED
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ISR_UNUSED PendSV_Handler
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ISR_UNUSED SysTick_Handler
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ISR_UNUSED TIMER0_IRQHandler
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ISR_UNUSED TIMER1_IRQHandler
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ISR_UNUSED TIMER2_IRQHandler
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ISR_UNUSED TIMER3_IRQHandler
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ISR_UNUSED PWM_IRQHandler
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ISR_HANDLER USB_IRQHandler
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ISR_UNUSED XIP_IRQHandler
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ISR_UNUSED PIO0_0_IRQHandler
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ISR_UNUSED PIO0_1_IRQHandler
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ISR_UNUSED PIO1_0_IRQHandler
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ISR_UNUSED PIO1_1_IRQHandler
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ISR_UNUSED DMA0_IRQHandler
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ISR_UNUSED DMA1_IRQHandler
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ISR_UNUSED IO_IRQHandler
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ISR_UNUSED QSPI_IRQHandler
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ISR_UNUSED SIO0_IRQHandler
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ISR_UNUSED SIO1_IRQHandler
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ISR_UNUSED CLOCKS_Handler
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ISR_UNUSED SPI0_Handler
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ISR_UNUSED SPI1_IRQHandler
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ISR_UNUSED UART0_IRQHandler
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ISR_UNUSED UART1_Handler
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ISR_UNUSED ADC_Handler
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ISR_UNUSED I2C0_IRQHandler
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ISR_UNUSED I2C1_IRQHandler
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ISR_UNUSED RTC_IRQHandler
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.thumb_func
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reset_handler:
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/* zero-ize the bss */
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ldr r0, =__bss_start__
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ldr r1, =__bss_end__
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movs r2, #0
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bss_loop:
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cmp r0, r1
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beq bss_finished
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strb r2, [r0]
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adds r0, r0, #1
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b bss_loop
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bss_finished:
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/* Setup initial call frame */
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movs r0, #0
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mov lr, r0
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mov r12, sp
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/* jump to app entry point */
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ldr r2, =main
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blx r2
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.thumb_func
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exit:
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/* handler if app returned or unexpected IRQ happened */
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exit_handler:
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b exit_handler
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/* Setup attributes of stack section so that it doesn't take up room in the elf file */
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.section .stack, "wa", %nobits
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