kopia lustrzana https://github.com/DL7AD/pecanpico9
Add DMA DBM as multi-buffer handling for OV5640
CInsights
rodzic
685d4c9165
commit
61defb05aa
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@ -1,259 +1,260 @@
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##############################################################################
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##############################################################################
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# Build global options
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# Build global options
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# NOTE: Can be overridden externally.
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# NOTE: Can be overridden externally.
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#
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#
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# Compiler options here.
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# Compiler options here.
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ifeq ($(USE_OPT),)
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ifeq ($(USE_OPT),)
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USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
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USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
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endif
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endif
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# C specific options here (added to USE_OPT).
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# C specific options here (added to USE_OPT).
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||||||
ifeq ($(USE_COPT),)
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ifeq ($(USE_COPT),)
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USE_COPT =
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USE_COPT = -std=c11
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endif
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endif
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# C++ specific options here (added to USE_OPT).
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# C++ specific options here (added to USE_OPT).
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||||||
ifeq ($(USE_CPPOPT),)
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ifeq ($(USE_CPPOPT),)
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USE_CPPOPT = -fno-rtti
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USE_CPPOPT = -fno-rtti
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endif
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endif
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# Enable this if you want the linker to remove unused code and data
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# Enable this if you want the linker to remove unused code and data
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ifeq ($(USE_LINK_GC),)
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ifeq ($(USE_LINK_GC),)
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USE_LINK_GC = yes
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USE_LINK_GC = yes
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endif
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endif
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# Linker extra options here.
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# Linker extra options here.
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ifeq ($(USE_LDOPT),)
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ifeq ($(USE_LDOPT),)
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USE_LDOPT =
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USE_LDOPT =
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endif
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endif
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# Enable this if you want link time optimizations (LTO)
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# Enable this if you want link time optimizations (LTO)
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ifeq ($(USE_LTO),)
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ifeq ($(USE_LTO),)
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USE_LTO = yes
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USE_LTO = yes
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endif
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endif
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# If enabled, this option allows to compile the application in THUMB mode.
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# If enabled, this option allows to compile the application in THUMB mode.
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ifeq ($(USE_THUMB),)
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ifeq ($(USE_THUMB),)
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USE_THUMB = yes
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USE_THUMB = yes
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endif
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endif
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# Enable this if you want to see the full log while compiling.
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# Enable this if you want to see the full log while compiling.
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ifeq ($(USE_VERBOSE_COMPILE),)
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ifeq ($(USE_VERBOSE_COMPILE),)
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USE_VERBOSE_COMPILE = no
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USE_VERBOSE_COMPILE = no
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endif
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endif
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# If enabled, this option makes the build process faster by not compiling
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# If enabled, this option makes the build process faster by not compiling
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# modules not used in the current configuration.
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# modules not used in the current configuration.
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ifeq ($(USE_SMART_BUILD),)
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ifeq ($(USE_SMART_BUILD),)
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USE_SMART_BUILD = yes
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USE_SMART_BUILD = yes
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||||||
endif
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endif
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#
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#
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||||||
# Build global options
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# Build global options
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||||||
##############################################################################
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##############################################################################
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||||||
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||||||
##############################################################################
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##############################################################################
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# Architecture or project specific options
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# Architecture or project specific options
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||||||
#
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#
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# Stack size to be allocated to the Cortex-M process stack. This stack is
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# Stack size to be allocated to the Cortex-M process stack. This stack is
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# the stack used by the main() thread.
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# the stack used by the main() thread.
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ifeq ($(USE_PROCESS_STACKSIZE),)
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ifeq ($(USE_PROCESS_STACKSIZE),)
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USE_PROCESS_STACKSIZE = 0x400
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USE_PROCESS_STACKSIZE = 0x400
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endif
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endif
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# Stack size to the allocated to the Cortex-M main/exceptions stack. This
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# Stack size to the allocated to the Cortex-M main/exceptions stack. This
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# stack is used for processing interrupts and exceptions.
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# stack is used for processing interrupts and exceptions.
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ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
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ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
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USE_EXCEPTIONS_STACKSIZE = 0x400
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USE_EXCEPTIONS_STACKSIZE = 0x400
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endif
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endif
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# Enables the use of FPU (no, softfp, hard).
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# Enables the use of FPU (no, softfp, hard).
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ifeq ($(USE_FPU),)
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ifeq ($(USE_FPU),)
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USE_FPU = no
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USE_FPU = no
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endif
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endif
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#
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#
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# Architecture or project specific options
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# Architecture or project specific options
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||||||
##############################################################################
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##############################################################################
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||||||
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||||||
##############################################################################
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##############################################################################
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# Project, sources and paths
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# Project, sources and paths
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#
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#
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# Define project name here
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# Define project name here
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PROJECT = ch
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PROJECT = ch
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# Imported source files and paths
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# Imported source files and paths
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CHIBIOS = ChibiOS
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CHIBIOS = ChibiOS
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# Startup files.
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#CHIBIOS = C:\ChibiStudio\chibios_trunk
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include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
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# Startup files.
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# HAL-OSAL files (optional).
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include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
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include $(CHIBIOS)/os/hal/hal.mk
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# HAL-OSAL files (optional).
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include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include board/board.mk
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include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
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include $(CHIBIOS)/os/hal/osal/rt/osal.mk
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include board/board.mk
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# RTOS files (optional).
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include $(CHIBIOS)/os/hal/osal/rt/osal.mk
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include $(CHIBIOS)/os/rt/rt.mk
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# RTOS files (optional).
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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include $(CHIBIOS)/os/rt/rt.mk
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# Other files (optional).
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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include $(CHIBIOS)/test/rt/test.mk
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# Other files (optional).
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include $(CHIBIOS)/os/hal/lib/streams/streams.mk
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include $(CHIBIOS)/test/rt/test.mk
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include $(CHIBIOS)/os/various/shell/shell.mk
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include $(CHIBIOS)/os/hal/lib/streams/streams.mk
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include $(CHIBIOS)/os/various/shell/shell.mk
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# Define linker script file here
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LDSCRIPT= board/STM32F413xH.ld
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# Define linker script file here
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LDSCRIPT= board/STM32F413xH.ld
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# C sources that can be compiled in ARM or THUMB mode depending on the global
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# setting.
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# C sources that can be compiled in ARM or THUMB mode depending on the global
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CSRC = $(STARTUPSRC) \
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# setting.
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$(KERNSRC) \
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CSRC = $(STARTUPSRC) \
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$(PORTSRC) \
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$(KERNSRC) \
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$(OSALSRC) \
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$(PORTSRC) \
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$(HALSRC) \
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$(OSALSRC) \
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$(PLATFORMSRC) \
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$(HALSRC) \
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$(BOARDSRC) \
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$(PLATFORMSRC) \
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$(TESTSRC) \
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$(BOARDSRC) \
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$(SHELLSRC) \
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$(TESTSRC) \
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$(CHIBIOS)/os/hal/lib/streams/memstreams.c \
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$(SHELLSRC) \
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$(CHIBIOS)/os/hal/lib/streams/chprintf.c \
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$(CHIBIOS)/os/hal/lib/streams/memstreams.c \
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modules/tracking.c \
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$(CHIBIOS)/os/hal/lib/streams/chprintf.c \
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modules/position.c \
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modules/tracking.c \
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modules/image.c \
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modules/position.c \
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modules/log.c \
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modules/image.c \
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protocols/ssdv/ssdv.c \
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modules/log.c \
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protocols/ssdv/rs8.c \
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protocols/ssdv/ssdv.c \
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protocols/aprs/aprs.c \
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protocols/ssdv/rs8.c \
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protocols/aprs/ax25.c \
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protocols/aprs/aprs.c \
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protocols/morse/morse.c \
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protocols/aprs/ax25.c \
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drivers/wrapper/pi2c.c \
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protocols/morse/morse.c \
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drivers/wrapper/padc.c \
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drivers/wrapper/pi2c.c \
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drivers/wrapper/ptime.c \
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drivers/wrapper/padc.c \
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drivers/ublox.c \
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drivers/wrapper/ptime.c \
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drivers/si4464.c \
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drivers/ublox.c \
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drivers/bme280.c \
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drivers/si4464.c \
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drivers/pac1720.c \
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drivers/bme280.c \
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drivers/ov2640.c \
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drivers/pac1720.c \
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drivers/ov5640.c \
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drivers/ov2640.c \
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drivers/flash/flash.c \
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drivers/ov5640.c \
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drivers/flash/helper.c \
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drivers/flash/flash.c \
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drivers/flash/ihex.c \
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drivers/flash/helper.c \
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debug.c \
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drivers/flash/ihex.c \
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radio.c \
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debug.c \
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sleep.c \
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radio.c \
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modules.c \
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sleep.c \
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math/base.c \
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modules.c \
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math/sgp4.c \
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math/base.c \
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math/geofence.c \
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math/sgp4.c \
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config.c \
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math/geofence.c \
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watchdog.c \
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config.c \
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usbcfg.c \
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watchdog.c \
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main.c
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usbcfg.c \
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main.c
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# C++ sources that can be compiled in ARM or THUMB mode depending on the global
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# setting.
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# C++ sources that can be compiled in ARM or THUMB mode depending on the global
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CPPSRC =
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# setting.
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CPPSRC =
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# C sources to be compiled in ARM mode regardless of the global setting.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# C sources to be compiled in ARM mode regardless of the global setting.
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# option that results in lower performance and larger code size.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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ACSRC =
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# option that results in lower performance and larger code size.
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ACSRC =
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# C++ sources to be compiled in ARM mode regardless of the global setting.
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||||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# C++ sources to be compiled in ARM mode regardless of the global setting.
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||||||
# option that results in lower performance and larger code size.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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ACPPSRC =
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# option that results in lower performance and larger code size.
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ACPPSRC =
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# C sources to be compiled in THUMB mode regardless of the global setting.
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||||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# C sources to be compiled in THUMB mode regardless of the global setting.
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||||||
# option that results in lower performance and larger code size.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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TCSRC =
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# option that results in lower performance and larger code size.
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||||||
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TCSRC =
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||||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
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||||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
# C sources to be compiled in THUMB mode regardless of the global setting.
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||||||
# option that results in lower performance and larger code size.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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TCPPSRC =
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# option that results in lower performance and larger code size.
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TCPPSRC =
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# List ASM source files here
|
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ASMSRC =
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# List ASM source files here
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ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
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ASMSRC =
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ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
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INCDIR = $(CHIBIOS)/os/license \
|
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$(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
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INCDIR = $(CHIBIOS)/os/license \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
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$(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
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$(CHIBIOS)/os/hal/lib/streams $(CHIBIOS)/os/various \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
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||||||
$(SHELLINC)
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$(CHIBIOS)/os/hal/lib/streams $(CHIBIOS)/os/various \
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||||||
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$(SHELLINC)
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#
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# Project, sources and paths
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#
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##############################################################################
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# Project, sources and paths
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||||||
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##############################################################################
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##############################################################################
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# Compiler settings
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##############################################################################
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#
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# Compiler settings
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#
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MCU = cortex-m4
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MCU = cortex-m4
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#TRGT = arm-elf-
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TRGT = arm-none-eabi-
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#TRGT = arm-elf-
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CC = $(TRGT)gcc
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TRGT = arm-none-eabi-
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CPPC = $(TRGT)g++
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CC = $(TRGT)gcc
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# Enable loading with g++ only if you need C++ runtime support.
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CPPC = $(TRGT)g++
|
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# NOTE: You can use C++ even without C++ support if you are careful. C++
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# Enable loading with g++ only if you need C++ runtime support.
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||||||
# runtime support makes code size explode.
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# NOTE: You can use C++ even without C++ support if you are careful. C++
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||||||
LD = $(TRGT)gcc
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# runtime support makes code size explode.
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||||||
#LD = $(TRGT)g++
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LD = $(TRGT)gcc
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CP = $(TRGT)objcopy
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#LD = $(TRGT)g++
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AS = $(TRGT)gcc -x assembler-with-cpp
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CP = $(TRGT)objcopy
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AR = $(TRGT)ar
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AS = $(TRGT)gcc -x assembler-with-cpp
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||||||
OD = $(TRGT)objdump
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AR = $(TRGT)ar
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||||||
SZ = $(TRGT)size
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OD = $(TRGT)objdump
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HEX = $(CP) -O ihex
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SZ = $(TRGT)size
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||||||
BIN = $(CP) -O binary
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HEX = $(CP) -O ihex
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||||||
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BIN = $(CP) -O binary
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||||||
# ARM-specific options here
|
|
||||||
AOPT =
|
# ARM-specific options here
|
||||||
|
AOPT =
|
||||||
# THUMB-specific options here
|
|
||||||
TOPT = -mthumb -DTHUMB
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# THUMB-specific options here
|
||||||
|
TOPT = -mthumb -DTHUMB
|
||||||
# Define C warning options here
|
|
||||||
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
|
# Define C warning options here
|
||||||
|
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
|
||||||
# Define C++ warning options here
|
|
||||||
CPPWARN = -Wall -Wextra -Wundef
|
# Define C++ warning options here
|
||||||
|
CPPWARN = -Wall -Wextra -Wundef
|
||||||
#
|
|
||||||
# Compiler settings
|
#
|
||||||
##############################################################################
|
# Compiler settings
|
||||||
|
##############################################################################
|
||||||
##############################################################################
|
|
||||||
# Start of user section
|
##############################################################################
|
||||||
#
|
# Start of user section
|
||||||
|
#
|
||||||
# List all user C define here, like -D_DEBUG=1
|
|
||||||
UDEFS =
|
# List all user C define here, like -D_DEBUG=1
|
||||||
|
UDEFS =
|
||||||
# Define ASM defines here
|
|
||||||
UADEFS =
|
# Define ASM defines here
|
||||||
|
UADEFS =
|
||||||
# List all user directories here
|
|
||||||
UINCDIR = modules/ drivers/ drivers/wrapper/ protocols/aprs \
|
# List all user directories here
|
||||||
protocols/ssdv protocols/morse math/ drivers/flash/
|
UINCDIR = modules/ drivers/ drivers/wrapper/ protocols/aprs \
|
||||||
|
protocols/ssdv protocols/morse math/ drivers/flash/
|
||||||
# List the user directory to look for the libraries here
|
|
||||||
ULIBDIR =
|
# List the user directory to look for the libraries here
|
||||||
|
ULIBDIR =
|
||||||
# List all user libraries here
|
|
||||||
ULIBS = -lm
|
# List all user libraries here
|
||||||
|
ULIBS = -lm
|
||||||
#
|
|
||||||
# End of user defines
|
#
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||||||
##############################################################################
|
# End of user defines
|
||||||
|
##############################################################################
|
||||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
|
|
||||||
include $(RULESPATH)/rules.mk
|
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
|
||||||
|
include $(RULESPATH)/rules.mk
|
||||||
burn:
|
|
||||||
st-flash write build/$(PROJECT).bin 0x08000000
|
burn:
|
||||||
|
st-flash write build/$(PROJECT).bin 0x08000000
|
||||||
|
|
|
||||||
|
|
@ -3,7 +3,7 @@
|
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#include "debug.h"
|
#include "debug.h"
|
||||||
|
|
||||||
module_conf_t config[9];
|
module_conf_t config[9];
|
||||||
uint8_t ssdv_buffer[65535] __attribute__((aligned(1024)));
|
uint8_t ssdv_buffer[65535] __attribute__((aligned(32)));
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||||||
|
|
||||||
/*
|
/*
|
||||||
* Position module configuration description
|
* Position module configuration description
|
||||||
|
|
|
||||||
|
|
@ -799,6 +799,31 @@ uint32_t OV5640_getBuffer(uint8_t** buffer) {
|
||||||
|
|
||||||
const stm32_dma_stream_t *dmastp;
|
const stm32_dma_stream_t *dmastp;
|
||||||
|
|
||||||
|
#if OV5640_USE_DMA_DBM == TRUE
|
||||||
|
uint16_t dma_index;
|
||||||
|
uint16_t dma_buffers;
|
||||||
|
#define DMA_SEGMENT_SIZE 1024
|
||||||
|
#define DMA_FIFO_BURST_ALIGN 32
|
||||||
|
|
||||||
|
|
||||||
|
#if !defined(dmaStreamGetCurrentTarget)
|
||||||
|
/**
|
||||||
|
* @brief Get DMA stream current target.
|
||||||
|
* @note This function can be invoked in both ISR or thread context.
|
||||||
|
* @pre The stream must have been allocated using @p dmaStreamAllocate().
|
||||||
|
* @post After use the stream can be released using @p dmaStreamRelease().
|
||||||
|
*
|
||||||
|
* @param[in] dmastp pointer to a stm32_dma_stream_t structure
|
||||||
|
* @return Current target index
|
||||||
|
*
|
||||||
|
* @special
|
||||||
|
*/
|
||||||
|
#define dmaStreamGetCurrentTarget(dmastp) \
|
||||||
|
((uint8_t)(((dmastp)->stream->CR >> DMA_SxCR_CT_Pos) & 1U))
|
||||||
|
|
||||||
|
#endif /* !defined(dmaStreamGetCurrentTarget) */
|
||||||
|
#endif /* OV5640_USE_DMA_DBM == TRUE */
|
||||||
|
|
||||||
inline int32_t dma_start(void) {
|
inline int32_t dma_start(void) {
|
||||||
/* Clear any pending interrupts. */
|
/* Clear any pending interrupts. */
|
||||||
dmaStreamClearInterrupt(dmastp);
|
dmaStreamClearInterrupt(dmastp);
|
||||||
|
|
@ -818,50 +843,126 @@ inline uint16_t dma_stop(void) {
|
||||||
return transfer;
|
return transfer;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if OV5640_USE_DMA_DBM == TRUE
|
||||||
|
|
||||||
static void dma_interrupt(void *p, uint32_t flags) {
|
static void dma_interrupt(void *p, uint32_t flags) {
|
||||||
(void)p;
|
/* No parameter passed. */
|
||||||
|
(void)p;
|
||||||
|
|
||||||
if ((flags & STM32_DMA_ISR_HTIF) != 0) {
|
if (flags & (STM32_DMA_ISR_FEIF | STM32_DMA_ISR_TEIF)) {
|
||||||
/*
|
/*
|
||||||
* Nothing really to do at half way point for now.
|
* DMA transfer error or FIFO error.
|
||||||
* Implementing DBM will use HTIF.
|
* See 9.34.19 of RM0430.
|
||||||
*/
|
*/
|
||||||
return;
|
dmaStreamClearInterrupt(dmastp);
|
||||||
}
|
TIM1->DIER &= ~TIM_DIER_TDE;
|
||||||
if ((flags & STM32_DMA_ISR_TCIF) != 0) {
|
dma_fault = true;
|
||||||
/* Disable VYSNC edge interrupts. */
|
capture_error = true;
|
||||||
//nvicDisableVector(EXTI1_IRQn);
|
return;
|
||||||
//capture_finished = true;
|
}
|
||||||
|
|
||||||
/*
|
if (flags & STM32_DMA_ISR_HTIF) {
|
||||||
* If DMA has run to end within a frame then this is an error.
|
/*
|
||||||
* In single buffer mode DMA should always be terminated by VSYNC.
|
* Half transfer complete.
|
||||||
*
|
* Check if DMA is writing to the last buffer.
|
||||||
* Stop PCLK from LPTIM1 and disable TIM1 DMA trigger.
|
*/
|
||||||
* Dont stop the DMA here. Its going to be stopped by the leading edge of VSYNC.
|
if (dma_index == (dma_buffers - 1)) {
|
||||||
*/
|
/*
|
||||||
TIM1->DIER &= ~TIM_DIER_TDE;
|
* This is the last buffer so we have to terminate DMA.
|
||||||
LPTIM1->CR &= ~LPTIM_CR_CNTSTRT;
|
* The DBM switch is done in h/w.
|
||||||
dma_overrun = true;
|
* DMA could write beyond total buffer if not stopped.
|
||||||
capture_error = true;
|
*
|
||||||
return;
|
* Because we have run to last DMA buffer this is treated as an error.
|
||||||
}
|
* The DMA should normally be terminated by VSYNC before last buffer.
|
||||||
/*
|
* Stop DMA and TIM DMA trigger and flag error.
|
||||||
* TODO: Anything else is an error.
|
*/
|
||||||
* Maybe set an error flag?
|
|
||||||
*/
|
dmaStreamClearInterrupt(dmastp);
|
||||||
|
TIM1->DIER &= ~TIM_DIER_TDE;
|
||||||
|
dma_overrun = true;
|
||||||
|
capture_error = true;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
/*
|
||||||
|
* Else Safe to allow buffer to fill.
|
||||||
|
* DMA DBM will switch buffers in h/w when this one is full.
|
||||||
|
* Just clear the interrupt and wait for TCIF.
|
||||||
|
*/
|
||||||
|
dmaStreamClearInterrupt(dmastp);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if (flags & STM32_DMA_ISR_TCIF) {
|
||||||
|
/*
|
||||||
|
* Full buffer transfer complete.
|
||||||
|
* Update non-active memory address register.
|
||||||
|
* DMA will use new address at h/w DBM switch.
|
||||||
|
*/
|
||||||
|
dmaStreamClearInterrupt(dmastp);
|
||||||
|
|
||||||
|
if (dmaStreamGetCurrentTarget(dmastp) == 1) {
|
||||||
|
dmaStreamSetMemory0(dmastp, &ov5640_conf->ram_buffer[++dma_index * DMA_SEGMENT_SIZE]);
|
||||||
|
} else {
|
||||||
|
dmaStreamSetMemory1(dmastp, &ov5640_conf->ram_buffer[++dma_index * DMA_SEGMENT_SIZE]);
|
||||||
|
}
|
||||||
|
return;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
|
static void dma_interrupt(void *p, uint32_t flags) {
|
||||||
|
(void)p;
|
||||||
|
|
||||||
|
if (flags & (STM32_DMA_ISR_FEIF | STM32_DMA_ISR_TEIF)) {
|
||||||
|
/*
|
||||||
|
* DMA transfer error or FIFO error.
|
||||||
|
* See 9.34.19 of RM0430.
|
||||||
|
*/
|
||||||
|
dmaStreamClearInterrupt(dmastp);
|
||||||
|
TIM1->DIER &= ~TIM_DIER_TDE;
|
||||||
|
dma_fault = true;
|
||||||
|
capture_error = true;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((flags & STM32_DMA_ISR_HTIF) != 0) {
|
||||||
|
/*
|
||||||
|
* Nothing really to do at half way point for now.
|
||||||
|
* Implementing DBM will use HTIF.
|
||||||
|
*/
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if ((flags & STM32_DMA_ISR_TCIF) != 0) {
|
||||||
|
/* Disable VYSNC edge interrupts. */
|
||||||
|
//nvicDisableVector(EXTI1_IRQn);
|
||||||
|
//capture_finished = true;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* If DMA has run to end within a frame then this is an error.
|
||||||
|
* In single buffer mode DMA should always be terminated by VSYNC.
|
||||||
|
*
|
||||||
|
* Stop PCLK from LPTIM1 and disable TIM1 DMA trigger.
|
||||||
|
* Dont stop the DMA here. Its going to be stopped by the leading edge of VSYNC.
|
||||||
|
*/
|
||||||
|
TIM1->DIER &= ~TIM_DIER_TDE;
|
||||||
|
LPTIM1->CR &= ~LPTIM_CR_CNTSTRT;
|
||||||
|
dma_overrun = true;
|
||||||
|
capture_error = true;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* USE_OV5640_DMA_DBM */
|
||||||
/*
|
/*
|
||||||
* The LPTIM interrupt handler.
|
* The LPTIM interrupt handler.
|
||||||
*/
|
*/
|
||||||
OSAL_IRQ_HANDLER(STM32_LPTIM1_HANDLER) {
|
OSAL_IRQ_HANDLER(STM32_LPTIM1_HANDLER) {
|
||||||
|
|
||||||
/* Note:
|
/* Note:
|
||||||
* STM32F4 vectors defined by Chibios currently stop at 98.
|
* LPTIM1 is vector 97.
|
||||||
* Need to allocate more space in vector table for LPTIM1.
|
* Check CORTEX_NUM_PARAMS in cmparams.h >= 106.
|
||||||
* LPTIM1 is vector 97. Vector table is expanded in increments of 8.
|
* Vector table is expanded in increments of 8.
|
||||||
* Change CORTEX_NUM_PARAMS in cmparams.h to 106.
|
|
||||||
*/
|
*/
|
||||||
OSAL_IRQ_PROLOGUE();
|
OSAL_IRQ_PROLOGUE();
|
||||||
/* Reset interrupt flag for ARR. */
|
/* Reset interrupt flag for ARR. */
|
||||||
|
|
@ -885,9 +986,9 @@ OSAL_IRQ_HANDLER(STM32_LPTIM1_HANDLER) {
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Note: VSYNC is a pulse at the start of each frame.
|
* VSYNC is asserted during a frame.
|
||||||
* This is unlike the OV2640 where VSYNC is active for the entire frame.
|
* See OV5640 datasheet for details.
|
||||||
*/
|
*/
|
||||||
CH_IRQ_HANDLER(Vector5C) {
|
CH_IRQ_HANDLER(Vector5C) {
|
||||||
CH_IRQ_PROLOGUE();
|
CH_IRQ_PROLOGUE();
|
||||||
|
|
||||||
|
|
@ -953,70 +1054,92 @@ bool OV5640_Capture(void)
|
||||||
STM32_DMA_CR_MINC |
|
STM32_DMA_CR_MINC |
|
||||||
STM32_DMA_CR_DMEIE |
|
STM32_DMA_CR_DMEIE |
|
||||||
STM32_DMA_CR_TEIE |
|
STM32_DMA_CR_TEIE |
|
||||||
|
#if OV5640_USE_DMA_DBM == TRUE
|
||||||
|
STM32_DMA_CR_DBM |
|
||||||
|
#endif
|
||||||
STM32_DMA_CR_TCIE;
|
STM32_DMA_CR_TCIE;
|
||||||
|
|
||||||
dmaStreamAllocate(dmastp, 2, (stm32_dmaisr_t)dma_interrupt, NULL);
|
dmaStreamAllocate(dmastp, 2, (stm32_dmaisr_t)dma_interrupt, NULL);
|
||||||
|
|
||||||
dmaStreamSetPeripheral(dmastp, &GPIOA->IDR); // We want to read the data from here
|
dmaStreamSetPeripheral(dmastp, &GPIOA->IDR); // We want to read the data from here
|
||||||
dmaStreamSetMemory0(dmastp, ov5640_conf->ram_buffer); // Thats the buffer address
|
#if OV5640_USE_DMA_DBM == TRUE
|
||||||
dmaStreamSetTransactionSize(dmastp, ov5640_conf->ram_size); // Thats the buffer size
|
/*
|
||||||
|
* Buffer address must be word aligned.
|
||||||
|
* Also note requirement for burst transfers from FIFO.
|
||||||
|
* Bursts from FIFO to memory must not cross a 1K address boundary.
|
||||||
|
* See RM0430 9.3.12
|
||||||
|
*
|
||||||
|
* TODO: To use DMA_FIFO_BURST_ALIGN in setting of ssdv buffer alignment.
|
||||||
|
* Currently this is set to 32 manually in config.c.
|
||||||
|
*/
|
||||||
|
|
||||||
dmaStreamSetMode(dmastp, dmamode); // Setup DMA
|
if (((uint32_t)ov5640_conf->ram_buffer % DMA_FIFO_BURST_ALIGN) != 0)
|
||||||
dmaStreamSetFIFO(dmastp, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL);
|
return false;
|
||||||
dmaStreamClearInterrupt(dmastp);
|
|
||||||
|
|
||||||
dma_overrun = false;
|
/*
|
||||||
dma_fault = false;
|
* Set the initial buffer addresses.
|
||||||
|
* The updating of DMA:MxAR is done in the the DMA interrupt function.
|
||||||
|
*/
|
||||||
|
dmaStreamSetMemory0(dmastp, &ov5640_conf->ram_buffer[0]);
|
||||||
|
dmaStreamSetMemory1(dmastp, &ov5640_conf->ram_buffer[DMA_SEGMENT_SIZE]);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Calculate the number of whole buffers.
|
||||||
|
* TODO: Make this include remainder memory as partial buffer?
|
||||||
|
*/
|
||||||
|
dma_buffers = (ov5640_conf->ram_size / DMA_SEGMENT_SIZE);
|
||||||
|
if (dma_buffers == 0)
|
||||||
|
return false;
|
||||||
|
|
||||||
|
/* Start with buffer index 0. */
|
||||||
|
dma_index = 0;
|
||||||
|
#else
|
||||||
|
dmaStreamSetMemory0(dmastp, ov5640_conf->ram_buffer); // Thats the buffer address
|
||||||
|
dmaStreamSetTransactionSize(dmastp, ov5640_conf->ram_size); // Thats the buffer size
|
||||||
|
|
||||||
|
#endif
|
||||||
|
dmaStreamSetMode(dmastp, dmamode); // Setup DMA
|
||||||
|
dmaStreamSetFIFO(dmastp, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL \
|
||||||
|
| STM32_DMA_FCR_FEIE);
|
||||||
|
dmaStreamClearInterrupt(dmastp);
|
||||||
|
|
||||||
|
dma_overrun = false;
|
||||||
|
dma_fault = false;
|
||||||
|
|
||||||
// Setup timer for PCLK
|
// Setup timer for PCLK
|
||||||
rccResetLPTIM1();
|
rccResetLPTIM1();
|
||||||
rccEnableLPTIM1(FALSE);
|
rccEnableLPTIM1(FALSE);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* LPTIM1 is run in external count mode (CKSEL = 0, COUNTMODE = 1).
|
* LPTIM1 is run in external count mode (CKSEL = 0, COUNTMODE = 1).
|
||||||
* CKPOL is set so leading and trailing edge of PCLK increment the counter.
|
* CKPOL is set so leading and trailing edge of PCLK increment the counter.
|
||||||
* The internal clocking (checking edges of LPTIM1_IN) is set to use APB.
|
* The internal clocking (checking edges of LPTIM1_IN) is set to use APB.
|
||||||
* The internal clock must be >4 times the frequency of the input (PCLK).
|
* The internal clock must be >4 times the frequency of the input (PCLK).
|
||||||
* NOTE: This does not guarantee that LPTIM1_OUT is coincident with PCLK.
|
* NOTE: This does not guarantee that LPTIM1_OUT is coincident with PCLK.
|
||||||
* Depending on PCLK state when LPTIM1 is enabled, LPMTIM1_OUT be inverted.
|
* Depending on PCLK state when LPTIM1 is enabled OUT may get inverted.
|
||||||
*
|
|
||||||
* Possible fix...
|
|
||||||
* Using CKSEL = 1 where PCLK is the actual clock may still be possible.
|
|
||||||
* This would ensure coincidence between LPTIM1_OUT and PCLK.
|
|
||||||
* If using CKSEL = 1 LPTIM1 needs 5 external clocks to reach kernel ready.
|
|
||||||
* Using CKSEL = 1 only allows for leading or trailing edge counting.
|
|
||||||
* Thus we would be sure which edge of PCLK incremented the LPTIM1 counter.
|
|
||||||
* Have to test to see if CMP and ARR interrupts work when CKSEL = 1.
|
|
||||||
*
|
*
|
||||||
* Continuing...
|
* LPTIM1 is enabled on the VSYNC edge interrupt.
|
||||||
* LPTIM1 is enabled on the leading edge of VSYNC.
|
* After enabling LPTIM1 wait for the first interrupt (ARRIF).
|
||||||
* After enabling LPTIM1 wait for the first interrupt (ARRIF).
|
* The interrupt must be disabled on the first interrupt (else flood).
|
||||||
* Waiting for ARRIF indicates that LPTIM1 kernel is ready.
|
*
|
||||||
* Note that waiting for interrupt when using COUNTMODE is redundant.
|
* LPTIM1_OUT is gated to TIM1 internal trigger input 2.
|
||||||
* The ST RM says a delay of only 2 counter (APB) clocks are required.
|
*/
|
||||||
* But leave the interrupt check in place for now as it does no harm.
|
|
||||||
*
|
|
||||||
* The interrupt must be disabled on the first interrupt (else flood).
|
|
||||||
*
|
|
||||||
* LPTIM1_OUT is gated to TIM1 internal trigger input 2.
|
|
||||||
*/
|
|
||||||
LPTIM1->CFGR = (LPTIM_CFGR_COUNTMODE | LPTIM_CFGR_CKPOL_1 | LPTIM_CFGR_WAVPOL);
|
LPTIM1->CFGR = (LPTIM_CFGR_COUNTMODE | LPTIM_CFGR_CKPOL_1 | LPTIM_CFGR_WAVPOL);
|
||||||
LPTIM1->OR |= LPTIM_OR_TIM1_ITR2_RMP;
|
LPTIM1->OR |= LPTIM_OR_TIM1_ITR2_RMP;
|
||||||
LPTIM1->CR |= LPTIM_CR_ENABLE;
|
LPTIM1->CR |= LPTIM_CR_ENABLE;
|
||||||
LPTIM1->IER |= LPTIM_IER_ARRMIE;
|
LPTIM1->IER |= LPTIM_IER_ARRMIE;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* TODO: When using COUNTMODE CMP and ARR should be 1 & 2?
|
* When LPTIM1 is enabled and ready LPTIM1_OUT will be not set.
|
||||||
* It is intended that after counter start CNT = 0.
|
* WAVPOL inverts LPTIM1_OUT so it is not set.
|
||||||
* Then CNT reaches 1 on first PCLK edge and 2 on the second edge.
|
* On the next PCLK edge LPTIM1 will count and match ARR.
|
||||||
* Using 0 and 1 means LPTIM1_OUT gets CMP match as soon as LPMTIM1 is ready.
|
* LPTIM1_OUT will set briefly and then clear again due ARR match.
|
||||||
* This means LPTIM1_OUT will be set and TIM1 will be triggered immediately.
|
* This triggers TIM1 with the short pulse from LPTIM1_OUT.
|
||||||
* A DMA transfer will then occur.
|
* TODO:
|
||||||
* The next edge of PCLK will make CNT = 2 and ARR will match.
|
* This use of LPTIM1 works probably by good luck for now.
|
||||||
* LPTIM1 will then be reset (synchronous with APB presumably).
|
* Switch to direct triggering of TIM using Capture input is better.
|
||||||
* LPTIM1_OUT will clear briefly prior to setting again on reset CMP match.
|
* Requires a PCB change.
|
||||||
* This will allow TIM1 to be re-triggered.
|
*/
|
||||||
*/
|
|
||||||
LPTIM1->CMP = 0;
|
LPTIM1->CMP = 0;
|
||||||
LPTIM1->ARR = 1;
|
LPTIM1->ARR = 1;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -9,6 +9,8 @@
|
||||||
#include "hal.h"
|
#include "hal.h"
|
||||||
#include "types.h"
|
#include "types.h"
|
||||||
|
|
||||||
|
#define OV5640_USE_DMA_DBM TRUE
|
||||||
|
|
||||||
bool OV5640_Snapshot2RAM(void);
|
bool OV5640_Snapshot2RAM(void);
|
||||||
bool OV5640_Capture(void);
|
bool OV5640_Capture(void);
|
||||||
void OV5640_InitGPIO(void);
|
void OV5640_InitGPIO(void);
|
||||||
|
|
|
||||||
Ładowanie…
Reference in New Issue