kopia lustrzana https://github.com/peterhinch/micropython_eeprom
Prepare for STM chip. Devolve further code to base class.
Peter Hinch
rodzic
ebea14bd6f
commit
d792a2be7f
35
README.md
35
README.md
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@ -29,7 +29,7 @@ The drivers have the following common features:
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Currently supported technologies are EEPROM and FRAM (ferroelectric RAM). These
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are nonvolatile random access storage devices with much higher endurance than
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flash memory. Flash has a typical endurance of 10K writes per page. The figures
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for EEPROM and FRAM are 1M and 10^12 writes respectively. In the case of the
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for EEPROM and FRAM are 1-4M and 10^12 writes respectively. In the case of the
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FAT filing system 1M page writes probably corresponds to 1M filesystem writes
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because FAT repeatedly updates the allocation tables in the low numbered
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sectors. If `littlefs` is used I would expect the endurance to be substantially
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@ -37,25 +37,27 @@ better owing to its wear levelling architecture.
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## 1.3 Supported chips
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These currently include Microchip EEPROM chips and
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These currently include Microchip and STM EEPROM chips and
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[this Adafruit FRAM board](http://www.adafruit.com/product/1895). Note that the
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largest EEPROM chip uses SPI: see [below](./README.md#2-choice-of-interface)
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for a discussion of the merits and drawbacks of each interface.
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Supported devices. Microchip manufacture each chip in different variants with
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letters denoted by "xx" below. The variants cover parameters such as minimum
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Vcc value and do not affect the API.
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Vcc value and do not affect the API. There are two variants of the STM chip,
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M95M02-DRMN6TP and M95M02-DWMN3TP/K. The latter has a wider temperature range.
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In the table below the Interface column includes page size in bytes.
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| Manufacturer | Part | Interface | Bytes | Technology | Docs |
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|:------------:|:--------:|:---------:|:------:|:----------:|:-------------------------:|
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| Microchip | 25xx1024 | SPI 256 | 128KiB | EEPROM | [SPI.md](./spi/SPI.md) |
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| Microchip | 24xx512 | I2C 128 | 64KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
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| Microchip | 24xx256 | I2C 128 | 32KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
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| Microchip | 24xx128 | I2C 128 | 16KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
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| Microchip | 24xx64 | I2C 128 | 8KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
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| Adafruit | 1895 | I2C n/a | 32KiB | FRAM | [FRAM.md](./fram/FRAM.md) |
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| Manufacturer | Part | Interface | Bytes | Technology | Docs |
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|:------------:|:---------:|:---------:|:------:|:----------:|:-------------------------:|
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| STM | M95M02-DR | SPI 256 | 256KiB | EEPROM | [SPI.md](./spi/SPI.md) |
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| Microchip | 25xx1024 | SPI 256 | 128KiB | EEPROM | [SPI.md](./spi/SPI.md) |
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| Microchip | 24xx512 | I2C 128 | 64KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
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| Microchip | 24xx256 | I2C 128 | 32KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
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| Microchip | 24xx128 | I2C 128 | 16KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
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| Microchip | 24xx64 | I2C 128 | 8KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
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| Adafruit | 1895 | I2C n/a | 32KiB | FRAM | [FRAM.md](./fram/FRAM.md) |
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Documentation:
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[SPI.md](./spi/SPI.md)
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@ -92,7 +94,7 @@ electrical limits may also apply).
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In the case of the Microchip devices supported, the SPI chip is larger at
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128KiB compared to a maximum of 64KiB in the I2C range.
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# 3. Design details
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# 3. Design details and test results
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The fact that the API enables accessing blocks of data at arbitrary addresses
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implies that the handling of page addressing is done in the driver. This
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@ -100,5 +102,10 @@ contrasts with drivers intended only for filesystem access. These devolve the
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detail of page addressing to the filesystem by specifying the correct page size
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in the ioctl and (if necessary) implementing a block erase method.
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The nature of the drivers in this repo implies that the block address in the
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ioctl is arbitrary.
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The nature of the drivers in this repo implies that the page size in the ioctl
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is arbitrary. Littlefs requires a minimum size of 128 bytes -
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[theoretically 104](https://github.com/ARMmbed/littlefs/blob/master/DESIGN.md)
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but the driver only allows powers of 2. Testing was done with 512 bytes.
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Currently I have not had success with littlefs but it hasn't yet officially
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been released. The test programs therefore use FAT.
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16
bdevice.py
16
bdevice.py
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@ -18,10 +18,22 @@ class BlockDevice:
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self._a_bytes = chip_size * nchips # Size of array
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self._nbits = nbits # Block size in bits
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self._block_size = 2**nbits
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self._rwbuf = bytearray(1)
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def __len__(self):
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return self._a_bytes
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def __setitem__(self, addr, value):
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if isinstance(addr, slice):
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return self._wslice(addr, value)
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self._rwbuf[0] = value
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self.readwrite(addr, self._rwbuf, False)
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def __getitem__(self, addr):
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if isinstance(addr, slice):
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return self._rslice(addr)
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return self.readwrite(addr, self._rwbuf, True)[0]
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# Handle special cases of a slice. Always return a pair of positive indices.
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def _do_slice(self, addr):
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if not (addr.step is None or addr.step == 1):
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@ -32,7 +44,7 @@ class BlockDevice:
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stop = stop if stop >= 0 else self._a_bytes + stop
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return start, stop
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def wslice(self, addr, value):
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def _wslice(self, addr, value):
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start, stop = self._do_slice(addr)
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try:
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if len(value) == (stop - start):
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@ -43,7 +55,7 @@ class BlockDevice:
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raise RuntimeError('Can only assign bytes/bytearray to a slice')
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return res
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def rslice(self, addr):
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def _rslice(self, addr):
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start, stop = self._do_slice(addr)
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buf = bytearray(stop - start)
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return self.readwrite(start, buf, True)
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@ -53,22 +53,6 @@ class EEPROM(BlockDevice):
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finally:
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time.sleep_ms(1)
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def __setitem__(self, addr, value):
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if isinstance(addr, slice):
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return self.wslice(addr, value)
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self._buf1[0] = value
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self._getaddr(addr, 1)
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self._i2c.writevto(self._i2c_addr, (self._addrbuf, self._buf1))
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self._wait_rdy() # Wait for write to complete
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def __getitem__(self, addr):
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if isinstance(addr, slice):
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return self.rslice(addr)
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self._getaddr(addr, 1)
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self._i2c.writeto(self._i2c_addr, self._addrbuf)
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self._i2c.readfrom_into(self._i2c_addr, self._buf1)
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return self._buf1[0]
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# Given an address, set ._i2c_addr and ._addrbuf and return the number of
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# bytes that can be processed in the current page
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def _getaddr(self, addr, nbytes): # Set up _addrbuf and _i2c_addr
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55
spi/SPI.md
55
spi/SPI.md
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@ -1,6 +1,9 @@
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# 1. A MicroPython SPI EEPROM driver
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This driver supports the Microchip 25xx1024 series of 128KiB SPI EEPROMs.
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This driver supports the Microchip 25xx1024 series of 128KiB SPI EEPROMs and
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the STM M95M02-DR 256KiB device. These have 1M and 4M cycles of write endurance
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respectively (compared to 10K for Pyboard Flash memory).
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Multiple chips may be used to construct a single logical nonvolatile memory
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module. The driver allows the memory either to be mounted in the target
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filesystem as a disk device or to be addressed as an array of bytes.
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@ -13,13 +16,23 @@ The driver has the following attributes:
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5. The SPI bus can be shared with other chips.
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6. It supports filesystem mounting.
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7. Alternatively it can support byte-level access using Python slice syntax.
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8. RAM allocations are minimised.
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8. RAM allocations are minimised. Buffer sizes are tiny.
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## 1.1 This document
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Code samples assume one or more Microchip devices. If using the STM chip the
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SPI baudrate should be 5MHz and the chip size must be specified to the `EEPROM`
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constructor, e.g.:
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```python
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eep = EEPROM(SPI(2, baudrate=5_000_000), cspins, 256)
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```
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# 2. Connections
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Any SPI interface may be used. The table below assumes a Pyboard running SPI(2)
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as per the test program. To wire up a single EEPROM chip, connect to a Pyboard
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as below. Pin numbers assume a PDIP package (8 pin plastic dual-in-line).
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as below. Pin numbers assume a PDIP package (8 pin plastic dual-in-line) for
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the Microchip device and 8 pin SOIC for the STM chip.
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| EEPROM | Signal | PB | Signal |
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|:-------:|:------:|:---:|:------:|
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@ -34,8 +47,7 @@ as below. Pin numbers assume a PDIP package (8 pin plastic dual-in-line).
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For multiple chips a separate CS pin must be assigned to each chip: each one
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must be wired to a single chip's CS line. Multiple chips should have 3V3, Gnd,
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SCL, MOSI and MISO lines wired in parallel. The SPI bus is fast: wiring should
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be short and direct.
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SCL, MOSI and MISO lines wired in parallel.
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If you use a Pyboard D and power the EEPROMs from the 3V3 output you will need
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to enable the voltage rail by issuing:
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@ -44,6 +56,14 @@ machine.Pin.board.EN_3V3.value(1)
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```
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Other platforms may vary.
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## 2.1 SPI Bus
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The Microchip devices support baudrates up to 20MHz. The STM chip has a maximum
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of 5MHz. Both support the default SPI mode: simply specify the baudrate to the
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constructor.
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The SPI bus is fast: wiring should be short and direct.
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# 3. Files
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1. `eeprom_spi.py` Device driver.
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@ -56,7 +76,7 @@ Installation: copy files 1 and 2 (optionally 3) to the target filesystem.
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The driver supports mounting the EEPROM chips as a filesystem. Initially the
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device will be unformatted so it is necessary to issue code along these lines to
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format the device. Code assumes two devices:
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format the device. Code assumes two Microchip devices:
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```python
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import uos
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@ -94,9 +114,10 @@ Arguments:
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1. `spi` Mandatory. An initialised SPI bus created by `machine`.
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2. `cspins` A list or tuple of `Pin` instances. Each `Pin` must be initialised
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as an output (`Pin.OUT`) and with `value=1` and be created by `machine`.
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3. `verbose=True` If `True`, the constructor issues information on the EEPROM
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3. `size=128` Chip size in KiB. Set to 256 for the STM chip.
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4. `verbose=True` If `True`, the constructor issues information on the EEPROM
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devices it has detected.
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4. `block_size=9` The block size reported to the filesystem. The size in bytes
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5. `block_size=9` The block size reported to the filesystem. The size in bytes
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is `2**block_size` so is 512 bytes by default.
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SPI baudrate: The 25LC1024 supports baudrates of upto 20MHz. If this value is
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@ -108,7 +129,8 @@ exceeding this figure.
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It is possible to read and write individual bytes or arrays of arbitrary size.
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Larger arrays are faster, especially when writing: the driver uses the chip's
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hardware page access where possible. Writing a page (256 bytes) takes the same
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time (~5ms) as writing a single byte.
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time as writing a single byte. This is 6ms max on the Microchip and 10ms max on
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the STM.
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The examples below assume two devices, one with `CS` connected to Pyboard pin
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Y4 and the other with `CS` connected to Y5.
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@ -171,7 +193,7 @@ identify the chip.
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#### erase
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Erases the entire array.
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Erases the entire array. Available only on the Microchip device.
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### 4.1.4 Methods providing the block protocol
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@ -216,28 +238,29 @@ possible to use JSON/pickle to store objects in a filesystem.
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# 5. Test program eep_spi.py
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This assumes a Pyboard 1.x or Pyboard D with EEPROM(s) wired as above. It
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provides the following.
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This assumes a Pyboard 1.x or Pyboard D with two EEPROMs wired to SPI(2) as
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above with chip selects connected to pins `Y4` and `Y5`. It provides the
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following. In all cases the stm arg should be `True` if using the STM chips.
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## 5.1 test()
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## 5.1 test(stm=False)
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This performs a basic test of single and multi-byte access to chip 0. The test
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reports how many chips can be accessed. Existing array data will be lost. This
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primarily tests the driver: as a hardware test it is not exhaustive.
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## 5.2 full_test()
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## 5.2 full_test(stm=False)
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This is a hardware test. Tests the entire array. Fills each 256 byte page with
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random data, reads it back, and checks the outcome. Existing array data will be
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lost.
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## 5.3 fstest(format=False)
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## 5.3 fstest(format=False, stm=False)
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If `True` is passed, formats the EEPROM array as a FAT filesystem and mounts
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the device on `/eeprom`. If no arg is passed it mounts the array and lists the
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contents. It also prints the outcome of `uos.statvfs` on the array.
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## 5.4 cptest()
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## 5.4 cptest(stm=False)
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Tests copying the source files to the filesystem. The test will fail if the
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filesystem was not formatted. Lists the contents of the mountpoint and prints
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@ -10,10 +10,13 @@ from eeprom_spi import EEPROM
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cspins = (Pin(Pin.board.Y5, Pin.OUT, value=1), Pin(Pin.board.Y4, Pin.OUT, value=1))
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# Return an EEPROM array. Adapt for platforms other than Pyboard.
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def get_eep():
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def get_eep(stm):
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if uos.uname().machine.split(' ')[0][:4] == 'PYBD':
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Pin.board.EN_3V3.value(1)
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eep = EEPROM(SPI(2, baudrate=20_000_000), cspins)
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if stm:
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eep = EEPROM(SPI(2, baudrate=5_000_000), cspins, 256)
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else:
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eep = EEPROM(SPI(2, baudrate=20_000_000), cspins)
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print('Instantiated EEPROM')
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return eep
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@ -56,8 +59,8 @@ def _testblock(eep, bs):
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if res != d2:
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return 'Block test fail 3:' + res
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def test():
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eep = get_eep()
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def test(stm=False):
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eep = get_eep(stm)
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sa = 1000
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for v in range(256):
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eep[sa + v] = v
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@ -92,8 +95,8 @@ def test():
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print('Test chip boundary skipped: only one chip!')
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# ***** TEST OF FILESYSTEM MOUNT *****
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def fstest(format=False):
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eep = get_eep()
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def fstest(format=False, stm=False):
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eep = get_eep(stm)
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if format:
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uos.VfsFat.mkfs(eep)
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vfs=uos.VfsFat(eep)
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@ -105,8 +108,8 @@ def fstest(format=False):
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print('Contents of "/eeprom": {}'.format(uos.listdir('/eeprom')))
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print(uos.statvfs('/eeprom'))
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def cptest():
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eep = get_eep()
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def cptest(stm=False):
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eep = get_eep(stm)
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if 'eeprom' in uos.listdir('/'):
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print('Device already mounted.')
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else:
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@ -124,8 +127,8 @@ def cptest():
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# ***** TEST OF HARDWARE *****
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def full_test():
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eep = get_eep()
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def full_test(stm=False):
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eep = get_eep(stm)
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page = 0
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for sa in range(0, len(eep), 256):
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data = uos.urandom(256)
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@ -1,5 +1,6 @@
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# eeprom_spi.py MicroPython driver for Microchip SPI EEPROM devices,
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# currently only 25xx1024.
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# eeprom_spi.py MicroPython driver for Microchip 128KiB SPI EEPROM device,
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# also STM 256KiB chip
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# TODO the latter not yet tested.
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# Released under the MIT License (MIT). See LICENSE.
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# Copyright (c) 2019 Peter Hinch
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@ -8,24 +9,29 @@ import time
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from micropython import const
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from bdevice import BlockDevice
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_SIZE = const(131072) # Chip size 128KiB
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# Supported instruction set
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_READ = const(3)
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_WRITE = const(2)
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_WREN = const(6) # Write enable
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_RDSR = const(5) # Read status register
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_RDID = const(0xab) # Read chip ID
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_CE = const(0xc7) # Chip erase
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_CE = const(0xc7) # Chip erase (Microchip only)
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# Not implemented: Write disable and Write status register
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# _WRDI = const(4)
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# _WRSR = const(1)
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#_RDID_STM = const(0x83) # STM only read ID page
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#_WRID_STM = const(0x82)
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#_STM_ID = const(0x30) # Arbitrary ID for STM chip
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# Logical EEPROM device comprising one or more physical chips sharing an SPI bus.
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class EEPROM(BlockDevice):
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def __init__(self, spi, cspins, verbose=True, block_size=9):
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def __init__(self, spi, cspins, size=128, verbose=True, block_size=9):
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# args: virtual block size in bits, no. of chips, bytes in each chip
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super().__init__(block_size, len(cspins), _SIZE)
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if size not in (128, 256):
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raise ValueError('Valid sizes are 128 or 256')
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super().__init__(block_size, len(cspins), size * 1024)
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self._stm = size == 256
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self._spi = spi
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self._cspins = cspins
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self._ccs = None # Chip select Pin object for current chip
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@ -33,22 +39,62 @@ class EEPROM(BlockDevice):
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self._mvp = memoryview(self._bufp) # cost-free slicing
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self.scan(verbose)
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# Check for a valid hardware configuration
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def scan(self, verbose):
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||||
# STM Datasheet too vague about the ID block. Do we need _WREN? Do we need to poll ready?
|
||||
#def _stm_rdid(self):
|
||||
#mvp = self._mvp
|
||||
#mvp[:] = b'\0\0\0\0\0'
|
||||
#mvp[0] = _RDID_STM
|
||||
#cs(0)
|
||||
#self._spi.write_readinto(mvp, mvp)
|
||||
#cs(1)
|
||||
#return mvp[4]
|
||||
|
||||
#def _stm_wrid(self):
|
||||
#mvp = self._mvp
|
||||
#mvp[:] = b'\0\0\0\0\0'
|
||||
#mvp[0] = _WRID_STM
|
||||
#mvp[5] = _STM_ID
|
||||
#cs(0)
|
||||
#self._spi.write(mvp)
|
||||
#cs(1)
|
||||
|
||||
# Check for a valid hardware configuration: just see if we can write to offset 0
|
||||
# Tested (on Microchip), but probably better to use ID block
|
||||
def _stm_scan(self):
|
||||
for n in range(len(self._cspins)):
|
||||
ta = n * self._c_bytes
|
||||
v = self[ta]
|
||||
vx = v^0xff
|
||||
self[ta] = vx
|
||||
if self[ta] == vx: # Wrote OK, put back
|
||||
self[ta] = v
|
||||
else:
|
||||
raise RuntimeError('EEPROM not found at cs[{}].'.format(n))
|
||||
return n
|
||||
|
||||
# Scan for Microchip devices: read manf ID
|
||||
def _mc_scan(self):
|
||||
mvp = self._mvp
|
||||
for n, cs in enumerate(self._cspins):
|
||||
mvp[:] = b'\0\0\0\0\0'
|
||||
mvp[0] = _RDID
|
||||
cs(0)
|
||||
self._spi.write_readinto(mvp[:5], mvp[:5])
|
||||
self._spi.write_readinto(mvp, mvp)
|
||||
cs(1)
|
||||
if mvp[4] != 0x29:
|
||||
raise RuntimeError('EEPROM not found at cs[{}].'.format(n))
|
||||
return n
|
||||
|
||||
# Check for a valid hardware configuration
|
||||
def scan(self, verbose):
|
||||
n = self._stm_scan() if self._stm else self._mc_scan()
|
||||
if verbose:
|
||||
s = '{} chips detected. Total EEPROM size {}bytes.'
|
||||
print(s.format(n + 1, self._a_bytes))
|
||||
|
||||
def erase(self):
|
||||
if self._stm:
|
||||
raise RuntimeError('Erase not available on STM chip')
|
||||
mvp = self._mvp
|
||||
for cs in self._cspins: # For each chip
|
||||
mvp[0] = _WREN
|
||||
|
|
@ -73,35 +119,6 @@ class EEPROM(BlockDevice):
|
|||
break
|
||||
time.sleep_ms(1)
|
||||
|
||||
def __setitem__(self, addr, value):
|
||||
if isinstance(addr, slice):
|
||||
return self.wslice(addr, value)
|
||||
mvp = self._mvp
|
||||
mvp[0] = _WREN
|
||||
self._getaddr(addr, 1) # Sets mv[1:4], updates ._ccs
|
||||
cs = self._ccs # Retrieve current cs pin
|
||||
cs(0)
|
||||
self._spi.write(mvp[:1])
|
||||
cs(1)
|
||||
mvp[0] = _WRITE
|
||||
mvp[4] = value
|
||||
cs(0)
|
||||
self._spi.write(mvp[:5])
|
||||
cs(1) # Trigger write
|
||||
self._wait_rdy() # Wait for write to complete
|
||||
|
||||
def __getitem__(self, addr):
|
||||
if isinstance(addr, slice):
|
||||
return self.rslice(addr)
|
||||
mvp = self._mvp
|
||||
mvp[0] = _READ
|
||||
self._getaddr(addr, 1)
|
||||
cs = self._ccs
|
||||
cs(0)
|
||||
self._spi.write_readinto(mvp[:5], mvp[:5])
|
||||
cs(1)
|
||||
return mvp[4]
|
||||
|
||||
# Given an address, set current chip select and address buffer.
|
||||
# Return the number of bytes that can be processed in the current page.
|
||||
def _getaddr(self, addr, nbytes):
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue