From 1fa3fea9e36f968d5c862b0b785d969584a7d6db Mon Sep 17 00:00:00 2001
From: Peter Hinch <peter@hinch.me.uk>
Date: Thu, 18 Jan 2024 10:34:25 +0000
Subject: [PATCH] eeprom SPI: Add ready timeout.

---
 eeprom/spi/eeprom_spi.py | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/eeprom/spi/eeprom_spi.py b/eeprom/spi/eeprom_spi.py
index 27142ce..88f110e 100644
--- a/eeprom/spi/eeprom_spi.py
+++ b/eeprom/spi/eeprom_spi.py
@@ -89,6 +89,7 @@ class EEPROM(EepromDevice):
     def _wait_rdy(self):  # After a write, wait for device to become ready
         mvp = self._mvp
         cs = self._ccs  # Chip is already current
+        tstart = time.ticks_ms()
         while True:
             mvp[0] = _RDSR
             cs(0)
@@ -97,6 +98,8 @@ class EEPROM(EepromDevice):
             if not mvp[1]:  # We never set BP0 or BP1 so ready state is 0.
                 break
             time.sleep_ms(1)
+            if time.ticks_diff(ticks_ms(), tstart) > 1000:
+                raise OSError("Device ready timeout.")
 
     # Given an address, set current chip select and address buffer.
     # Return the number of bytes that can be processed in the current page.