micropython/ports/renesas-ra/boards/EK_RA6M1/ra_cfg/fsp_cfg/r_iic_master_cfg.h

8 wiersze
311 B
C

/* generated configuration header file - do not edit */
#ifndef R_IIC_MASTER_CFG_H_
#define R_IIC_MASTER_CFG_H_
#define IIC_MASTER_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define IIC_MASTER_CFG_DTC_ENABLE (0)
#define IIC_MASTER_CFG_ADDR_MODE_10_BIT_ENABLE (0)
#endif /* R_IIC_MASTER_CFG_H_ */