kopia lustrzana https://github.com/micropython/micropython
666 wiersze
43 KiB
C
666 wiersze
43 KiB
C
/**
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******************************************************************************
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* @file stm32f4xx_hal_sd.h
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* @author MCD Application Team
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* @version V1.0.0
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* @date 18-February-2014
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* @brief Header file of SD HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_HAL_SD_H
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#define __STM32F4xx_HAL_SD_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_ll_sdmmc.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup SD
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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#define SD_InitTypeDef SDIO_InitTypeDef
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#define SD_TypeDef SDIO_TypeDef
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/**
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* @brief SDIO Handle Structure definition
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*/
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typedef struct
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{
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SD_TypeDef *Instance; /*!< SDIO register base address */
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SD_InitTypeDef Init; /*!< SD required parameters */
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HAL_LockTypeDef Lock; /*!< SD locking object */
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uint32_t CardType; /*!< SD card type */
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uint32_t RCA; /*!< SD relative card address */
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uint32_t CSD[4]; /*!< SD card specific data table */
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uint32_t CID[4]; /*!< SD card identification number table */
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__IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */
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__IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */
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__IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */
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__IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */
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DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
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DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
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}SD_HandleTypeDef;
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/**
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* @brief Card Specific Data: CSD Register
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*/
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typedef struct
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{
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__IO uint8_t CSDStruct; /*!< CSD structure */
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__IO uint8_t SysSpecVersion; /*!< System specification version */
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__IO uint8_t Reserved1; /*!< Reserved */
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__IO uint8_t TAAC; /*!< Data read access time 1 */
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__IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
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__IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
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__IO uint16_t CardComdClasses; /*!< Card command classes */
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__IO uint8_t RdBlockLen; /*!< Max. read data block length */
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__IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
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__IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
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__IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
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__IO uint8_t DSRImpl; /*!< DSR implemented */
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__IO uint8_t Reserved2; /*!< Reserved */
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__IO uint32_t DeviceSize; /*!< Device Size */
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__IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
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__IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
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__IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
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__IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
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__IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
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__IO uint8_t EraseGrSize; /*!< Erase group size */
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__IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
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__IO uint8_t WrProtectGrSize; /*!< Write protect group size */
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__IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
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__IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
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__IO uint8_t WrSpeedFact; /*!< Write speed factor */
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__IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
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__IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
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__IO uint8_t Reserved3; /*!< Reserved */
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__IO uint8_t ContentProtectAppli; /*!< Content protection application */
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__IO uint8_t FileFormatGrouop; /*!< File format group */
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__IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
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__IO uint8_t PermWrProtect; /*!< Permanent write protection */
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__IO uint8_t TempWrProtect; /*!< Temporary write protection */
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__IO uint8_t FileFormat; /*!< File format */
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__IO uint8_t ECC; /*!< ECC code */
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__IO uint8_t CSD_CRC; /*!< CSD CRC */
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__IO uint8_t Reserved4; /*!< Always 1 */
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}HAL_SD_CSDTypedef;
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/**
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* @brief Card Identification Data: CID Register
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*/
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typedef struct
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{
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__IO uint8_t ManufacturerID; /*!< Manufacturer ID */
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__IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
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__IO uint32_t ProdName1; /*!< Product Name part1 */
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__IO uint8_t ProdName2; /*!< Product Name part2 */
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__IO uint8_t ProdRev; /*!< Product Revision */
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__IO uint32_t ProdSN; /*!< Product Serial Number */
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__IO uint8_t Reserved1; /*!< Reserved1 */
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__IO uint16_t ManufactDate; /*!< Manufacturing Date */
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__IO uint8_t CID_CRC; /*!< CID CRC */
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__IO uint8_t Reserved2; /*!< Always 1 */
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}HAL_SD_CIDTypedef;
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/**
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* @brief SD Card Status returned by ACMD13
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*/
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typedef struct
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{
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__IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */
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__IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */
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__IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */
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__IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */
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__IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */
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__IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */
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__IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */
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__IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */
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__IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */
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__IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */
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}HAL_SD_CardStatusTypedef;
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/**
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* @brief SD Card information structure
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*/
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typedef struct
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{
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HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */
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HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */
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uint64_t CardCapacity; /*!< Card capacity */
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uint32_t CardBlockSize; /*!< Card block size */
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uint16_t RCA; /*!< SD relative card address */
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uint8_t CardType; /*!< SD card type */
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}HAL_SD_CardInfoTypedef;
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/**
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* @brief SD Error status enumeration Structure definition
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*/
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typedef enum
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{
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/**
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* @brief SD specific error defines
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*/
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SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
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SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */
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SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
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SD_DATA_TIMEOUT = (4), /*!< Data timeout */
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SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */
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SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */
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SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */
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SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */
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SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
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SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
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SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */
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SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */
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SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
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SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
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SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
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SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
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SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
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SD_CC_ERROR = (18), /*!< Internal card controller error */
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SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */
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SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
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SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
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SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
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SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */
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SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
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SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
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SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
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SD_INVALID_VOLTRANGE = (27),
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SD_ADDR_OUT_OF_RANGE = (28),
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SD_SWITCH_ERROR = (29),
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SD_SDIO_DISABLED = (30),
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SD_SDIO_FUNCTION_BUSY = (31),
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SD_SDIO_FUNCTION_FAILED = (32),
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SD_SDIO_UNKNOWN_FUNCTION = (33),
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/**
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* @brief Standard error defines
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*/
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SD_INTERNAL_ERROR = (34),
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SD_NOT_CONFIGURED = (35),
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SD_REQUEST_PENDING = (36),
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SD_REQUEST_NOT_APPLICABLE = (37),
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SD_INVALID_PARAMETER = (38),
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SD_UNSUPPORTED_FEATURE = (39),
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SD_UNSUPPORTED_HW = (40),
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SD_ERROR = (41),
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SD_OK = (0)
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}HAL_SD_ErrorTypedef;
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/**
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* @brief SD Transfer state enumeration structure
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*/
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typedef enum
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{
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SD_TRANSFER_OK = 0, /*!< Transfer success */
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SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */
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SD_TRANSFER_ERROR = 2 /*!< Transfer failed */
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}HAL_SD_TransferStateTypedef;
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/**
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* @brief SD Card State enumeration structure
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*/
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typedef enum
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{
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SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */
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SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */
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SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */
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SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */
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SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */
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SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */
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SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */
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SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */
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SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */
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}HAL_SD_CardStateTypedef;
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/**
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* @brief SD Operation enumeration structure
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*/
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typedef enum
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{
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SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */
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SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */
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SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */
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SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */
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}HAL_SD_OperationTypedef;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup SD_Exported_Constants
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* @{
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*/
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/**
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* @brief SD Commands Index
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*/
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#define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */
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#define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */
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#define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
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#define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */
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#define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */
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#define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
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operating condition register (OCR) content in the response on the CMD line. */
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#define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
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#define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */
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#define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
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and asks the card whether card supports voltage. */
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#define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
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#define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */
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#define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */
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#define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */
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#define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */
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#define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
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#define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */
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#define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands
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(read, write, lock). Default block length is fixed to 512 Bytes. Not effective
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for SDHS and SDXC. */
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#define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
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fixed 512 bytes in case of SDHC and SDXC. */
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#define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by
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STOP_TRANSMISSION command. */
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#define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
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#define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */
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#define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */
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#define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
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fixed 512 bytes in case of SDHC and SDXC. */
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#define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
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#define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */
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#define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */
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#define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */
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#define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */
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#define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */
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#define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */
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#define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */
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#define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command
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system set by switch function command (CMD6). */
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#define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased.
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Reserved for each command system set by switch function command (CMD6). */
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#define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */
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#define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */
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#define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */
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#define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
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the SET_BLOCK_LEN command. */
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#define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather
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than a standard command. */
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#define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card
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for general purpose/application specific commands. */
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#define SD_CMD_NO_CMD ((uint8_t)64)
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/**
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* @brief Following commands are SD Card Specific commands.
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* SDIO_APP_CMD should be sent before sending these commands.
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*/
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#define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
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widths are given in SCR register. */
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#define SD_CMD_SD_APP_STAUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */
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#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
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32bit+CRC data block. */
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#define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
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send its operating condition register (OCR) content in the response on the CMD line. */
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#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
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#define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */
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#define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */
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#define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */
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/**
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* @brief Following commands are SD Card Specific security commands.
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* SD_CMD_APP_CMD should be sent before sending these commands.
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*/
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#define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */
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#define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */
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#define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */
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#define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */
|
|
#define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */
|
|
#define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */
|
|
#define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */
|
|
#define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */
|
|
#define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */
|
|
#define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */
|
|
#define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */
|
|
|
|
/**
|
|
* @brief Supported SD Memory Cards
|
|
*/
|
|
#define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
|
|
#define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
|
|
#define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
|
|
#define MULTIMEDIA_CARD ((uint32_t)0x00000003)
|
|
#define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
|
|
#define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
|
|
#define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
|
|
#define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Exported macro ------------------------------------------------------------*/
|
|
|
|
/** @defgroup SD_Interrupt_Clock
|
|
* @brief macros to handle interrupts and specific clock configurations
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Enable the SD device.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE()
|
|
|
|
/**
|
|
* @brief Disable the SD device.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE()
|
|
|
|
/**
|
|
* @brief Enable the SDIO DMA transfer.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE()
|
|
|
|
/**
|
|
* @brief Disable the SDIO DMA transfer.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE()
|
|
|
|
/**
|
|
* @brief Enable the SD device interrupt.
|
|
* @param __HANDLE__: SD Handle
|
|
* @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled.
|
|
* This parameter can be one or a combination of the following values:
|
|
* @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
|
|
* @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
|
|
* @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
|
|
* @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
|
|
* @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
|
|
* @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
|
|
* @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
|
|
* @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
|
|
* @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
|
|
* @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
|
|
* bus mode interrupt
|
|
* @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
|
|
* @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
|
|
* @arg SDIO_IT_TXACT: Data transmit in progress interrupt
|
|
* @arg SDIO_IT_RXACT: Data receive in progress interrupt
|
|
* @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
|
|
* @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
|
|
* @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
|
|
* @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
|
|
* @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
|
|
* @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
|
|
* @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
|
|
* @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
|
|
* @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
|
|
* @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
|
|
* @retval None
|
|
*/
|
|
#define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
|
|
|
|
/**
|
|
* @brief Disable the SD device interrupt.
|
|
* @param __HANDLE__: SD Handle
|
|
* @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled.
|
|
* This parameter can be one or a combination of the following values:
|
|
* @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
|
|
* @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
|
|
* @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
|
|
* @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
|
|
* @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
|
|
* @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
|
|
* @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
|
|
* @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
|
|
* @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
|
|
* @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
|
|
* bus mode interrupt
|
|
* @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
|
|
* @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
|
|
* @arg SDIO_IT_TXACT: Data transmit in progress interrupt
|
|
* @arg SDIO_IT_RXACT: Data receive in progress interrupt
|
|
* @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
|
|
* @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
|
|
* @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
|
|
* @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
|
|
* @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
|
|
* @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
|
|
* @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
|
|
* @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
|
|
* @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
|
|
* @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
|
|
* @retval None
|
|
*/
|
|
#define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
|
|
|
|
/**
|
|
* @brief Check whether the specified SD flag is set or not.
|
|
* @param __HANDLE__: SD Handle
|
|
* @param __FLAG__: specifies the flag to check.
|
|
* This parameter can be one of the following values:
|
|
* @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
|
|
* @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
|
|
* @arg SDIO_FLAG_CTIMEOUT: Command response timeout
|
|
* @arg SDIO_FLAG_DTIMEOUT: Data timeout
|
|
* @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
|
|
* @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
|
|
* @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
|
|
* @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
|
|
* @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
|
|
* @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
|
|
* @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
|
|
* @arg SDIO_FLAG_CMDACT: Command transfer in progress
|
|
* @arg SDIO_FLAG_TXACT: Data transmit in progress
|
|
* @arg SDIO_FLAG_RXACT: Data receive in progress
|
|
* @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
|
|
* @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
|
|
* @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
|
|
* @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
|
|
* @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
|
|
* @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
|
|
* @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
|
|
* @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
|
|
* @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
|
|
* @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
|
|
* @retval The new state of SD FLAG (SET or RESET).
|
|
*/
|
|
#define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
|
|
|
|
/**
|
|
* @brief Clear the SD's pending flags.
|
|
* @param __HANDLE__: SD Handle
|
|
* @param __FLAG__: specifies the flag to clear.
|
|
* This parameter can be one or a combination of the following values:
|
|
* @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
|
|
* @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
|
|
* @arg SDIO_FLAG_CTIMEOUT: Command response timeout
|
|
* @arg SDIO_FLAG_DTIMEOUT: Data timeout
|
|
* @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
|
|
* @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
|
|
* @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
|
|
* @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
|
|
* @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
|
|
* @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
|
|
* @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
|
|
* @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
|
|
* @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
|
|
* @retval None
|
|
*/
|
|
#define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
|
|
|
|
/**
|
|
* @brief Check whether the specified SD interrupt has occurred or not.
|
|
* @param __HANDLE__: SD Handle
|
|
* @param __INTERRUPT__: specifies the SDIO interrupt source to check.
|
|
* This parameter can be one of the following values:
|
|
* @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
|
|
* @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
|
|
* @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
|
|
* @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
|
|
* @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
|
|
* @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
|
|
* @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
|
|
* @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
|
|
* @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
|
|
* @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
|
|
* bus mode interrupt
|
|
* @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
|
|
* @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
|
|
* @arg SDIO_IT_TXACT: Data transmit in progress interrupt
|
|
* @arg SDIO_IT_RXACT: Data receive in progress interrupt
|
|
* @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
|
|
* @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
|
|
* @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
|
|
* @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
|
|
* @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
|
|
* @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
|
|
* @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
|
|
* @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
|
|
* @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
|
|
* @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
|
|
* @retval The new state of SD IT (SET or RESET).
|
|
*/
|
|
#define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__)
|
|
|
|
/**
|
|
* @brief Clear the SD's interrupt pending bits.
|
|
* @param __HANDLE__ : SD Handle
|
|
* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
|
|
* This parameter can be one or a combination of the following values:
|
|
* @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
|
|
* @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
|
|
* @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
|
|
* @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
|
|
* @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
|
|
* @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
|
|
* @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
|
|
* @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
|
|
* @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
|
|
* @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
|
|
* bus mode interrupt
|
|
* @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
|
|
* @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
|
|
* @retval None
|
|
*/
|
|
#define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Exported functions --------------------------------------------------------*/
|
|
|
|
/* Initialization/de-initialization functions **********************************/
|
|
HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo);
|
|
HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
|
|
void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
|
|
void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
|
|
|
|
/* I/O operation functions *****************************************************/
|
|
/* Blocking mode: Polling */
|
|
HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
|
|
HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
|
|
HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr);
|
|
|
|
/* Non-Blocking mode: Interrupt */
|
|
void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
|
|
|
|
/* Callback in non blocking modes (DMA) */
|
|
void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma);
|
|
void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma);
|
|
void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma);
|
|
void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma);
|
|
void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd);
|
|
void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd);
|
|
|
|
/* Non-Blocking mode: DMA */
|
|
HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
|
|
HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
|
|
HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
|
|
HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
|
|
|
|
/* Peripheral Control functions ************************************************/
|
|
HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo);
|
|
HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode);
|
|
HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd);
|
|
HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd);
|
|
|
|
/* Peripheral State functions **************************************************/
|
|
HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
|
|
HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus);
|
|
HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd);
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
|
|
#endif /* __STM32F4xx_HAL_SD_H */
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|