kopia lustrzana https://github.com/micropython/micropython
107 wiersze
4.0 KiB
C
107 wiersze
4.0 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2024 NXP
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MP_PORT_MCX_MACHINE_PIN_DEFS_H
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#define MP_PORT_MCX_MACHINE_PIN_DEFS_H
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typedef enum {
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MACHINE_PIN_AF_TYPE_GPIO = 0U, /* GPIO */
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MACHINE_PIN_AF_TYPE_LPFC, /* LP_FLEXCOMM */
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MACHINE_PIN_AF_TYPE_UART, /* LPUART */
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MACHINE_PIN_AF_TYPE_CT32, /* CTIMER */
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} machine_pin_af_type_t;
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typedef enum {
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MACHINE_PIN_AF_ATTR_GPIO_P0 = 0U,
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MACHINE_PIN_AF_ATTR_GPIO_P1,
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MACHINE_PIN_AF_ATTR_GPIO_P2,
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MACHINE_PIN_AF_ATTR_GPIO_P3,
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MACHINE_PIN_AF_ATTR_GPIO_P4,
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MACHINE_PIN_AF_ATTR_GPIO_P5,
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MACHINE_PIN_AF_ATTR_GPIO_P6,
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MACHINE_PIN_AF_ATTR_GPIO_P7,
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MACHINE_PIN_AF_ATTR_GPIO_P8,
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MACHINE_PIN_AF_ATTR_GPIO_P9,
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MACHINE_PIN_AF_ATTR_GPIO_P10,
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MACHINE_PIN_AF_ATTR_GPIO_P11,
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MACHINE_PIN_AF_ATTR_GPIO_P12,
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MACHINE_PIN_AF_ATTR_GPIO_P13,
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MACHINE_PIN_AF_ATTR_GPIO_P14,
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MACHINE_PIN_AF_ATTR_GPIO_P15,
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MACHINE_PIN_AF_ATTR_GPIO_P16,
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MACHINE_PIN_AF_ATTR_GPIO_P17,
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MACHINE_PIN_AF_ATTR_GPIO_P18,
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MACHINE_PIN_AF_ATTR_GPIO_P19,
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MACHINE_PIN_AF_ATTR_GPIO_P20,
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MACHINE_PIN_AF_ATTR_GPIO_P21,
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MACHINE_PIN_AF_ATTR_GPIO_P22,
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MACHINE_PIN_AF_ATTR_GPIO_P23,
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MACHINE_PIN_AF_ATTR_GPIO_P24,
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MACHINE_PIN_AF_ATTR_GPIO_P25,
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MACHINE_PIN_AF_ATTR_GPIO_P26,
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MACHINE_PIN_AF_ATTR_GPIO_P27,
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MACHINE_PIN_AF_ATTR_GPIO_P28,
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MACHINE_PIN_AF_ATTR_GPIO_P29,
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MACHINE_PIN_AF_ATTR_GPIO_P30,
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MACHINE_PIN_AF_ATTR_GPIO_P31,
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MACHINE_PIN_AF_ATTR_LPFC_P0 = 0U,
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MACHINE_PIN_AF_ATTR_LPFC_P1,
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MACHINE_PIN_AF_ATTR_LPFC_P2,
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MACHINE_PIN_AF_ATTR_LPFC_P3,
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MACHINE_PIN_AF_ATTR_LPFC_P4,
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MACHINE_PIN_AF_ATTR_LPFC_P5,
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MACHINE_PIN_AF_ATTR_LPFC_P6,
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MACHINE_PIN_AF_ATTR_CT32_MAT0 = 0U,
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MACHINE_PIN_AF_ATTR_CT32_MAT1,
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MACHINE_PIN_AF_ATTR_CT32_MAT2,
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MACHINE_PIN_AF_ATTR_CT32_MAT3,
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MACHINE_PIN_AF_ATTR_CT32_INP0 = (0x80U | 0U), /* Special mark */
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MACHINE_PIN_AF_ATTR_CT32_INP1 = (0x80U | 1U),
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MACHINE_PIN_AF_ATTR_CT32_INP2 = (0x80U | 2U),
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MACHINE_PIN_AF_ATTR_CT32_INP3 = (0x80U | 3U),
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MACHINE_PIN_AF_ATTR_CT32_INP4 = (0x80U | 4U),
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MACHINE_PIN_AF_ATTR_CT32_INP5 = (0x80U | 5U),
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MACHINE_PIN_AF_ATTR_CT32_INP6 = (0x80U | 6U),
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MACHINE_PIN_AF_ATTR_CT32_INP7 = (0x80U | 7U),
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MACHINE_PIN_AF_ATTR_CT32_INP8 = (0x80U | 8U),
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MACHINE_PIN_AF_ATTR_CT32_INP9 = (0x80U | 9U),
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MACHINE_PIN_AF_ATTR_CT32_INP10 = (0x80U | 10U),
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MACHINE_PIN_AF_ATTR_CT32_INP11 = (0x80U | 11U),
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MACHINE_PIN_AF_ATTR_CT32_INP12 = (0x80U | 12U),
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MACHINE_PIN_AF_ATTR_CT32_INP13 = (0x80U | 13U),
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MACHINE_PIN_AF_ATTR_CT32_INP14 = (0x80U | 14U),
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MACHINE_PIN_AF_ATTR_CT32_INP15 = (0x80U | 15U),
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MACHINE_PIN_AF_ATTR_CT32_INP16 = (0x80U | 16U),
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MACHINE_PIN_AF_ATTR_CT32_INP17 = (0x80U | 17U),
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MACHINE_PIN_AF_ATTR_CT32_INP18 = (0x80U | 18U),
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MACHINE_PIN_AF_ATTR_CT32_INP19 = (0x80U | 19U),
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} machine_pin_af_attr_t;
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#endif
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