kopia lustrzana https://github.com/micropython/micropython
130 wiersze
5.0 KiB
C
130 wiersze
5.0 KiB
C
/*
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** ###################################################################
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** Processors: MCXN947VDF_cm33_core0
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** MCXN947VNL_cm33_core0
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**
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** Compilers: GNU C Compiler
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** IAR ANSI C/C++ Compiler for ARM
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** Keil ARM C/C++ Compiler
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** MCUXpresso Compiler
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**
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** Reference manual: MCXNx4x Reference Manual
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** Version: rev. 2.0, 2023-02-01
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** Build: b231120
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**
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** Abstract:
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** Provides a system configuration function and a global variable that
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** contains the system frequency. It configures the device and initializes
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** the oscillator (PLL) that is part of the microcontroller device.
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**
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** Copyright 2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2023 NXP
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** Revisions:
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** - rev. 1.0 (2022-10-01)
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** Initial version
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** - rev. 2.0 (2023-02-01)
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** Initial version based on Rev. 2 Draft B
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**
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** ###################################################################
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*/
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/*!
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* @file MCXN947_cm33_core0
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* @version 2.0
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* @date 2023-02-01
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* @brief Device specific configuration file for MCXN947_cm33_core0
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* (implementation file)
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*
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* Provides a system configuration function and a global variable that contains
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* the system frequency. It configures the device and initializes the oscillator
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* (PLL) that is part of the microcontroller device.
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*/
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#include <stdint.h>
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#include "fsl_device_registers.h"
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/* ----------------------------------------------------------------------------
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-- Core clock
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---------------------------------------------------------------------------- */
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uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
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/* ----------------------------------------------------------------------------
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-- SystemInit()
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---------------------------------------------------------------------------- */
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__attribute__ ((weak)) void SystemInit(void) {
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#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
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SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10, CP11 Full Access in Secure mode */
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#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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SCB_NS->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10, CP11 Full Access in Non-secure mode */
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#endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
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#endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
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SCB->CPACR |= ((3UL << 0 * 2) | (3UL << 1 * 2)); /* set CP0, CP1 Full Access in Secure mode (enable PowerQuad) */
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#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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SCB_NS->CPACR |= ((3UL << 0 * 2) | (3UL << 1 * 2)); /* set CP0, CP1 Full Access in Normal mode (enable PowerQuad) */
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#endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
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SCB->NSACR |= ((3UL << 0) | (3UL << 10)); /* enable CP0, CP1, CP10, CP11 Non-secure Access */
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SYSCON->ECC_ENABLE_CTRL = 0; /* disable RAM ECC to get max RAM size */
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// SYSCON->NVM_CTRL &= ~SYSCON_NVM_CTRL_DIS_MBECC_ERR_DATA_MASK; /* enables bus error on multi-bit ECC error for data */
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#if defined(__MCUXPRESSO)
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extern void(*const g_pfnVectors[]) (void);
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SCB->VTOR = (uint32_t)&g_pfnVectors;
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#else
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extern void *__Vectors;
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SCB->VTOR = (uint32_t)&__Vectors;
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#endif
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/* enable the flash cache LPCAC */
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SYSCON->LPCAC_CTRL &= ~SYSCON_LPCAC_CTRL_DIS_LPCAC_MASK;
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/* Disable aGDET trigger the CHIP_RESET */
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ITRC0->OUT_SEL[4][0] = (ITRC0->OUT_SEL[4][0] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn_MASK) | (ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn(0x2));
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ITRC0->OUT_SEL[4][1] = (ITRC0->OUT_SEL[4][1] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn_MASK) | (ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn(0x2));
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/* Disable aGDET interrupt and reset */
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SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_GLITCH_DETECT_DISABLE_MASK;
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SPC0->VDD_CORE_GLITCH_DETECT_SC &= ~SPC_VDD_CORE_GLITCH_DETECT_SC_LOCK_MASK;
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SPC0->VDD_CORE_GLITCH_DETECT_SC = 0x3C;
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/* Disable dGDET trigger the CHIP_RESET */
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ITRC0->OUT_SEL[4][0] = (ITRC0->OUT_SEL[4][0] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn_MASK) | (ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn(0x2));
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ITRC0->OUT_SEL[4][1] = (ITRC0->OUT_SEL[4][1] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn_MASK) | (ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn(0x2));
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GDET0->GDET_ENABLE1 = 0;
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GDET1->GDET_ENABLE1 = 0;
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SystemInitHook();
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}
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/* ----------------------------------------------------------------------------
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-- SystemCoreClockUpdate()
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---------------------------------------------------------------------------- */
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void SystemCoreClockUpdate(void) {
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}
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/* ----------------------------------------------------------------------------
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-- SystemInitHook()
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---------------------------------------------------------------------------- */
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__attribute__ ((weak)) void SystemInitHook(void) {
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/* Void implementation of the weak function. */
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}
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