micropython/ports/stm32/boards/NUCLEO_L476RG
Chris Mason 3786592097 stm32/boards: Optimise flash and RAM allocation for L4 boards.
Optimisations are:
- Remove FLASH_ISR section since devices with a small flash sector erase
  size don't need special FLASH_ISR handling.  This reduces flash image by
  approx 1.5k.
- Make SRAM2 contiguous with SRAM1 where possible.
- Simplify configuration of 2k RAM buffer used for flash filesystem.

RAM changes with this commit:
- L432: stack   6k -> 10k,  bss + heap   42k ->  52k
- L476: stack  16k -> 30k,  bss + heap   80k ->  96k
- L496: stack 206k -> 16k,  bss + heap  112k -> 302k
2019-07-01 16:57:20 +10:00
..
mpconfigboard.h stm32/boards/NUCLEO_L476RG: Add support for RNG, DAC and CAN1. 2019-02-14 00:28:28 +11:00
mpconfigboard.mk stm32/boards: Optimise flash and RAM allocation for L4 boards. 2019-07-01 16:57:20 +10:00
pins.csv ports: Make new ports/ sub-directory and move all ports there. 2017-09-06 13:40:51 +10:00
stm32l4xx_hal_conf.h stm32/boards: Rework all stm32??xx_hal_conf.h files to use common code. 2019-06-25 14:18:24 +10:00