kopia lustrzana https://github.com/micropython/micropython
586 wiersze
23 KiB
C
586 wiersze
23 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013-2015 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <string.h>
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#include "modmachine.h"
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#include "py/gc.h"
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#include "py/runtime.h"
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#include "py/mphal.h"
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#include "extmod/machine_mem.h"
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#include "extmod/machine_signal.h"
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#include "extmod/machine_pulse.h"
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#include "extmod/machine_i2c.h"
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#include "lib/utils/pyexec.h"
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#include "lib/oofatfs/ff.h"
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#include "extmod/vfs.h"
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#include "extmod/vfs_fat.h"
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#include "gccollect.h"
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#include "irq.h"
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#include "rng.h"
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#include "storage.h"
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#include "pin.h"
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#include "timer.h"
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#include "usb.h"
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#include "rtc.h"
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#include "i2c.h"
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#include "spi.h"
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#include "wdt.h"
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#if defined(MCU_SERIES_F4)
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// the HAL does not define these constants
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#define RCC_CSR_IWDGRSTF (0x20000000)
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#define RCC_CSR_PINRSTF (0x04000000)
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#elif defined(MCU_SERIES_L4)
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// L4 does not have a POR, so use BOR instead
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#define RCC_CSR_PORRSTF RCC_CSR_BORRSTF
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#endif
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#define PYB_RESET_SOFT (0)
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#define PYB_RESET_POWER_ON (1)
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#define PYB_RESET_HARD (2)
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#define PYB_RESET_WDT (3)
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#define PYB_RESET_DEEPSLEEP (4)
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STATIC uint32_t reset_cause;
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void machine_init(void) {
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#if defined(MCU_SERIES_F4)
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if (PWR->CSR & PWR_CSR_SBF) {
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// came out of standby
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reset_cause = PYB_RESET_DEEPSLEEP;
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PWR->CR |= PWR_CR_CSBF;
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} else
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#endif
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{
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// get reset cause from RCC flags
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uint32_t state = RCC->CSR;
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if (state & RCC_CSR_IWDGRSTF || state & RCC_CSR_WWDGRSTF) {
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reset_cause = PYB_RESET_WDT;
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} else if (state & RCC_CSR_PORRSTF || state & RCC_CSR_BORRSTF) {
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reset_cause = PYB_RESET_POWER_ON;
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} else if (state & RCC_CSR_PINRSTF) {
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reset_cause = PYB_RESET_HARD;
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} else {
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// default is soft reset
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reset_cause = PYB_RESET_SOFT;
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}
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}
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// clear RCC reset flags
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RCC->CSR |= RCC_CSR_RMVF;
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}
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// machine.info([dump_alloc_table])
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// Print out lots of information about the board.
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STATIC mp_obj_t machine_info(mp_uint_t n_args, const mp_obj_t *args) {
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// get and print unique id; 96 bits
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{
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byte *id = (byte*)MP_HAL_UNIQUE_ID_ADDRESS;
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printf("ID=%02x%02x%02x%02x:%02x%02x%02x%02x:%02x%02x%02x%02x\n", id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7], id[8], id[9], id[10], id[11]);
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}
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// get and print clock speeds
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// SYSCLK=168MHz, HCLK=168MHz, PCLK1=42MHz, PCLK2=84MHz
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{
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printf("S=%lu\nH=%lu\nP1=%lu\nP2=%lu\n",
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HAL_RCC_GetSysClockFreq(),
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HAL_RCC_GetHCLKFreq(),
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HAL_RCC_GetPCLK1Freq(),
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HAL_RCC_GetPCLK2Freq());
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}
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// to print info about memory
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{
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printf("_etext=%p\n", &_etext);
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printf("_sidata=%p\n", &_sidata);
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printf("_sdata=%p\n", &_sdata);
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printf("_edata=%p\n", &_edata);
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printf("_sbss=%p\n", &_sbss);
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printf("_ebss=%p\n", &_ebss);
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printf("_estack=%p\n", &_estack);
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printf("_ram_start=%p\n", &_ram_start);
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printf("_heap_start=%p\n", &_heap_start);
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printf("_heap_end=%p\n", &_heap_end);
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printf("_ram_end=%p\n", &_ram_end);
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}
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// qstr info
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{
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mp_uint_t n_pool, n_qstr, n_str_data_bytes, n_total_bytes;
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qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes);
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printf("qstr:\n n_pool=" UINT_FMT "\n n_qstr=" UINT_FMT "\n n_str_data_bytes=" UINT_FMT "\n n_total_bytes=" UINT_FMT "\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes);
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}
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// GC info
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{
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gc_info_t info;
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gc_info(&info);
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printf("GC:\n");
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printf(" " UINT_FMT " total\n", info.total);
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printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free);
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printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block);
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}
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// free space on flash
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{
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for (mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next) {
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if (strncmp("/flash", vfs->str, vfs->len) == 0) {
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// assumes that it's a FatFs filesystem
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fs_user_mount_t *vfs_fat = MP_OBJ_TO_PTR(vfs->obj);
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DWORD nclst;
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f_getfree(&vfs_fat->fatfs, &nclst);
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printf("LFS free: %u bytes\n", (uint)(nclst * vfs_fat->fatfs.csize * 512));
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break;
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}
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}
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}
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if (n_args == 1) {
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// arg given means dump gc allocation table
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gc_dump_alloc_table();
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info);
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// Returns a string of 12 bytes (96 bits), which is the unique ID for the MCU.
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STATIC mp_obj_t machine_unique_id(void) {
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byte *id = (byte*)MP_HAL_UNIQUE_ID_ADDRESS;
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return mp_obj_new_bytes(id, 12);
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
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// Resets the pyboard in a manner similar to pushing the external RESET button.
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STATIC mp_obj_t machine_reset(void) {
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NVIC_SystemReset();
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
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STATIC mp_obj_t machine_soft_reset(void) {
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pyexec_system_exit = PYEXEC_FORCED_EXIT;
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nlr_raise(mp_obj_new_exception(&mp_type_SystemExit));
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
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// Activate the bootloader without BOOT* pins.
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STATIC NORETURN mp_obj_t machine_bootloader(void) {
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pyb_usb_dev_deinit();
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storage_flush();
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HAL_RCC_DeInit();
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HAL_DeInit();
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#if defined(MCU_SERIES_F7)
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// arm-none-eabi-gcc 4.9.0 does not correctly inline this
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// MSP function, so we write it out explicitly here.
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//__set_MSP(*((uint32_t*) 0x1FF00000));
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__ASM volatile ("movw r3, #0x0000\nmovt r3, #0x1FF0\nldr r3, [r3, #0]\nMSR msp, r3\n" : : : "r3", "sp");
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((void (*)(void)) *((uint32_t*) 0x1FF00004))();
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#else
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__HAL_REMAPMEMORY_SYSTEMFLASH();
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// arm-none-eabi-gcc 4.9.0 does not correctly inline this
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// MSP function, so we write it out explicitly here.
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//__set_MSP(*((uint32_t*) 0x00000000));
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__ASM volatile ("movs r3, #0\nldr r3, [r3, #0]\nMSR msp, r3\n" : : : "r3", "sp");
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((void (*)(void)) *((uint32_t*) 0x00000004))();
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#endif
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while (1);
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}
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MP_DEFINE_CONST_FUN_OBJ_0(machine_bootloader_obj, machine_bootloader);
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// get or set the MCU frequencies
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STATIC mp_uint_t machine_freq_calc_ahb_div(mp_uint_t wanted_div) {
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if (wanted_div <= 1) { return RCC_SYSCLK_DIV1; }
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else if (wanted_div <= 2) { return RCC_SYSCLK_DIV2; }
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else if (wanted_div <= 4) { return RCC_SYSCLK_DIV4; }
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else if (wanted_div <= 8) { return RCC_SYSCLK_DIV8; }
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else if (wanted_div <= 16) { return RCC_SYSCLK_DIV16; }
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else if (wanted_div <= 64) { return RCC_SYSCLK_DIV64; }
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else if (wanted_div <= 128) { return RCC_SYSCLK_DIV128; }
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else if (wanted_div <= 256) { return RCC_SYSCLK_DIV256; }
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else { return RCC_SYSCLK_DIV512; }
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}
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STATIC mp_uint_t machine_freq_calc_apb_div(mp_uint_t wanted_div) {
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if (wanted_div <= 1) { return RCC_HCLK_DIV1; }
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else if (wanted_div <= 2) { return RCC_HCLK_DIV2; }
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else if (wanted_div <= 4) { return RCC_HCLK_DIV4; }
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else if (wanted_div <= 8) { return RCC_HCLK_DIV8; }
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else { return RCC_SYSCLK_DIV16; }
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}
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STATIC mp_obj_t machine_freq(mp_uint_t n_args, const mp_obj_t *args) {
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if (n_args == 0) {
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// get
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mp_obj_t tuple[4] = {
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mp_obj_new_int(HAL_RCC_GetSysClockFreq()),
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mp_obj_new_int(HAL_RCC_GetHCLKFreq()),
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mp_obj_new_int(HAL_RCC_GetPCLK1Freq()),
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mp_obj_new_int(HAL_RCC_GetPCLK2Freq()),
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};
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return mp_obj_new_tuple(4, tuple);
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} else {
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// set
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mp_int_t wanted_sysclk = mp_obj_get_int(args[0]) / 1000000;
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#if defined(MCU_SERIES_L4)
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nlr_raise(mp_obj_new_exception_msg(&mp_type_NotImplementedError, "machine.freq set not supported yet"));
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#endif
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// default PLL parameters that give 48MHz on PLL48CK
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uint32_t m = HSE_VALUE / 1000000, n = 336, p = 2, q = 7;
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uint32_t sysclk_source;
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// the following logic assumes HSE < HSI
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if (HSE_VALUE / 1000000 <= wanted_sysclk && wanted_sysclk < HSI_VALUE / 1000000) {
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// use HSE as SYSCLK
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sysclk_source = RCC_SYSCLKSOURCE_HSE;
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} else if (HSI_VALUE / 1000000 <= wanted_sysclk && wanted_sysclk < 24) {
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// use HSI as SYSCLK
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sysclk_source = RCC_SYSCLKSOURCE_HSI;
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} else {
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// search for a valid PLL configuration that keeps USB at 48MHz
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for (; wanted_sysclk > 0; wanted_sysclk--) {
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for (p = 2; p <= 8; p += 2) {
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// compute VCO_OUT
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mp_uint_t vco_out = wanted_sysclk * p;
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// make sure VCO_OUT is between 192MHz and 432MHz
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if (vco_out < 192 || vco_out > 432) {
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continue;
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}
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// make sure Q is an integer
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if (vco_out % 48 != 0) {
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continue;
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}
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// solve for Q to get PLL48CK at 48MHz
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q = vco_out / 48;
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// make sure Q is in range
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if (q < 2 || q > 15) {
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continue;
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}
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// make sure N/M is an integer
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if (vco_out % (HSE_VALUE / 1000000) != 0) {
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continue;
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}
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// solve for N/M
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mp_uint_t n_by_m = vco_out / (HSE_VALUE / 1000000);
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// solve for M, making sure VCO_IN (=HSE/M) is between 1MHz and 2MHz
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m = 192 / n_by_m;
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while (m < (HSE_VALUE / 2000000) || n_by_m * m < 192) {
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m += 1;
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}
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if (m > (HSE_VALUE / 1000000)) {
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continue;
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}
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// solve for N
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n = n_by_m * m;
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// make sure N is in range
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if (n < 192 || n > 432) {
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continue;
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}
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// found values!
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sysclk_source = RCC_SYSCLKSOURCE_PLLCLK;
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goto set_clk;
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}
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}
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nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, "can't make valid freq"));
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}
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set_clk:
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//printf("%lu %lu %lu %lu %lu\n", sysclk_source, m, n, p, q);
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// let the USB CDC have a chance to process before we change the clock
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HAL_Delay(5);
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// desired system clock source is in sysclk_source
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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if (sysclk_source == RCC_SYSCLKSOURCE_PLLCLK) {
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// set HSE as system clock source to allow modification of the PLL configuration
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// we then change to PLL after re-configuring PLL
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
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} else {
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// directly set the system clock source as desired
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RCC_ClkInitStruct.SYSCLKSource = sysclk_source;
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}
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wanted_sysclk *= 1000000;
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if (n_args >= 2) {
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// note: AHB freq required to be >= 14.2MHz for USB operation
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RCC_ClkInitStruct.AHBCLKDivider = machine_freq_calc_ahb_div(wanted_sysclk / mp_obj_get_int(args[1]));
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} else {
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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}
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if (n_args >= 3) {
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RCC_ClkInitStruct.APB1CLKDivider = machine_freq_calc_apb_div(wanted_sysclk / mp_obj_get_int(args[2]));
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} else {
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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}
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if (n_args >= 4) {
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RCC_ClkInitStruct.APB2CLKDivider = machine_freq_calc_apb_div(wanted_sysclk / mp_obj_get_int(args[3]));
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} else {
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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}
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#if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ
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uint32_t h = RCC_ClkInitStruct.AHBCLKDivider >> 4;
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uint32_t b1 = RCC_ClkInitStruct.APB1CLKDivider >> 10;
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uint32_t b2 = RCC_ClkInitStruct.APB2CLKDivider >> 10;
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#endif
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
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goto fail;
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}
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// re-configure PLL
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// even if we don't use the PLL for the system clock, we still need it for USB, RNG and SDIO
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = m;
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RCC_OscInitStruct.PLL.PLLN = n;
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RCC_OscInitStruct.PLL.PLLP = p;
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RCC_OscInitStruct.PLL.PLLQ = q;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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goto fail;
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}
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// set PLL as system clock source if wanted
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if (sysclk_source == RCC_SYSCLKSOURCE_PLLCLK) {
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#if !defined(MICROPY_HW_FLASH_LATENCY)
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#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_5
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#endif
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, MICROPY_HW_FLASH_LATENCY) != HAL_OK) {
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goto fail;
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}
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}
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#if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ
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#if defined(MCU_SERIES_F7)
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#define FREQ_BKP BKP31R
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#else
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#define FREQ_BKP BKP19R
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#endif
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// qqqqqqqq pppppppp nnnnnnnn nnmmmmmm
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// qqqqQQQQ ppppppPP nNNNNNNN NNMMMMMM
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// 222111HH HHQQQQPP nNNNNNNN NNMMMMMM
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p = (p / 2) - 1;
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RTC->FREQ_BKP = m
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| (n << 6) | (p << 16) | (q << 18)
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| (h << 22)
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| (b1 << 26)
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| (b2 << 29);
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#endif
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return mp_const_none;
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fail:;
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void NORETURN __fatal_error(const char *msg);
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__fatal_error("can't change freq");
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}
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}
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MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq);
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STATIC mp_obj_t machine_sleep(void) {
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#if defined(MCU_SERIES_L4)
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// Enter Stop 1 mode
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__HAL_RCC_WAKEUPSTOP_CLK_CONFIG(RCC_STOP_WAKEUPCLOCK_MSI);
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HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
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|
|
|
// reconfigure system clock after wakeup
|
|
// Enable Power Control clock
|
|
__HAL_RCC_PWR_CLK_ENABLE();
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|
|
|
// Get the Oscillators configuration according to the internal RCC registers
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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|
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
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|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
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|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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|
HAL_RCC_OscConfig(&RCC_OscInitStruct);
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|
|
|
// Get the Clocks configuration according to the internal RCC registers
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
uint32_t pFLatency = 0;
|
|
HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &pFLatency);
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|
|
|
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clock dividers
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, pFLatency);
|
|
|
|
#else
|
|
|
|
// takes longer to wake but reduces stop current
|
|
HAL_PWREx_EnableFlashPowerDown();
|
|
|
|
HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
|
|
|
|
// reconfigure the system clock after waking up
|
|
|
|
// enable HSE
|
|
__HAL_RCC_HSE_CONFIG(RCC_HSE_ON);
|
|
while (!__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY)) {
|
|
}
|
|
|
|
// enable PLL
|
|
__HAL_RCC_PLL_ENABLE();
|
|
while (!__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)) {
|
|
}
|
|
|
|
// select PLL as system clock source
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_SYSCLKSOURCE_PLLCLK);
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) {
|
|
}
|
|
|
|
#endif
|
|
|
|
return mp_const_none;
|
|
}
|
|
MP_DEFINE_CONST_FUN_OBJ_0(machine_sleep_obj, machine_sleep);
|
|
|
|
STATIC mp_obj_t machine_deepsleep(void) {
|
|
rtc_init_finalise();
|
|
|
|
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4)
|
|
printf("machine.deepsleep not supported yet\n");
|
|
#else
|
|
// We need to clear the PWR wake-up-flag before entering standby, since
|
|
// the flag may have been set by a previous wake-up event. Furthermore,
|
|
// we need to disable the wake-up sources while clearing this flag, so
|
|
// that if a source is active it does actually wake the device.
|
|
// See section 5.3.7 of RM0090.
|
|
|
|
// Note: we only support RTC ALRA, ALRB, WUT and TS.
|
|
// TODO support TAMP and WKUP (PA0 external pin).
|
|
uint32_t irq_bits = RTC_CR_ALRAIE | RTC_CR_ALRBIE | RTC_CR_WUTIE | RTC_CR_TSIE;
|
|
|
|
// save RTC interrupts
|
|
uint32_t save_irq_bits = RTC->CR & irq_bits;
|
|
|
|
// disable RTC interrupts
|
|
RTC->CR &= ~irq_bits;
|
|
|
|
// clear RTC wake-up flags
|
|
RTC->ISR &= ~(RTC_ISR_ALRAF | RTC_ISR_ALRBF | RTC_ISR_WUTF | RTC_ISR_TSF);
|
|
|
|
// clear global wake-up flag
|
|
PWR->CR |= PWR_CR_CWUF;
|
|
|
|
// enable previously-enabled RTC interrupts
|
|
RTC->CR |= save_irq_bits;
|
|
|
|
// enter standby mode
|
|
HAL_PWR_EnterSTANDBYMode();
|
|
// we never return; MCU is reset on exit from standby
|
|
#endif
|
|
return mp_const_none;
|
|
}
|
|
MP_DEFINE_CONST_FUN_OBJ_0(machine_deepsleep_obj, machine_deepsleep);
|
|
|
|
STATIC mp_obj_t machine_reset_cause(void) {
|
|
return MP_OBJ_NEW_SMALL_INT(reset_cause);
|
|
}
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
|
|
|
|
STATIC const mp_map_elem_t machine_module_globals_table[] = {
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR___name__), MP_OBJ_NEW_QSTR(MP_QSTR_umachine) },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_info), (mp_obj_t)&machine_info_obj },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_unique_id), (mp_obj_t)&machine_unique_id_obj },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_reset), (mp_obj_t)&machine_reset_obj },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_soft_reset), (mp_obj_t)&machine_soft_reset_obj },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_bootloader), (mp_obj_t)&machine_bootloader_obj },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_freq), (mp_obj_t)&machine_freq_obj },
|
|
#if MICROPY_HW_ENABLE_RNG
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_rng), (mp_obj_t)&pyb_rng_get_obj },
|
|
#endif
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_idle), (mp_obj_t)&pyb_wfi_obj },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_sleep), (mp_obj_t)&machine_sleep_obj },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_deepsleep), (mp_obj_t)&machine_deepsleep_obj },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_reset_cause), (mp_obj_t)&machine_reset_cause_obj },
|
|
#if 0
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_wake_reason), (mp_obj_t)&machine_wake_reason_obj },
|
|
#endif
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_disable_irq), (mp_obj_t)&pyb_disable_irq_obj },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_enable_irq), (mp_obj_t)&pyb_enable_irq_obj },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_time_pulse_us), (mp_obj_t)&machine_time_pulse_us_obj },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_mem8), (mp_obj_t)&machine_mem8_obj },
|
|
{ MP_ROM_QSTR(MP_QSTR_mem16), (mp_obj_t)&machine_mem16_obj },
|
|
{ MP_ROM_QSTR(MP_QSTR_mem32), (mp_obj_t)&machine_mem32_obj },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_Pin), (mp_obj_t)&pin_type },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_Signal), (mp_obj_t)&machine_signal_type },
|
|
|
|
#if 0
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_RTC), (mp_obj_t)&pyb_rtc_type },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_ADC), (mp_obj_t)&pyb_adc_type },
|
|
#endif
|
|
// TODO: Per new API, I2C types below, if called with 1 arg (ID), should still
|
|
// initialize master mode on the peripheral.
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_I2C), (mp_obj_t)&machine_i2c_type },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_SPI), (mp_obj_t)&machine_hard_spi_type },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_WDT), (mp_obj_t)&pyb_wdt_type },
|
|
#if 0
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_UART), (mp_obj_t)&pyb_uart_type },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_Timer), (mp_obj_t)&pyb_timer_type },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_HeartBeat), (mp_obj_t)&pyb_heartbeat_type },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD), (mp_obj_t)&pyb_sd_type },
|
|
|
|
// class constants
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_IDLE), MP_OBJ_NEW_SMALL_INT(PYB_PWR_MODE_ACTIVE) },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_SLEEP), MP_OBJ_NEW_SMALL_INT(PYB_PWR_MODE_LPDS) },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_DEEPSLEEP), MP_OBJ_NEW_SMALL_INT(PYB_PWR_MODE_HIBERNATE) },
|
|
#endif
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_PWRON_RESET), MP_OBJ_NEW_SMALL_INT(PYB_RESET_POWER_ON) },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_HARD_RESET), MP_OBJ_NEW_SMALL_INT(PYB_RESET_HARD) },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_WDT_RESET), MP_OBJ_NEW_SMALL_INT(PYB_RESET_WDT) },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_OBJ_NEW_SMALL_INT(PYB_RESET_DEEPSLEEP) },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_SOFT_RESET), MP_OBJ_NEW_SMALL_INT(PYB_RESET_SOFT) },
|
|
#if 0
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_WLAN_WAKE), MP_OBJ_NEW_SMALL_INT(PYB_SLP_WAKED_BY_WLAN) },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_PIN_WAKE), MP_OBJ_NEW_SMALL_INT(PYB_SLP_WAKED_BY_GPIO) },
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_RTC_WAKE), MP_OBJ_NEW_SMALL_INT(PYB_SLP_WAKED_BY_RTC) },
|
|
#endif
|
|
};
|
|
|
|
STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
|
|
|
|
const mp_obj_module_t machine_module = {
|
|
.base = { &mp_type_module },
|
|
.globals = (mp_obj_dict_t*)&machine_module_globals,
|
|
};
|
|
|