These classes are base on the Quadrature Encoder blocks
of the i.MXRT MCUs. The i.MXRT 102x has two encoders, the
other ones four. The i.MXRT 101x does not support this
function. It is implemented as two classes, Encoder and Counter.
The number of pins that can be uses as inputs is limited by
the MCU architecture and the board schematics. The Encoder
class supports:
- Defining the module
- Defining the input pins.
- Defining a pin for an index signal.
- Defining a pin for a Home signal.
- Defining an output pin showing the compare match signal.
- Setting the number of cycles per revolution.
- Setting the initial value for the position.
- Setting the counting direction.
- Setting a glitch filter.
- Setting the value counter as signed or unsigned integers.
- Defining callbacks for getting to a specific position,
overrun and underrun (starting the next revolution). These
callbacks can be hard interrupts to ensure short latency.
The encoder counts all phases of a cycle. The span
for the position is 2**32, for the revolution is 2**16. The
highest input frequency is CPU-Clock/24.
The Counter mode counts single pulses on input A of the Encoder.
The configuration support:
- Defining the module
- Defining the input pin.
- Defining the counting direction, either fixed or controlled
by the level of an input pin.
- Defining a pin for an index signal.
- Defining an ouput pin showing th compare match signal.
- Setting the counter value.
- Setting the glitch filter.
- Returing the value counter as signed or unsigned integer.
- Defining a callback which is called at a certain value.
The counting range is 0 - 2**32-1 and a 16 bit overrun counter.
The highest input frequency is CPU-Clock/12.
Signed-off-by: robert-hh <robert@hammelrath.com>
robert-hh