Wykres commitów

3 Commity (4a1ae99ac384878ffaddb30e9f8139f7b07aabae)

Autor SHA1 Wiadomość Data
robert-hh c5dbbf71c0 mimxrt: Use -Og instead of -O0 for DEBUG builds.
Thanks for the hint, Damien. The DEBUG build got very large recently.
The major difference is, that inline function are now inlined and
not included as a function. That's good and maybe bad. The good thing is,
that the code speed si now close to the final code. It could be worse
in single step debugging. I'll see.

Setting this option caused a new warning and a formatting error
to pop up at different places. Fixed as well.
2021-12-14 08:07:52 +01:00
robert-hh 1e9eaa7af5 mimxrt: Add a driver for the DP83848 PHY device.
Just another choice for the PHY interface.

Added: Keyword option phy_clock=LAN.IN or LAN.OUT
to define the source of the 50MHZ clock for the PHY
interface. The RMII clock is not enabled if it
is generated by a PYH board. Constants:

LAN.IN  The clock is provided by the PHY board.
LAN.OUT The clock is provided by the MCU board.

The default is LAN.OUT or the value set in mpconfigboard.h, which
is currently set to IN only for the SEEED ARCH MIX board. Usage etc:

lan = LAN(phy_type=LAN.PHY_DP83848, phy_clock=LAN.IN)
2021-12-14 08:07:52 +01:00
robert-hh 1866ed7e2e mimxrt/eth: Add LAN support and integrate the network module.
This commit implements 10/100 Mbit Ethernet support in the mimxrt port.

The following boards are configured without ETH network:
- MIMXRT1010_EVK
- Teensy 4.0

The following boards are configured with ETH network:
- MIMXRT1020_EVK
- MIMXRT1050_EVK
- MIMXRT1060_EVK
- MIMXRT1064_EVK
- Teensy 4.1

Ethernet support tested with TEENSY 4.1, MIMRTX1020_EVK and MIMXRT1050_EVK.
Build tested with Teensy 4.0 and MIMXRT1010_EVK to be still working.
Compiles and builds properly for MIMXRT1060_EVK and MIMXRT1064_EVK, but not
tested lacking suitable boards.

Tested functions are:
- ping works bothway
- simple UDP transfer works bothway
- ntptime works
- the ftp server works
- secure socker works
- telnet and webrepl works

The MAC address is 0x02 plus 5 bytes from the manifacturing info field,
which can be considered as unique per device.

Some boards do not wire the RESET and INT pin of the PHY transceiver.  For
operation, these are not required.  If they are defined, they will be used.
2021-10-25 15:14:26 +11:00