micropython

Autor	SHA1	Wiadomość	Data
robert-hh	3625388d8c	samd/samd_isr: Change the way a Sercom ISR is registered and called. Code size diff: +12 Bytes BSS diff: -12 Bytes RAM usage: +16 Bytes Speed increase: a few clock cycles per call Style improvement: ++	2022-10-06 22:52:10 +11:00
robert-hh	b4d29fd47a	samd/clock_config: Set up the clock configuration. Clock settings: - GCLK0: 48 MHz (SAMD21) or 120 MHz(SAMD51). - GCLK1: 32768 Hz for driving the PLL. - GCLK2: 48 MHz for tzhe peripheral clock. - GCLK3: 1 MHz (SAMD21) or 8 MHz (SAMD51) for the µs ticks timer. - GCLK8: 1 kHz for WDT (SAMD21 only). If a 32 kHz crystal is present, it will be used as clock source. Otherwise the DFLL48M in open-loop mode is used. GCLK0 for SAM51 can be changed between 48 MHz and 200 MHz. The specified range is 96 MHz - 120 MHz.	2022-10-06 22:33:31 +11:00
Peter van der Burg	4c132614e1	samd/samd_soc: Allow a board to configure the low-level MCU config. The board specific #defines will be moved to individual boards.	2021-11-19 11:42:47 +11:00
Damien George	5f9bd11527	samd: Add new port to Microchip SAMDxx microcontrollers. Initially supporting SAMD21 and SAMD51.	2019-07-01 17:19:18 +10:00