kopia lustrzana https://github.com/micropython/micropython
py: Add inline Xtensa assembler.
This patch adds the MICROPY_EMIT_INLINE_XTENSA option, which, when
enabled, allows the @micropython.asm_xtensa decorator to be used.
The following opcodes are currently supported (ax is a register, a0-a15):
ret_n()
callx0(ax)
j(label)
jx(ax)
beqz(ax, label)
bnez(ax, label)
mov(ax, ay)
movi(ax, imm) # imm can be full 32-bit, uses l32r if needed
and_(ax, ay, az)
or_(ax, ay, az)
xor(ax, ay, az)
add(ax, ay, az)
sub(ax, ay, az)
mull(ax, ay, az)
l8ui(ax, ay, imm)
l16ui(ax, ay, imm)
l32i(ax, ay, imm)
s8i(ax, ay, imm)
s16i(ax, ay, imm)
s32i(ax, ay, imm)
l16si(ax, ay, imm)
addi(ax, ay, imm)
ball(ax, ay, label)
bany(ax, ay, label)
bbc(ax, ay, label)
bbs(ax, ay, label)
beq(ax, ay, label)
bge(ax, ay, label)
bgeu(ax, ay, label)
blt(ax, ay, label)
bnall(ax, ay, label)
bne(ax, ay, label)
bnone(ax, ay, label)
Upon entry to the assembly function the registers a0, a12, a13, a14 are
pushed to the stack and the stack pointer (a1) decreased by 16. Upon
exit, these registers and the stack pointer are restored, and ret.n is
executed to return to the caller (caller address is in a0).
Note that the ABI for the Xtensa emitters is non-windowing.
pull/2675/head
Damien George
rodzic
ad297a1950
commit
f76b1bfa9f
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@ -30,7 +30,7 @@
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#include "py/mpconfig.h"
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// wrapper around everything in this file
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#if MICROPY_EMIT_XTENSA
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#if MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA
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#include "py/asmxtensa.h"
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@ -167,4 +167,4 @@ void asm_xtensa_mov_reg_local_addr(asm_xtensa_t *as, uint reg_dest, int local_nu
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asm_xtensa_op_addi(as, reg_dest, reg_dest, (4 + local_num) * WORD_SIZE);
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}
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#endif // MICROPY_EMIT_XTENSA
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#endif // MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA
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@ -91,6 +91,9 @@ typedef enum {
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#if MICROPY_EMIT_INLINE_THUMB
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#define ASM_DECORATOR_QSTR MP_QSTR_asm_thumb
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#define ASM_EMITTER(f) emit_inline_thumb_##f
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#elif MICROPY_EMIT_INLINE_XTENSA
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#define ASM_DECORATOR_QSTR MP_QSTR_asm_xtensa
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#define ASM_EMITTER(f) emit_inline_xtensa_##f
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#else
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#error "unknown asm emitter"
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#endif
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@ -272,9 +272,13 @@ typedef struct _emit_inline_asm_method_table_t {
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} emit_inline_asm_method_table_t;
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extern const emit_inline_asm_method_table_t emit_inline_thumb_method_table;
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extern const emit_inline_asm_method_table_t emit_inline_xtensa_method_table;
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emit_inline_asm_t *emit_inline_thumb_new(mp_uint_t max_num_labels);
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emit_inline_asm_t *emit_inline_xtensa_new(mp_uint_t max_num_labels);
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void emit_inline_thumb_free(emit_inline_asm_t *emit);
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void emit_inline_xtensa_free(emit_inline_asm_t *emit);
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#if MICROPY_WARNINGS
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void mp_emitter_warning(pass_kind_t pass, const char *msg);
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@ -0,0 +1,364 @@
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013-2016 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdarg.h>
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#include <assert.h>
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#include "py/emit.h"
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#include "py/asmxtensa.h"
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#if MICROPY_EMIT_INLINE_XTENSA
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struct _emit_inline_asm_t {
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uint16_t pass;
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scope_t *scope;
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mp_obj_t *error_slot;
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mp_uint_t max_num_labels;
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qstr *label_lookup;
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asm_xtensa_t *as;
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};
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STATIC void emit_inline_xtensa_error_msg(emit_inline_asm_t *emit, const char *msg) {
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*emit->error_slot = mp_obj_new_exception_msg(&mp_type_SyntaxError, msg);
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}
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STATIC void emit_inline_xtensa_error_exc(emit_inline_asm_t *emit, mp_obj_t exc) {
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*emit->error_slot = exc;
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}
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emit_inline_asm_t *emit_inline_xtensa_new(mp_uint_t max_num_labels) {
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emit_inline_asm_t *emit = m_new_obj(emit_inline_asm_t);
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emit->max_num_labels = max_num_labels;
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emit->label_lookup = m_new(qstr, max_num_labels);
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emit->as = m_new0(asm_xtensa_t, 1);
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mp_asm_base_init(&emit->as->base, max_num_labels);
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return emit;
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}
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void emit_inline_xtensa_free(emit_inline_asm_t *emit) {
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m_del(qstr, emit->label_lookup, emit->max_num_labels);
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mp_asm_base_deinit(&emit->as->base, false);
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m_del_obj(asm_xtensa_t, emit->as);
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m_del_obj(emit_inline_asm_t, emit);
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}
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STATIC void emit_inline_xtensa_start_pass(emit_inline_asm_t *emit, pass_kind_t pass, scope_t *scope, mp_obj_t *error_slot) {
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emit->pass = pass;
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emit->scope = scope;
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emit->error_slot = error_slot;
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if (emit->pass == MP_PASS_CODE_SIZE) {
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memset(emit->label_lookup, 0, emit->max_num_labels * sizeof(qstr));
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}
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mp_asm_base_start_pass(&emit->as->base, pass == MP_PASS_EMIT ? MP_ASM_PASS_EMIT : MP_ASM_PASS_COMPUTE);
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asm_xtensa_entry(emit->as, 0);
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}
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STATIC void emit_inline_xtensa_end_pass(emit_inline_asm_t *emit, mp_uint_t type_sig) {
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asm_xtensa_exit(emit->as);
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asm_xtensa_end_pass(emit->as);
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if (emit->pass == MP_PASS_EMIT) {
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void *f = mp_asm_base_get_code(&emit->as->base);
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mp_emit_glue_assign_native(emit->scope->raw_code, MP_CODE_NATIVE_ASM, f,
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mp_asm_base_get_code_size(&emit->as->base), NULL, emit->scope->num_pos_args, 0, type_sig);
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}
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}
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STATIC mp_uint_t emit_inline_xtensa_count_params(emit_inline_asm_t *emit, mp_uint_t n_params, mp_parse_node_t *pn_params) {
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if (n_params > 4) {
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emit_inline_xtensa_error_msg(emit, "can only have up to 4 parameters to Xtensa assembly");
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return 0;
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}
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for (mp_uint_t i = 0; i < n_params; i++) {
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if (!MP_PARSE_NODE_IS_ID(pn_params[i])) {
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emit_inline_xtensa_error_msg(emit, "parameters must be registers in sequence a2 to a5");
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return 0;
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}
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const char *p = qstr_str(MP_PARSE_NODE_LEAF_ARG(pn_params[i]));
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if (!(strlen(p) == 2 && p[0] == 'a' && p[1] == '2' + i)) {
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emit_inline_xtensa_error_msg(emit, "parameters must be registers in sequence a2 to a5");
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return 0;
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}
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}
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return n_params;
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}
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STATIC bool emit_inline_xtensa_label(emit_inline_asm_t *emit, mp_uint_t label_num, qstr label_id) {
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assert(label_num < emit->max_num_labels);
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if (emit->pass == MP_PASS_CODE_SIZE) {
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// check for duplicate label on first pass
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for (uint i = 0; i < emit->max_num_labels; i++) {
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if (emit->label_lookup[i] == label_id) {
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return false;
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}
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}
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}
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emit->label_lookup[label_num] = label_id;
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mp_asm_base_label_assign(&emit->as->base, label_num);
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return true;
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}
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STATIC void emit_inline_xtensa_align(emit_inline_asm_t *emit, mp_uint_t align) {
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mp_asm_base_align(&emit->as->base, align);
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}
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STATIC void emit_inline_xtensa_data(emit_inline_asm_t *emit, mp_uint_t bytesize, mp_uint_t val) {
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mp_asm_base_data(&emit->as->base, bytesize, val);
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}
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typedef struct _reg_name_t { byte reg; byte name[3]; } reg_name_t;
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STATIC const reg_name_t reg_name_table[] = {
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{0, "a0\0"},
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{1, "a1\0"},
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{2, "a2\0"},
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{3, "a3\0"},
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{4, "a4\0"},
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{5, "a5\0"},
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{6, "a6\0"},
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{7, "a7\0"},
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{8, "a8\0"},
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{9, "a9\0"},
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{10, "a10"},
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{11, "a11"},
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{12, "a12"},
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{13, "a13"},
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{14, "a14"},
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{15, "a15"},
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};
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// return empty string in case of error, so we can attempt to parse the string
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// without a special check if it was in fact a string
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STATIC const char *get_arg_str(mp_parse_node_t pn) {
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if (MP_PARSE_NODE_IS_ID(pn)) {
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qstr qst = MP_PARSE_NODE_LEAF_ARG(pn);
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return qstr_str(qst);
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} else {
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return "";
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}
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}
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STATIC mp_uint_t get_arg_reg(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
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const char *reg_str = get_arg_str(pn);
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for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(reg_name_table); i++) {
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const reg_name_t *r = ®_name_table[i];
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if (reg_str[0] == r->name[0]
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&& reg_str[1] == r->name[1]
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&& reg_str[2] == r->name[2]
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&& (reg_str[2] == '\0' || reg_str[3] == '\0')) {
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return r->reg;
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}
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}
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emit_inline_xtensa_error_exc(emit,
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mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
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"'%s' expects a register", op));
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return 0;
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}
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STATIC uint32_t get_arg_i(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn, int min, int max) {
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mp_obj_t o;
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if (!mp_parse_node_get_int_maybe(pn, &o)) {
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emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' expects an integer", op));
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return 0;
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}
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uint32_t i = mp_obj_get_int_truncated(o);
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if (min != max && ((int)i < min || (int)i > max)) {
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emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' integer %d is not within range %d..%d", op, i, min, max));
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return 0;
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}
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return i;
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}
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STATIC int get_arg_label(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
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if (!MP_PARSE_NODE_IS_ID(pn)) {
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emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' expects a label", op));
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return 0;
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}
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qstr label_qstr = MP_PARSE_NODE_LEAF_ARG(pn);
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for (uint i = 0; i < emit->max_num_labels; i++) {
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if (emit->label_lookup[i] == label_qstr) {
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return i;
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}
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}
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// only need to have the labels on the last pass
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if (emit->pass == MP_PASS_EMIT) {
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emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "label '%q' not defined", label_qstr));
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}
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return 0;
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}
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#define RRR (0)
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#define RRI8 (1)
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#define RRI8_B (2)
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typedef struct _opcode_table_3arg_t {
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uint16_t name; // actually a qstr, which should fit in 16 bits
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uint8_t type;
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uint8_t a0 : 4;
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uint8_t a1 : 4;
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} opcode_table_3arg_t;
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STATIC const opcode_table_3arg_t opcode_table_3arg[] = {
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// arithmetic opcodes: reg, reg, reg
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{MP_QSTR_and_, RRR, 0, 1},
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{MP_QSTR_or_, RRR, 0, 2},
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{MP_QSTR_xor, RRR, 0, 3},
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{MP_QSTR_add, RRR, 0, 8},
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{MP_QSTR_sub, RRR, 0, 12},
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{MP_QSTR_mull, RRR, 2, 8},
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// load/store/addi opcodes: reg, reg, imm
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// upper nibble of type encodes the range of the immediate arg
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{MP_QSTR_l8ui, RRI8 | 0x10, 2, 0},
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{MP_QSTR_l16ui, RRI8 | 0x30, 2, 1},
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{MP_QSTR_l32i, RRI8 | 0x50, 2, 2},
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{MP_QSTR_s8i, RRI8 | 0x10, 2, 4},
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{MP_QSTR_s16i, RRI8 | 0x30, 2, 5},
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{MP_QSTR_s32i, RRI8 | 0x50, 2, 6},
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{MP_QSTR_l16si, RRI8 | 0x30, 2, 9},
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{MP_QSTR_addi, RRI8 | 0x00, 2, 12},
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// branch opcodes: reg, reg, label
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{MP_QSTR_ball, RRI8_B, ASM_XTENSA_CC_ALL, 0},
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{MP_QSTR_bany, RRI8_B, ASM_XTENSA_CC_ANY, 0},
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{MP_QSTR_bbc, RRI8_B, ASM_XTENSA_CC_BC, 0},
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{MP_QSTR_bbs, RRI8_B, ASM_XTENSA_CC_BS, 0},
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{MP_QSTR_beq, RRI8_B, ASM_XTENSA_CC_EQ, 0},
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{MP_QSTR_bge, RRI8_B, ASM_XTENSA_CC_GE, 0},
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{MP_QSTR_bgeu, RRI8_B, ASM_XTENSA_CC_GEU, 0},
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{MP_QSTR_blt, RRI8_B, ASM_XTENSA_CC_LT, 0},
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{MP_QSTR_bnall, RRI8_B, ASM_XTENSA_CC_NALL, 0},
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{MP_QSTR_bne, RRI8_B, ASM_XTENSA_CC_NE, 0},
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{MP_QSTR_bnone, RRI8_B, ASM_XTENSA_CC_NONE, 0},
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};
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STATIC void emit_inline_xtensa_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_args, mp_parse_node_t *pn_args) {
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size_t op_len;
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const char *op_str = (const char*)qstr_data(op, &op_len);
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if (n_args == 0) {
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if (op == MP_QSTR_ret_n) {
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asm_xtensa_op_ret_n(emit->as);
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} else {
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goto unknown_op;
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}
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} else if (n_args == 1) {
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if (op == MP_QSTR_callx0) {
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uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
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asm_xtensa_op_callx0(emit->as, r0);
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} else if (op == MP_QSTR_j) {
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int label = get_arg_label(emit, op_str, pn_args[0]);
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asm_xtensa_j_label(emit->as, label);
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} else if (op == MP_QSTR_jx) {
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uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
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asm_xtensa_op_jx(emit->as, r0);
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} else {
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goto unknown_op;
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}
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} else if (n_args == 2) {
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uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
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if (op == MP_QSTR_beqz) {
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int label = get_arg_label(emit, op_str, pn_args[1]);
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asm_xtensa_bccz_reg_label(emit->as, ASM_XTENSA_CCZ_EQ, r0, label);
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} else if (op == MP_QSTR_bnez) {
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int label = get_arg_label(emit, op_str, pn_args[1]);
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asm_xtensa_bccz_reg_label(emit->as, ASM_XTENSA_CCZ_NE, r0, label);
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} else if (op == MP_QSTR_mov || op == MP_QSTR_mov_n) {
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// we emit mov.n for both "mov" and "mov_n" opcodes
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uint r1 = get_arg_reg(emit, op_str, pn_args[1]);
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asm_xtensa_op_mov_n(emit->as, r0, r1);
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} else if (op == MP_QSTR_movi) {
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// for convenience we emit l32r if the integer doesn't fit in movi
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uint32_t imm = get_arg_i(emit, op_str, pn_args[1], 0, 0);
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asm_xtensa_mov_reg_i32(emit->as, r0, imm);
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} else {
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goto unknown_op;
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}
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} else if (n_args == 3) {
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// search table for 3 arg instructions
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for (uint i = 0; i < MP_ARRAY_SIZE(opcode_table_3arg); i++) {
|
||||
const opcode_table_3arg_t *o = &opcode_table_3arg[i];
|
||||
if (op == o->name) {
|
||||
uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
||||
uint r1 = get_arg_reg(emit, op_str, pn_args[1]);
|
||||
if (o->type == RRR) {
|
||||
uint r2 = get_arg_reg(emit, op_str, pn_args[2]);
|
||||
asm_xtensa_op24(emit->as, ASM_XTENSA_ENCODE_RRR(0, o->a0, o->a1, r0, r1, r2));
|
||||
} else if (o->type == RRI8_B) {
|
||||
int label = get_arg_label(emit, op_str, pn_args[2]);
|
||||
asm_xtensa_bcc_reg_reg_label(emit->as, o->a0, r0, r1, label);
|
||||
} else {
|
||||
int shift, min, max;
|
||||
if ((o->type & 0xf0) == 0) {
|
||||
shift = 0;
|
||||
min = -128;
|
||||
max = 127;
|
||||
} else {
|
||||
shift = (o->type & 0xf0) >> 5;
|
||||
min = 0;
|
||||
max = 0xff << shift;
|
||||
}
|
||||
uint32_t imm = get_arg_i(emit, op_str, pn_args[2], min, max);
|
||||
asm_xtensa_op24(emit->as, ASM_XTENSA_ENCODE_RRI8(o->a0, o->a1, r1, r0, (imm >> shift) & 0xff));
|
||||
}
|
||||
return;
|
||||
}
|
||||
}
|
||||
goto unknown_op;
|
||||
|
||||
} else {
|
||||
goto unknown_op;
|
||||
}
|
||||
|
||||
return;
|
||||
|
||||
unknown_op:
|
||||
emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "unsupported Xtensa instruction '%s' with %d arguments", op_str, n_args));
|
||||
return;
|
||||
|
||||
/*
|
||||
branch_not_in_range:
|
||||
emit_inline_xtensa_error_msg(emit, "branch not in range");
|
||||
return;
|
||||
*/
|
||||
}
|
||||
|
||||
const emit_inline_asm_method_table_t emit_inline_xtensa_method_table = {
|
||||
emit_inline_xtensa_start_pass,
|
||||
emit_inline_xtensa_end_pass,
|
||||
emit_inline_xtensa_count_params,
|
||||
emit_inline_xtensa_label,
|
||||
emit_inline_xtensa_align,
|
||||
emit_inline_xtensa_data,
|
||||
emit_inline_xtensa_op,
|
||||
};
|
||||
|
||||
#endif // MICROPY_EMIT_INLINE_XTENSA
|
||||
|
|
@ -293,11 +293,16 @@
|
|||
#define MICROPY_EMIT_XTENSA (0)
|
||||
#endif
|
||||
|
||||
// Whether to enable the Xtensa inline assembler
|
||||
#ifndef MICROPY_EMIT_INLINE_XTENSA
|
||||
#define MICROPY_EMIT_INLINE_XTENSA (0)
|
||||
#endif
|
||||
|
||||
// Convenience definition for whether any native emitter is enabled
|
||||
#define MICROPY_EMIT_NATIVE (MICROPY_EMIT_X64 || MICROPY_EMIT_X86 || MICROPY_EMIT_THUMB || MICROPY_EMIT_ARM || MICROPY_EMIT_XTENSA)
|
||||
|
||||
// Convenience definition for whether any inline assembler emitter is enabled
|
||||
#define MICROPY_EMIT_INLINE_ASM (MICROPY_EMIT_INLINE_THUMB)
|
||||
#define MICROPY_EMIT_INLINE_ASM (MICROPY_EMIT_INLINE_THUMB || MICROPY_EMIT_INLINE_XTENSA)
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Compiler configuration */
|
||||
|
|
|
|||
1
py/py.mk
1
py/py.mk
|
|
@ -132,6 +132,7 @@ PY_O_BASENAME = \
|
|||
emitnarm.o \
|
||||
asmxtensa.o \
|
||||
emitnxtensa.o \
|
||||
emitinlinextensa.o \
|
||||
formatfloat.o \
|
||||
parsenumbase.o \
|
||||
parsenum.o \
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue