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stm32: Use STM32xx macros instead of MCU_SERIES_xx to select MCU type. 

The CMSIS files for the STM32 range provide macros to distinguish between
the different MCU series: STM32F4, STM32F7, STM32H7, STM32L4, etc.  Prefer
to use these instead of custom ones.
pull/3663/head
Damien George 2018-03-17 10:42:50 +11:00
rodzic 5edce4539b
commit e37b8ba5a5
20 zmienionych plików z 130 dodań i 130 usunięć
Pokaż statystyki Ściągnij plik aktualizacji Ściągnij plik porównania Expand all files Collapse all files

6
ports/stm32/Makefile
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@ -61,9 +61,9 @@ CFLAGS_CORTEX_M += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
endif
# Options for particular MCU series
CFLAGS_MCU_f4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -DMCU_SERIES_F4
CFLAGS_MCU_f7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7 -DMCU_SERIES_F7
CFLAGS_MCU_l4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -DMCU_SERIES_L4
CFLAGS_MCU_f4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
CFLAGS_MCU_f7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7
CFLAGS_MCU_l4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
CFLAGS_MCU_h7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7
CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib $(CFLAGS_MOD) $(CFLAGS_EXTRA)

44
ports/stm32/adc.c
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@ -56,7 +56,7 @@
#define ADCx_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
#define ADC_NUM_CHANNELS (19)
#if defined(MCU_SERIES_F4)
#if defined(STM32F4)
#define ADC_FIRST_GPIO_CHANNEL (0)
#define ADC_LAST_GPIO_CHANNEL (15)
@ -64,7 +64,7 @@
#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2))
#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4))
#elif defined(MCU_SERIES_F7)
#elif defined(STM32F7)
#define ADC_FIRST_GPIO_CHANNEL (0)
#define ADC_LAST_GPIO_CHANNEL (15)
@ -78,7 +78,7 @@
#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2))
#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4))
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
#define ADC_FIRST_GPIO_CHANNEL (1)
#define ADC_LAST_GPIO_CHANNEL (16)
@ -127,7 +127,7 @@ typedef struct _pyb_obj_adc_t {
// convert user-facing channel number into internal channel number
static inline uint32_t adc_get_internal_channel(uint32_t channel) {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
// on F4 and F7 MCUs we want channel 16 to always be the TEMPSENSOR
// (on some MCUs ADC_CHANNEL_TEMPSENSOR=16, on others it doesn't)
if (channel == 16) {
@ -138,9 +138,9 @@ static inline uint32_t adc_get_internal_channel(uint32_t channel) {
}
STATIC bool is_adcx_channel(int channel) {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
return IS_ADC_CHANNEL(channel);
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
ADC_HandleTypeDef handle;
handle.Instance = ADCx;
return IS_ADC_CHANNEL(&handle, channel);
@ -151,9 +151,9 @@ STATIC bool is_adcx_channel(int channel) {
STATIC void adc_wait_for_eoc_or_timeout(int32_t timeout) {
uint32_t tickstart = HAL_GetTick();
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
while ((ADCx->SR & ADC_FLAG_EOC) != ADC_FLAG_EOC) {
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
while (READ_BIT(ADCx->ISR, ADC_FLAG_EOC) != ADC_FLAG_EOC) {
#else
#error Unsupported processor
@ -165,9 +165,9 @@ STATIC void adc_wait_for_eoc_or_timeout(int32_t timeout) {
}
STATIC void adcx_clock_enable(void) {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
ADCx_CLK_ENABLE();
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
__HAL_RCC_ADC_CLK_ENABLE();
#else
#error Unsupported processor
@ -186,9 +186,9 @@ STATIC void adc_init_single(pyb_obj_adc_t *adc_obj) {
mp_hal_gpio_clock_enable(pin->gpio);
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.Pin = pin->pin_mask;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
GPIO_InitStructure.Mode = GPIO_MODE_ANALOG;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
GPIO_InitStructure.Mode = GPIO_MODE_ANALOG_ADC_CONTROL;
#else
#error Unsupported processor
@ -209,12 +209,12 @@ STATIC void adc_init_single(pyb_obj_adc_t *adc_obj) {
adcHandle->Init.NbrOfConversion = 1;
adcHandle->Init.DMAContinuousRequests = DISABLE;
adcHandle->Init.Resolution = ADC_RESOLUTION_12B;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
adcHandle->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
adcHandle->Init.ScanConvMode = DISABLE;
adcHandle->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1;
adcHandle->Init.EOCSelection = DISABLE;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
adcHandle->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
adcHandle->Init.ScanConvMode = ADC_SCAN_DISABLE;
adcHandle->Init.EOCSelection = ADC_EOC_SINGLE_CONV;
@ -229,7 +229,7 @@ STATIC void adc_init_single(pyb_obj_adc_t *adc_obj) {
HAL_ADC_Init(adcHandle);
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
ADC_MultiModeTypeDef multimode;
multimode.Mode = ADC_MODE_INDEPENDENT;
if (HAL_ADCEx_MultiModeConfigChannel(adcHandle, &multimode) != HAL_OK)
@ -244,9 +244,9 @@ STATIC void adc_config_channel(ADC_HandleTypeDef *adc_handle, uint32_t channel)
sConfig.Channel = channel;
sConfig.Rank = 1;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
sConfig.SamplingTime = ADC_SAMPLETIME_15CYCLES;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
sConfig.SamplingTime = ADC_SAMPLETIME_12CYCLES_5;
sConfig.SingleDiff = ADC_SINGLE_ENDED;
sConfig.OffsetNumber = ADC_OFFSET_NONE;
@ -411,9 +411,9 @@ STATIC mp_obj_t adc_read_timed(mp_obj_t self_in, mp_obj_t buf_in, mp_obj_t freq_
HAL_ADC_Start(&self->handle);
} else {
// for subsequent samples we can just set the "start sample" bit
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
ADCx->CR2 |= (uint32_t)ADC_CR2_SWSTART;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
SET_BIT(ADCx->CR, ADC_CR_ADSTART);
#else
#error Unsupported processor
@ -513,11 +513,11 @@ void adc_init_all(pyb_adc_all_obj_t *adc_all, uint32_t resolution, uint32_t en_m
adcHandle->Init.NbrOfConversion = 1;
adcHandle->Init.DMAContinuousRequests = DISABLE;
adcHandle->Init.EOCSelection = DISABLE;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
adcHandle->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
adcHandle->Init.ScanConvMode = DISABLE;
adcHandle->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
adcHandle->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2;
adcHandle->Init.ScanConvMode = ADC_SCAN_DISABLE;
adcHandle->Init.ExternalTrigConv = ADC_EXTERNALTRIG_T1_CC1;
@ -578,7 +578,7 @@ float adc_read_core_vbat(ADC_HandleTypeDef *adcHandle) {
// be 12-bits.
raw_value <<= (12 - adc_get_resolution(adcHandle));
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
// ST docs say that (at least on STM32F42x and STM32F43x), VBATE must
// be disabled when TSVREFE is enabled for TEMPSENSOR and VREFINT
// conversions to work. VBATE is enabled by the above call to read

2
ports/stm32/boards/make-pins.py
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@ -305,7 +305,7 @@ class Pins(object):
print('const pin_obj_t * const pin_adc{:d}[] = {{'.format(adc_num))
for channel in range(17):
if channel == 16:
print('#if defined(MCU_SERIES_L4)')
print('#if defined(STM32L4)')
adc_found = False
for named_pin in self.cpu_pins:
pin = named_pin.pin()

4
ports/stm32/dac.c
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@ -159,9 +159,9 @@ STATIC mp_obj_t pyb_dac_init_helper(pyb_dac_obj_t *self, size_t n_args, const mp
HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
// DAC peripheral clock
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
__DAC_CLK_ENABLE();
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
__HAL_RCC_DAC1_CLK_ENABLE();
#else
#error Unsupported Processor

46
ports/stm32/dma.c
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@ -53,9 +53,9 @@ typedef enum {
} dma_id_t;
typedef struct _dma_descr_t {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
DMA_Stream_TypeDef *instance;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
DMA_Channel_TypeDef *instance;
#else
#error "Unsupported Processor"
@ -69,9 +69,9 @@ typedef struct _dma_descr_t {
// Default parameters to dma_init() shared by spi and i2c; Channel and Direction
// vary depending on the peripheral instance so they get passed separately
static const DMA_InitTypeDef dma_init_struct_spi_i2c = {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
.Channel = 0,
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
.Request = 0,
#endif
.Direction = 0,
@ -81,7 +81,7 @@ static const DMA_InitTypeDef dma_init_struct_spi_i2c = {
.MemDataAlignment = DMA_MDATAALIGN_BYTE,
.Mode = DMA_NORMAL,
.Priority = DMA_PRIORITY_LOW,
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
.FIFOMode = DMA_FIFOMODE_DISABLE,
.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL,
.MemBurst = DMA_MBURST_INC4,
@ -92,9 +92,9 @@ static const DMA_InitTypeDef dma_init_struct_spi_i2c = {
#if defined(MICROPY_HW_HAS_SDCARD) && MICROPY_HW_HAS_SDCARD
// Parameters to dma_init() for SDIO tx and rx.
static const DMA_InitTypeDef dma_init_struct_sdio = {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
.Channel = 0,
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
.Request = 0,
#endif
.Direction = 0,
@ -102,13 +102,13 @@ static const DMA_InitTypeDef dma_init_struct_sdio = {
.MemInc = DMA_MINC_ENABLE,
.PeriphDataAlignment = DMA_PDATAALIGN_WORD,
.MemDataAlignment = DMA_MDATAALIGN_WORD,
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
.Mode = DMA_PFCTRL,
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
.Mode = DMA_NORMAL,
#endif
.Priority = DMA_PRIORITY_VERY_HIGH,
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
.FIFOMode = DMA_FIFOMODE_ENABLE,
.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL,
.MemBurst = DMA_MBURST_INC4,
@ -120,9 +120,9 @@ static const DMA_InitTypeDef dma_init_struct_sdio = {
#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC
// Default parameters to dma_init() for DAC tx
static const DMA_InitTypeDef dma_init_struct_dac = {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
.Channel = 0,
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
.Request = 0,
#endif
.Direction = 0,
@ -132,7 +132,7 @@ static const DMA_InitTypeDef dma_init_struct_dac = {
.MemDataAlignment = DMA_MDATAALIGN_BYTE,
.Mode = DMA_NORMAL,
.Priority = DMA_PRIORITY_HIGH,
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
.FIFOMode = DMA_FIFOMODE_DISABLE,
.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL,
.MemBurst = DMA_MBURST_SINGLE,
@ -141,7 +141,7 @@ static const DMA_InitTypeDef dma_init_struct_dac = {
};
#endif
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
#define NCONTROLLERS (2)
#define NSTREAMS_PER_CONTROLLER (8)
@ -161,7 +161,7 @@ static const DMA_InitTypeDef dma_init_struct_dac = {
// DMA1 streams
const dma_descr_t dma_I2C_1_RX = { DMA1_Stream0, DMA_CHANNEL_1, DMA_PERIPH_TO_MEMORY, dma_id_0, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_3_RX = { DMA1_Stream2, DMA_CHANNEL_0, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c };
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
const dma_descr_t dma_I2C_4_RX = { DMA1_Stream2, DMA_CHANNEL_2, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c };
#endif
const dma_descr_t dma_I2C_3_RX = { DMA1_Stream2, DMA_CHANNEL_3, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c };
@ -169,7 +169,7 @@ const dma_descr_t dma_I2C_2_RX = { DMA1_Stream2, DMA_CHANNEL_7, DMA_PERIPH_TO_ME
const dma_descr_t dma_SPI_2_RX = { DMA1_Stream3, DMA_CHANNEL_0, DMA_PERIPH_TO_MEMORY, dma_id_3, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_2_TX = { DMA1_Stream4, DMA_CHANNEL_0, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c };
const dma_descr_t dma_I2C_3_TX = { DMA1_Stream4, DMA_CHANNEL_3, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c };
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
const dma_descr_t dma_I2C_4_TX = { DMA1_Stream5, DMA_CHANNEL_2, DMA_MEMORY_TO_PERIPH, dma_id_5, &dma_init_struct_spi_i2c };
#endif
#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC
@ -185,7 +185,7 @@ const dma_descr_t dma_I2C_1_TX = { DMA1_Stream6, DMA_CHANNEL_1, DMA_MEMORY_TO_PE
*/
// DMA2 streams
#if defined(MCU_SERIES_F7) && defined(SDMMC2) && MICROPY_HW_HAS_SDCARD
#if defined(STM32F7) && defined(SDMMC2) && MICROPY_HW_HAS_SDCARD
const dma_descr_t dma_SDMMC_2_RX= { DMA2_Stream0, DMA_CHANNEL_11, DMA_PERIPH_TO_MEMORY, dma_id_8, &dma_init_struct_sdio };
#endif
const dma_descr_t dma_SPI_1_RX = { DMA2_Stream2, DMA_CHANNEL_3, DMA_PERIPH_TO_MEMORY, dma_id_10, &dma_init_struct_spi_i2c };
@ -198,7 +198,7 @@ const dma_descr_t dma_SPI_5_TX = { DMA2_Stream4, DMA_CHANNEL_2, DMA_MEMORY_TO_PE
const dma_descr_t dma_SPI_4_TX = { DMA2_Stream4, DMA_CHANNEL_5, DMA_MEMORY_TO_PERIPH, dma_id_12, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_6_TX = { DMA2_Stream5, DMA_CHANNEL_1, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_spi_i2c };
const dma_descr_t dma_SPI_1_TX = { DMA2_Stream5, DMA_CHANNEL_3, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_spi_i2c };
#if defined(MCU_SERIES_F7) && defined(SDMMC2) && MICROPY_HW_HAS_SDCARD
#if defined(STM32F7) && defined(SDMMC2) && MICROPY_HW_HAS_SDCARD
const dma_descr_t dma_SDMMC_2_TX= { DMA2_Stream5, DMA_CHANNEL_11, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_sdio };
#endif
const dma_descr_t dma_SPI_6_RX = { DMA2_Stream6, DMA_CHANNEL_1, DMA_PERIPH_TO_MEMORY, dma_id_14, &dma_init_struct_spi_i2c };
@ -233,7 +233,7 @@ static const uint8_t dma_irqn[NSTREAM] = {
DMA2_Stream7_IRQn,
};
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
#define NCONTROLLERS (2)
#define NSTREAMS_PER_CONTROLLER (7)
@ -396,7 +396,7 @@ volatile dma_idle_count_t dma_idle;
#define DMA1_IS_CLK_ENABLED() ((RCC->AHB1ENR & RCC_AHB1ENR_DMA1EN) != 0)
#define DMA2_IS_CLK_ENABLED() ((RCC->AHB1ENR & RCC_AHB1ENR_DMA2EN) != 0)
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
void DMA1_Stream0_IRQHandler(void) { IRQ_ENTER(DMA1_Stream0_IRQn); if (dma_handle[dma_id_0] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_0]); } IRQ_EXIT(DMA1_Stream0_IRQn); }
void DMA1_Stream1_IRQHandler(void) { IRQ_ENTER(DMA1_Stream1_IRQn); if (dma_handle[dma_id_1] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_1]); } IRQ_EXIT(DMA1_Stream1_IRQn); }
@ -415,7 +415,7 @@ void DMA2_Stream5_IRQHandler(void) { IRQ_ENTER(DMA2_Stream5_IRQn); if (dma_handl
void DMA2_Stream6_IRQHandler(void) { IRQ_ENTER(DMA2_Stream6_IRQn); if (dma_handle[dma_id_14] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_14]); } IRQ_EXIT(DMA2_Stream6_IRQn); }
void DMA2_Stream7_IRQHandler(void) { IRQ_ENTER(DMA2_Stream7_IRQn); if (dma_handle[dma_id_15] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_15]); } IRQ_EXIT(DMA2_Stream7_IRQn); }
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
void DMA1_Channel1_IRQHandler(void) { IRQ_ENTER(DMA1_Channel1_IRQn); if (dma_handle[dma_id_0] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_0]); } IRQ_EXIT(DMA1_Channel1_IRQn); }
void DMA1_Channel2_IRQHandler(void) { IRQ_ENTER(DMA1_Channel2_IRQn); if (dma_handle[dma_id_1] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_1]); } IRQ_EXIT(DMA1_Channel2_IRQn); }
@ -485,7 +485,7 @@ void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void
dma->Instance = dma_descr->instance;
dma->Init = *dma_descr->init;
dma->Init.Direction = dma_descr->transfer_direction;
#if defined(MCU_SERIES_L4) || defined(STM32H7)
#if defined(STM32L4) || defined(STM32H7)
dma->Init.Request = dma_descr->sub_instance;
#else
dma->Init.Channel = dma_descr->sub_instance;
@ -524,7 +524,7 @@ void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data){
} else {
// only necessary initialization
dma->State = HAL_DMA_STATE_READY;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
// calculate DMA base address and bitshift to be used in IRQ handler
extern uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma);
DMA_CalcBaseAndBitshift(dma);

4
ports/stm32/dma.h
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@ -28,7 +28,7 @@
typedef struct _dma_descr_t dma_descr_t;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
extern const dma_descr_t dma_I2C_1_RX;
extern const dma_descr_t dma_SPI_3_RX;
@ -57,7 +57,7 @@ extern const dma_descr_t dma_SDMMC_2_TX;
extern const dma_descr_t dma_SPI_6_RX;
extern const dma_descr_t dma_SDIO_0_TX;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
extern const dma_descr_t dma_ADC_1_RX;
extern const dma_descr_t dma_ADC_2_RX;

12
ports/stm32/extint.c
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@ -89,7 +89,7 @@
// register in an atomic fashion by using bitband addressing.
#define EXTI_MODE_BB(mode, line) (*(__IO uint32_t *)(PERIPH_BB_BASE + ((EXTI_OFFSET + (mode)) * 32) + ((line) * 4)))
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
// The L4 MCU supports 40 Events/IRQs lines of the type configurable and direct.
// Here we only support configurable line types. Details, see page 330 of RM0351, Rev 1.
// The USB_FS_WAKUP event is a direct type and there is no support for it.
@ -137,7 +137,7 @@ STATIC const uint8_t nvic_irq_channel[EXTI_NUM_VECTORS] = {
EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn,
EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn,
EXTI15_10_IRQn,
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
PVD_PVM_IRQn,
#else
PVD_IRQn,
@ -282,7 +282,7 @@ void extint_enable(uint line) {
if (line >= EXTI_NUM_VECTORS) {
return;
}
#if defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7)
// The Cortex-M7 doesn't have bitband support.
mp_uint_t irq_state = disable_irq();
if (pyb_extint_mode[line] == EXTI_Mode_Interrupt) {
@ -312,7 +312,7 @@ void extint_disable(uint line) {
return;
}
#if defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7)
// The Cortex-M7 doesn't have bitband support.
mp_uint_t irq_state = disable_irq();
#if defined(STM32H7)
@ -337,7 +337,7 @@ void extint_swint(uint line) {
return;
}
// we need 0 to 1 transition to trigger the interrupt
#if defined(MCU_SERIES_L4) || defined(STM32H7)
#if defined(STM32L4) || defined(STM32H7)
EXTI->SWIER1 &= ~(1 << line);
EXTI->SWIER1 |= (1 << line);
#else
@ -386,7 +386,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_swint_obj, extint_obj_swint);
/// \classmethod regs()
/// Dump the values of the EXTI registers.
STATIC mp_obj_t extint_regs(void) {
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
printf("EXTI_IMR1 %08lx\n", EXTI->IMR1);
printf("EXTI_IMR2 %08lx\n", EXTI->IMR2);
printf("EXTI_EMR1 %08lx\n", EXTI->EMR1);

2
ports/stm32/extint.h
Wyświetl plik

@ -38,7 +38,7 @@
#define EXTI_USB_OTG_HS_WAKEUP (20)
#define EXTI_RTC_TIMESTAMP (21)
#define EXTI_RTC_WAKEUP (22)
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
#define EXTI_LPTIM1_ASYNC_EVENT (23)
#endif

14
ports/stm32/flash.c
Wyświetl plik

@ -34,7 +34,7 @@ typedef struct {
uint32_t sector_count;
} flash_layout_t;
#if defined(MCU_SERIES_F4)
#if defined(STM32F4)
static const flash_layout_t flash_layout[] = {
{ 0x08000000, 0x04000, 4 },
@ -50,7 +50,7 @@ static const flash_layout_t flash_layout[] = {
#endif
};
#elif defined(MCU_SERIES_F7)
#elif defined(STM32F7)
// FLASH_FLAG_PGSERR (Programming Sequence Error) was renamed to
// FLASH_FLAG_ERSERR (Erasing Sequence Error) in STM32F7
@ -62,7 +62,7 @@ static const flash_layout_t flash_layout[] = {
{ 0x08040000, 0x40000, 3 },
};
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
static const flash_layout_t flash_layout[] = {
{ (uint32_t)FLASH_BASE, (uint32_t)FLASH_PAGE_SIZE, 512 },
@ -78,7 +78,7 @@ static const flash_layout_t flash_layout[] = {
#error Unsupported processor
#endif
#if defined(MCU_SERIES_L4) || defined(STM32H7)
#if defined(STM32L4) || defined(STM32H7)
// get the bank of a given flash address
static uint32_t get_bank(uint32_t addr) {
@ -103,7 +103,7 @@ static uint32_t get_bank(uint32_t addr) {
}
}
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
// get the page of a given flash address
static uint32_t get_page(uint32_t addr) {
if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) {
@ -153,7 +153,7 @@ void flash_erase(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32)
FLASH_EraseInitTypeDef EraseInitStruct;
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
// erase the sector(s)
@ -220,7 +220,7 @@ void flash_erase_it(uint32_t flash_dest, const uint32_t *src, uint32_t num_word3
*/
void flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) {
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
// program the flash uint64 by uint64
for (int i = 0; i < num_word32 / 2; i++) {

8
ports/stm32/i2c.c
Wyświetl plik

@ -131,7 +131,7 @@ const pyb_i2c_obj_t pyb_i2c_obj[] = {
#endif
};
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4)
#if defined(STM32F7) || defined(STM32L4)
// The STM32F0, F3, F7 and L4 use a TIMINGR register rather than ClockSpeed and
// DutyCycle.
@ -161,7 +161,7 @@ const pyb_i2c_obj_t pyb_i2c_obj[] = {
#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (PYB_I2C_SPEED_FULL)
#define MICROPY_HW_I2C_BAUDRATE_MAX (PYB_I2C_SPEED_FAST)
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
// The value 0x90112626 was obtained from the DISCOVERY_I2C1_TIMING constant
// defined in the STM32L4Cube file Drivers/BSP/STM32L476G-Discovery/stm32l476g_discovery.h
@ -424,7 +424,7 @@ void i2c_ev_irq_handler(mp_uint_t i2c_id) {
return;
}
#if defined(MCU_SERIES_F4)
#if defined(STM32F4)
if (hi2c->Instance->SR1 & I2C_FLAG_BTF && hi2c->State == HAL_I2C_STATE_BUSY_TX) {
if (hi2c->XferCount != 0U) {
@ -476,7 +476,7 @@ void i2c_er_irq_handler(mp_uint_t i2c_id) {
return;
}
#if defined(MCU_SERIES_F4)
#if defined(STM32F4)
uint32_t sr1 = hi2c->Instance->SR1;

2
ports/stm32/machine_i2c.c
Wyświetl plik

@ -38,7 +38,7 @@
STATIC const mp_obj_type_t machine_hard_i2c_type;
#if defined(MCU_SERIES_F4)
#if defined(STM32F4)
// F4xx specific driver for I2C hardware peripheral
// The hardware-specific I2C code below is based heavily on the code from

2
ports/stm32/main.c
Wyświetl plik

@ -433,7 +433,7 @@ int main(void) {
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
#if defined(__HAL_RCC_DTCMRAMEN_CLK_ENABLE)
// The STM32F746 doesn't really have CCM memory, but it does have DTCM,
// which behaves more or less like normal SRAM.

24
ports/stm32/modmachine.c
Wyświetl plik

@ -54,7 +54,7 @@
#include "wdt.h"
#include "genhdr/pllfreqtable.h"
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
// L4 does not have a POR, so use BOR instead
#define RCC_CSR_PORRSTF RCC_CSR_BORRSTF
#endif
@ -86,13 +86,13 @@
STATIC uint32_t reset_cause;
void machine_init(void) {
#if defined(MCU_SERIES_F4)
#if defined(STM32F4)
if (PWR->CSR & PWR_CSR_SBF) {
// came out of standby
reset_cause = PYB_RESET_DEEPSLEEP;
PWR->CR |= PWR_CR_CSBF;
} else
#elif defined(MCU_SERIES_F7)
#elif defined(STM32F7)
if (PWR->CSR1 & PWR_CSR1_SBF) {
// came out of standby
reset_cause = PYB_RESET_DEEPSLEEP;
@ -241,7 +241,7 @@ STATIC NORETURN mp_obj_t machine_bootloader(void) {
HAL_MPU_Disable();
#endif
#if defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7)
// arm-none-eabi-gcc 4.9.0 does not correctly inline this
// MSP function, so we write it out explicitly here.
//__set_MSP(*((uint32_t*) 0x1FF00000));
@ -296,7 +296,7 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
// set
mp_int_t wanted_sysclk = mp_obj_get_int(args[0]) / 1000000;
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
mp_raise_NotImplementedError("machine.freq set not supported yet");
#endif
@ -391,7 +391,7 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
// set PLL as system clock source if wanted
if (sysclk_source == RCC_SYSCLKSOURCE_PLLCLK) {
uint32_t flash_latency;
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
// if possible, scale down the internal voltage regulator to save power
// the flash_latency values assume a supply voltage between 2.7V and 3.6V
uint32_t volt_scale;
@ -419,7 +419,7 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
}
#endif
#if !defined(MCU_SERIES_F7)
#if !defined(STM32F7)
#if !defined(MICROPY_HW_FLASH_LATENCY)
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_5
#endif
@ -433,7 +433,7 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
}
#if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
#define FREQ_BKP BKP31R
#else
#define FREQ_BKP BKP19R
@ -459,7 +459,7 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq);
STATIC mp_obj_t machine_sleep(void) {
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
// Enter Stop 1 mode
__HAL_RCC_WAKEUPSTOP_CLK_CONFIG(RCC_STOP_WAKEUPCLOCK_MSI);
@ -491,7 +491,7 @@ STATIC mp_obj_t machine_sleep(void) {
// takes longer to wake but reduces stop current
HAL_PWREx_EnableFlashPowerDown();
# if defined(MCU_SERIES_F7)
# if defined(STM32F7)
HAL_PWR_EnterSTOPMode((PWR_CR1_LPDS | PWR_CR1_LPUDS | PWR_CR1_FPDS | PWR_CR1_UDEN), PWR_STOPENTRY_WFI);
# else
HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
@ -527,7 +527,7 @@ MP_DEFINE_CONST_FUN_OBJ_0(machine_sleep_obj, machine_sleep);
STATIC mp_obj_t machine_deepsleep(void) {
rtc_init_finalise();
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
printf("machine.deepsleep not supported yet\n");
#else
// We need to clear the PWR wake-up-flag before entering standby, since
@ -549,7 +549,7 @@ STATIC mp_obj_t machine_deepsleep(void) {
// clear RTC wake-up flags
RTC->ISR &= ~(RTC_ISR_ALRAF | RTC_ISR_ALRBF | RTC_ISR_WUTF | RTC_ISR_TSF);
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
// disable wake-up flags
PWR->CSR2 &= ~(PWR_CSR2_EWUP6 | PWR_CSR2_EWUP5 | PWR_CSR2_EWUP4 | PWR_CSR2_EWUP3 | PWR_CSR2_EWUP2 | PWR_CSR2_EWUP1);
// clear global wake-up flag

14
ports/stm32/rtc.c
Wyświetl plik

@ -191,7 +191,7 @@ void rtc_init_finalise() {
// fresh reset; configure RTC Calendar
RTC_CalendarConfig();
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
if(__HAL_RCC_GET_FLAG(RCC_FLAG_BORRST) != RESET) {
#else
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PORRST) != RESET) {
@ -232,7 +232,7 @@ STATIC HAL_StatusTypeDef PYB_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruc
HAL_PWR_EnableBkUpAccess();
uint32_t tickstart = HAL_GetTick();
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32L4) || defined(STM32H7)
//__HAL_RCC_PWR_CLK_ENABLE();
// Enable write access to Backup domain
//PWR->CR1 |= PWR_CR1_DBP;
@ -302,10 +302,10 @@ STATIC HAL_StatusTypeDef PYB_RTC_Init(RTC_HandleTypeDef *hrtc) {
// Exit Initialization mode
hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
#if defined(MCU_SERIES_L4) || defined(STM32H7)
#if defined(STM32L4) || defined(STM32H7)
hrtc->Instance->OR &= (uint32_t)~RTC_OR_ALARMOUTTYPE;
hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType);
#elif defined(MCU_SERIES_F7)
#elif defined(STM32F7)
hrtc->Instance->OR &= (uint32_t)~RTC_OR_ALARMTYPE;
hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType);
#else
@ -635,7 +635,7 @@ mp_obj_t pyb_rtc_wakeup(size_t n_args, const mp_obj_t *args) {
RTC->WPR = 0xff;
// enable external interrupts on line 22
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
EXTI->IMR1 |= 1 << 22;
EXTI->RTSR1 |= 1 << 22;
#elif defined(STM32H7)
@ -648,7 +648,7 @@ mp_obj_t pyb_rtc_wakeup(size_t n_args, const mp_obj_t *args) {
// clear interrupt flags
RTC->ISR &= ~(1 << 10);
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
EXTI->PR1 = 1 << 22;
#elif defined(STM32H7)
EXTI_D1->PR1 = 1 << 22;
@ -668,7 +668,7 @@ mp_obj_t pyb_rtc_wakeup(size_t n_args, const mp_obj_t *args) {
RTC->WPR = 0xff;
// disable external interrupts on line 22
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
EXTI->IMR1 &= ~(1 << 22);
#elif defined(STM32H7)
EXTI_D1->IMR1 |= 1 << 22;

6
ports/stm32/sdcard.c
Wyświetl plik

@ -40,7 +40,7 @@
#if MICROPY_HW_HAS_SDCARD
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4)
#if defined(STM32F7) || defined(STM32L4)
// The F7 has 2 SDMMC units but at the moment we only support using one of them in
// a given build. If a boards config file defines MICROPY_HW_SDMMC2_CK then SDMMC2
@ -198,7 +198,7 @@ bool sdcard_power_on(void) {
}
// configure the SD bus width for wide operation
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
// use maximum SDMMC clock speed on F7 MCUs
sd_handle.Init.ClockBypass = SDMMC_CLOCK_BYPASS_ENABLE;
#endif
@ -239,7 +239,7 @@ void SDIO_IRQHandler(void) {
}
#endif
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
void SDMMC2_IRQHandler(void) {
IRQ_ENTER(SDMMC2_IRQn);
HAL_SD_IRQHandler(&sd_handle);

10
ports/stm32/stm32_it.c
Wyświetl plik

@ -522,7 +522,7 @@ void PVD_IRQHandler(void) {
IRQ_EXIT(PVD_IRQn);
}
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
void PVD_PVM_IRQHandler(void) {
IRQ_ENTER(PVD_PVM_IRQn);
Handle_EXTI_Irq(EXTI_PVD_OUTPUT);
@ -563,7 +563,7 @@ void TIM1_BRK_TIM9_IRQHandler(void) {
IRQ_EXIT(TIM1_BRK_TIM9_IRQn);
}
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
void TIM1_BRK_TIM15_IRQHandler(void) {
IRQ_ENTER(TIM1_BRK_TIM15_IRQn);
timer_irq_handler(15);
@ -578,7 +578,7 @@ void TIM1_UP_TIM10_IRQHandler(void) {
IRQ_EXIT(TIM1_UP_TIM10_IRQn);
}
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
void TIM1_UP_TIM16_IRQHandler(void) {
IRQ_ENTER(TIM1_UP_TIM16_IRQn);
timer_irq_handler(1);
@ -593,7 +593,7 @@ void TIM1_TRG_COM_TIM11_IRQHandler(void) {
IRQ_EXIT(TIM1_TRG_COM_TIM11_IRQn);
}
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
void TIM1_TRG_COM_TIM17_IRQHandler(void) {
IRQ_ENTER(TIM1_TRG_COM_TIM17_IRQn);
timer_irq_handler(17);
@ -662,7 +662,7 @@ void TIM8_UP_TIM13_IRQHandler(void) {
IRQ_EXIT(TIM8_UP_TIM13_IRQn);
}
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
void TIM8_UP_IRQHandler(void) {
IRQ_ENTER(TIM8_UP_IRQn);
timer_irq_handler(8);

38
ports/stm32/system_stm32.c
Wyświetl plik

@ -107,21 +107,21 @@ void __fatal_error(const char *msg);
* @{
*/
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
#define CONFIG_RCC_CR_1ST (RCC_CR_HSION)
#define CONFIG_RCC_CR_2ND (RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON)
#define CONFIG_RCC_PLLCFGR (0x24003010)
#if defined(MCU_SERIES_F4)
#if defined(STM32F4)
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
#elif defined(MCU_SERIES_F7)
#elif defined(STM32F7)
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
#endif
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
#define CONFIG_RCC_CR_1ST (RCC_CR_MSION)
#define CONFIG_RCC_CR_2ND (RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_HSION | RCC_CR_PLLON)
@ -263,9 +263,9 @@ void SystemInit(void)
RCC->CR &= (uint32_t)0xFFFBFFFF;
/* Disable all interrupts */
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
RCC->CIR = 0x00000000;
#elif defined(MCU_SERIES_L4) || defined(STM32H7)
#elif defined(STM32L4) || defined(STM32H7)
RCC->CIER = 0x00000000;
#endif
@ -373,7 +373,7 @@ void SystemClock_Config(void)
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
#endif
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
/* Enable Power Control clock */
#if defined(STM32H7)
@ -386,7 +386,7 @@ void SystemClock_Config(void)
clocked below the maximum system frequency, to update the voltage scaling value
regarding system frequency refer to product datasheet. */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
// Configure LSE Drive Capability
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
#endif
@ -398,7 +398,7 @@ void SystemClock_Config(void)
#endif
/* Enable HSE Oscillator and activate PLL with HSE as source */
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
@ -406,7 +406,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
#endif
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@ -424,9 +424,9 @@ void SystemClock_Config(void)
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
#if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
#define FREQ_BKP BKP31R
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
#error Unsupported Processor
#else
#define FREQ_BKP BKP19R
@ -470,7 +470,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.PLL.PLLN = MICROPY_HW_CLK_PLLN;
RCC_OscInitStruct.PLL.PLLP = MICROPY_HW_CLK_PLLP;
RCC_OscInitStruct.PLL.PLLQ = MICROPY_HW_CLK_PLLQ;
#if defined(MCU_SERIES_L4) || defined(STM32H7)
#if defined(STM32L4) || defined(STM32H7)
RCC_OscInitStruct.PLL.PLLR = MICROPY_HW_CLK_PLLR;
#endif
@ -480,11 +480,11 @@ void SystemClock_Config(void)
RCC_OscInitStruct.PLL.PLLFRACN = 0;
#endif
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
@ -519,7 +519,7 @@ void SystemClock_Config(void)
}
#endif
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
/* Activate the OverDrive to reach the 200 MHz Frequency */
if (HAL_PWREx_EnableOverDrive() != HAL_OK)
{
@ -550,14 +550,14 @@ void SystemClock_Config(void)
HAL_PWREx_EnableUSBVoltageDetector();
#endif
#if defined(MCU_SERIES_F7)
#if defined(STM32F7)
// The DFU bootloader changes the clocksource register from its default power
// on reset value, so we set it back here, so the clocksources are the same
// whether we were started from DFU or from a power on reset.
RCC->DCKCFGR2 = 0;
#endif
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
// Enable MSI-Hardware auto calibration mode with LSE
HAL_RCCEx_EnableMSIPLLMode();
@ -600,7 +600,7 @@ void SystemClock_Config(void)
}
void HAL_MspInit(void) {
#if defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7)
/* Enable I-Cache */
SCB_EnableICache();

8
ports/stm32/timer.c
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@ -651,9 +651,9 @@ STATIC mp_obj_t pyb_timer_init_helper(pyb_timer_obj_t *self, size_t n_args, cons
// It assumes that timer instance pointer has the lower 8 bits cleared.
#define TIM_ENTRY(id, irq) [id - 1] = (uint32_t)TIM##id | irq
STATIC const uint32_t tim_instance_table[MICROPY_HW_MAX_TIMER] = {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
TIM_ENTRY(1, TIM1_UP_TIM10_IRQn),
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
TIM_ENTRY(1, TIM1_UP_TIM16_IRQn),
#endif
TIM_ENTRY(2, TIM2_IRQn),
@ -671,9 +671,9 @@ STATIC const uint32_t tim_instance_table[MICROPY_HW_MAX_TIMER] = {
TIM_ENTRY(7, TIM7_IRQn),
#endif
#if defined(TIM8)
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
TIM_ENTRY(8, TIM8_UP_TIM13_IRQn),
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
TIM_ENTRY(8, TIM8_UP_IRQn),
#endif
#endif

10
ports/stm32/uart.c
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@ -383,7 +383,7 @@ int uart_rx_char(pyb_uart_obj_t *self) {
return data;
} else {
// no buffering
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32L4) || defined(STM32H7)
return self->uart.Instance->RDR & self->char_mask;
#else
return self->uart.Instance->DR & self->char_mask;
@ -462,7 +462,7 @@ STATIC size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_
} else {
data = *src++;
}
#if defined(MCU_SERIES_F4)
#if defined(STM32F4)
uart->DR = data;
#else
uart->TDR = data;
@ -501,7 +501,7 @@ void uart_irq_handler(mp_uint_t uart_id) {
uint16_t next_head = (self->read_buf_head + 1) % self->read_buf_len;
if (next_head != self->read_buf_tail) {
// only read data if room in buf
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32L4) || defined(STM32H7)
int data = self->uart.Instance->RDR; // clears UART_FLAG_RXNE
#else
int data = self->uart.Instance->DR; // clears UART_FLAG_RXNE
@ -686,7 +686,7 @@ STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const
// compute actual baudrate that was configured
// (this formula assumes UART_OVERSAMPLING_16)
uint32_t actual_baudrate = 0;
#if defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7)
UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
UART_GETCLOCKSOURCE(&self->uart, clocksource);
switch (clocksource) {
@ -937,7 +937,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_readchar_obj, pyb_uart_readchar);
// uart.sendbreak()
STATIC mp_obj_t pyb_uart_sendbreak(mp_obj_t self_in) {
pyb_uart_obj_t *self = self_in;
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32L4) || defined(STM32H7)
self->uart.Instance->RQR = USART_RQR_SBKRQ; // write-only register
#else
self->uart.Instance->CR1 |= USART_CR1_SBK;

4
ports/stm32/usbd_conf.c
Wyświetl plik

@ -102,7 +102,7 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
/* Enable USB FS Clocks */
__USB_OTG_FS_CLK_ENABLE();
#if defined (MCU_SERIES_L4)
#if defined(STM32L4)
/* Enable VDDUSB */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
{
@ -432,7 +432,7 @@ if (pdev->id == USB_PHY_FS_ID)
pcd_fs_handle.Init.phy_itface = PCD_PHY_EMBEDDED;
pcd_fs_handle.Init.Sof_enable = 1;
pcd_fs_handle.Init.speed = PCD_SPEED_FULL;
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
pcd_fs_handle.Init.lpm_enable = DISABLE;
pcd_fs_handle.Init.battery_charging_enable = DISABLE;
#endif