nrf: Add new port to Nordic nRF5x MCUs.

This commit is a combination of about 802 commits from the initial stages
of development of this port, up to and including the point where the code
was moved to the ports/nrf directory.  The following is a digest of the
original commits in their original order (most recent listed first),
grouped where possible by author.  The list is here to give credit for the
work and provide some level of traceability and accountability.  For the
full history of development please consult the following repository:

    https://github.com/tralamazza/micropython

Unless otherwise explicitly state in a sub-directory or file, all code is
MIT licensed and the relevant copyright holders are listed in the
comment-header of each file.

Glenn Ruben Bakke <glennbakke@gmail.com>
    ports/nrf: Moving nrf51/52 port to new ports directory
    nrf: Aligning with upstream the use of nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, ...)

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf/modules/random: Backport of microbit random number generator module

    Backport of micro:bit random module.
    Plugged into the port as a general random module for all nrf51/nrf52 targets. Works both with and without Bluetooth LE stack enabled.

    Behavioral change: seed() method has been removed, as the use of RNG peripheral generates true random sequences and not pseudo-random sequences.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf/hal/rng: Adding HAL driver for accessing RNG peripheral

    The driver also takes care of calling the Bluetooth LE stack for random values if the stack is enabled. The reason for this is that the Bluetooth LE stack take ownership of the NRF_RNG when enabled. Tolerate to enable/disable on the fly, and will choose to use direct access to the peripheral if Bluetooth LE stack is disabled or not compiled in at all.

    Driver has been included in the top Makefile, and will not be compiled in unless nrf51_hal_conf.h/nrf52_hal_conf.h defines HAL_RNG_MODULE_ENABLED (1).

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf/boards: Adding Arduino Primo board support (#88)

    * nrf: Adding Arduino Primo board support
    * nrf: Adding arduino_primo to target boards table in readme.md
    * nrf/boards: Activating pyb.LED module for arduino_primo board.
    * nrf/boards: Removing define not needed for arduino_primo

    Updating arduino_primo board mpconfigboard.h. Removing a define
    that was wrongly named. Instead of renaming it, it was removed as
    it was never used.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf: Add support for floating point on nrf52 targets.

    Duplicating pattern for detecting location of libm, libc and libgcc
    from teensy port. Activating MICROPY_FLOAT_IMPL (FLOAT) for nrf52 targets
    and adding libs into the compile. For nrf51 targets it is still set to
    NONE as code grows to much (about 30k).

    Some numbers on flash use if MICROPY_FLOAT_IMPL is set to
    MICROPY_FLOAT_IMPL_FLOAT and math libraries are enabled (lgcc, lc, lm).

    nrf51:
    ======

    without float support:
       text    data     bss     dec     hex filename
     144088     260   30020  174368   2a920 build-pca10028/firmware.elf

    with float support:
       text    data     bss     dec     hex filename
     176228    1336   30020  207584   32ae0 build-pca10028/firmware.elf

    nrf52:
    ======

    without float support:
       text    data     bss     dec     hex filename
     142040     356   36236  178632   2b9c8 build-pca10040/firmware.elf

    with float support:
       text    data     bss     dec     hex filename
     165068    1436   36236  202740   317f4 build-pca10040/firmware.elf

Daniel Tralamazza <daniel@tralamazza.com>
    nrf: add a note for running the nrfjprog tool on Linux, and touch up the make sd comment
    nrf: clean compiler warnings

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf/drivers/bluetooth: Speedup Bluetooth LE REPL.

    Updating mp_hal_stdout_tx_strn_cooked to pass on the whole string
    to mp_hal_stdout_tx_strn instead of passing byte by byte.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf: Use the name MicroPython consistently in comments
    nrf5: Updating readme with BLE REPL

Ben Whitten <ben.whitten@lairdtech.com>
    nrf/boards: Add DVK BL652 from Laird

    To build run 'make BOARD=dvk_bl652 SD=s132'
    To flash with jlink run 'make sd BOARD=dvk_bl652 SD=s132'
    This will remove the existing licences in the bl652

Ben Whitten <ben.whitten@lairdtech.com>
    nrf/drivers/bluetooth: Allow s132 to use LFCLK
    nrf: Add nordic sd folders to the .gitignore

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf/boards: Updating microbit pin mapping for SPI and I2C.
    nrf/boards: Correcting feather52 I2C SDA pin assigned to the board.
    nrf/examples: Update ssd1306 modification example to import correct class.
    nrf/boards: Activate RTC and Timer module and HAL on pca10056. Also swapping out UART with UART DMA variant on this target board.
    nrf/boards: Activate RTC, Timer, I2C, ADC and HW_SPI module and HAL on pca10031.
    nrf/boards: Activate RTC, Timer, I2C and ADC module and HAL on pca10001.
    nrf/boards: Adding RTC and Timer module and HAL to pca10000.
    nrf: Updating README.
    nrf: Removing unused font header.

Daniel Tralamazza <daniel@tralamazza.com>
    rename temperature example

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/examples: Adding ubluepy peripheral example that works across nrf51 and nrf52. The example uses Environmenting Sensing Service to provide the temperature characteristic. The temperature is fetched from the machine.Temp module. One note is that the example uses 1 LED which is not present on all boards.
    nrf5/modules/ubluepy: Adding new event constant for gatts write (80) events from bluetooth stacks.
    nrf5/hal/timer: Add support for fetching temperature if bluetooth stack is enabled.
    nrf5/drivers/bluetooth: Make printf in 'ble_drv_service_add' function part of debug log.

Daniel Tralamazza <daniel@tralamazza.com>
    implement #50

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/examples: Updating mountsd example with comment from deleted sdcard.py on how to wire SD directly to SPI.
    nrf5/examples: Removing copy of sdcard.py also found in drivers/sdcard.
    nrf5/examples: Removing copy of ssd1306 driver, creating a new class that overrides the needed function for i2c. Also adding some example usage in the comment in top of the file for both SPI and I2C variant.
    nrf5/hal/gpio: Updating toggle inline function to work correctly, currently only used by LED module.
    nrf5/examples: Renaming servo.py to nrf52_servo.py as it is only implemented machine.PWM for nrf52.
    nrf5/freeze: Adding generic example to freeze. Hello world with board name as parameter.
    nrf5/examples: Moving nrf52 specific HW example from freeze to examples to replace test.py with a more generic example.
    nrf5: Update pyb module, and led module to only be compiled in if MICROPY_HW_HAS_LED is set to 1.
    nrf5/boards: Updating boards with correct LED count. Also adding new flag, MICROPY_HW_HAS_LED, to select whether the board has LED's at all. If not, this will unselect LED module from being compiled in.
    nrf5/boards: Updating pca10040 board header to set the LED count.
    nrf5: Generalize script setting LED(1) on to be applied only when there are leds present on the board.
    nrf5: Updating mpconfigport.h to set default values for MICROPY_HW_LED_COUNT (0) and MICROPY_HW_LED_PULLUP (0).
    nrf5/boards/feather52: Update s132 target makefile with dfu-gen and dfu-flash. This enables feather52 with Bluetooth LE. Features to be configured in bluetooth_conf.h.
    nrf5/boards/feather52: Add SERIAL makeflag if dfu-flash target is used.
    nrf5: Updating readme.md file based on review comments.
    nrf5: Update help.c with documentation of CTRL-A and CTRL-B to enter and exit raw REPL mode.
    nrf5: Updating main.c to support RAW REPL.
    Update README.md
    nrf5/modules/music: Updating pitch method to also use configured pin from mpconfigboard.h if set, in the case of lacking kwarg for pin. Also removing some commented out arguments to remove some confusion in the argument list. Done for both play() and pitch().
    nrf5/modules/music: Correct parameter checking of pin argument to deside whether to use MUSIC_PIN define or throw an error. If MUSIC_PIN define is configured the pin argument to music module play() can be elided.
    nrf5/modules/machine: Update timer init to set default IRQ priority before initializing Timer instance.
    nrf5/hal/timer: Update timer hal to use value provided in init to configure the irq_priority.
    nrf5/modules/machine: Reserving timer0 instance for bluetooth if compiled in. Leaving timer1 and timer2 for application. Note that music module soft-pwm will also occupy timer1 if enabled.
    nrf5/modules/machine: Updating timer module to use new hal. Adding new parameters to the init to set period, mode and callback.
    nrf5/hal/timer: Implementing hal_timer to 1us prescaler. Multiplier inside to get to millisecond resolution. Callback must be registered before starting a timer.
    nrf5: Makefile cleanup. Removing duplicate include and unused netutils.c used by BLE 6lowpan network which has been removed for now.
    nrf5/modules/machine: Indention fix in uart module.
    nrf5/modules/machine: Removing unused code from uart module.
    nrf5/hal/rtc: Updating hal driver to calculate prescaler a bit more verbose. Using 1 second interval ticks.
    nrf5/modules/machine: Fixing type in RTC.
    nrf5/modules/machine: Update rtc init to set default IRQ priority before initializing RTC instance.
    nrf5/hal/rtc: Aligning RTC (real-time counter) HAL driver with Timer HAL driver. To make api's symetric. Also updating modules/rtc to get aligned with new HAL api.
    nrf5/drivers/bluetooth: Moving stop condition initialization before call to bluetooth stack write function is done, to make sure that its not overwritten after reception of the write event in case of with_response writes.
    nrf5/drivers/bluetooth: Removing duplicate static variable declaration.
    nrf5/modules/ubluepy: Updating characteristic write method to take in an additional keyword, 'with_response'. Default value is False. Only activated in central role.
    nrf5/drivers/bluetooth: Updating ble_drv_attr_c_write with possibility to do client write with response. Blocking call.
    nrf5/examples: Adding some notes on which pin layout that has been used in the seeed_tft.py ILI9341 driver for driving the display.
    nrf5/examples: Shorten name on seeedstudio_tft_shield_v2.py to seeed_tft.py.
    nrf5/examples: Updating ili9341 example to use new Frambuffer object instead of legacy Framebuffer1.
    nrf5/examples: Removing seeed.py which used a lcd mono framebuffer has been removed.

Matt Trentini <matt.trentini@gmail.com>
    Adding a README for the nRF5 port

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/examples: Updating documentation in SDCard module example. Correcting typo and adding SD card wireing documentation for direct SPI connection.
    nrf5/modules/pin: Adding on() and off() methods to Pin object to be forward compatible with upstream master. Legacy high() and low() methods are kept.
    nrf5/modules/spi: Remove pyb abstraction from SPI module, as there was a bug in transfer of bytes due to casting errors. The update removes the pyb_spi_obj_t wrapper going directly on the machine_hard_spi_obj_t as base for machine SPI objects. SDCard mounting is also tested.
    nrf5/drivers/bluetooth: Enable ubluepy central by default if running nrf52/s132 bluetooth stack. Maturity of the module is pretty OK now.
    nrf5/boards/feather52: Updating pins.csv for the feather52 board.
    nrf5/boards/feather52: Updating LED pull to low.
    nrf5/boards/feather52: Update SPI pinout.
    nrf5/main: Move initializaton of modmusic to the module itself. Upon init of the module, the hardware, pwm and ticker will be started. Could be moved back to main if pwm or ticker should be shared among more modules and have to be initialized more global.
    nrf5/modules/machine/timer: If timer is used in combination with SOFT_PWM (implicitly use of ticker.c) guard the Timer1 instance from being instantiated trough python timer module. Also disable implementation of the HAL IRQ handler which is for now explicitly implemented in ticker.c for Timer1.
    nrf5/modules/music: Update ticker and modmusic to share global ticks counter as a volatile variable. Use Timer1 hardware peripheral instead of instance 0. Timer0 is not free if used in combination with a bluetooth stack. Update IRQ priority to levels that are compatible in use with a bluetooth stack for both nrf51 and nrf52. Apply nrf51 PAN fixes for Timer1 instead of original Timer0.
    nrf5/drivers/bluetooth: Updating bluetooth driver to initialize nrf_nvic_state_t struct during declaration of the global variable instead of explicit memset.
    nrf5/hal/irq: Adding wrappers for handling nvic calls when Bluetooth LE stack is enabled.
    nrf5/modules/machine: Updating IRQ levels in SPI with IRQ priorities compatible with Bluetooth stacks.
    nrf5/device: Remove old startup files in asm, which has now been replaced with c-implementation.
    nrf5: Update Makefile to add c-implementation of startup scripts instead of the .s files.
    nrf5/device: Adding startup files in .c to replace current asm versions.
    nrf5/examples: Tuning Bluetooth LE example controller python script after testing out the example live. Motor speed of 100 was not enought to lift the airplane. Also turning was hard without setting higher angle values. The new values are just guessed values. However, the flying experience was good.
    nrf5/hal/irq: Adding include of nrf_nvic.h if s132 bluetooth stack is used to resolve IRQ function wrappers on newer bluetooth stacks.
    nrf5/drivers/ticker: Removing unused code.
    nrf5/examples: Adding music example. Only working if bluetooth stack is not enabled.
    nrf5/boards/microbit: Disable music and softPWM as there are some issues with the ticker.
    nrf5: Adding -fstack-usage flag to gcc CFLAGS to be able to trace stack usage on modules.
    nrf5/drivers/ticker: Removing LowPriority callback from nrf51 as there is only one SoftwareIRQ free if bluetooth stack is enabled. Also setting new IRQ priority on SlowTicker to 3 instead of 2, to interleave with bluetooth stack if needed. Updating all NVIC calls to use hal_irq.h defined static inlines instead of direct access.
    nrf5/hal/irq: Adding IRQ wrappers if Bluetooth Stack is present.
    nrf5: Facilitate option to configure away the modble if needed. Enabled if MICROPY_PY_BLE config is enabled in bluetooth_conf.h.
    nrf5/boards/microbit: Enable music module by default. However, timer and rtc module has to be disabled. Bluetooth support broken. Optimization needed.
    nrf5/modules/machine: Quickfix. Update timer object to not allow instanciation of Timer(0) if SOFT_PWM is enabled by board.
    nrf5/hal/timer: Quickfix. Disable IRQ handler if SOFT_PWM is configured to be enabled. Ticker driver has in current driver a seperate IRQ handler for this timer instance.
    nrf5/drivers/ticker: Add compile config guard in ticker.c to only include the driver if SOFT_PWM is configured in by board.
    nrf5/drivers/softpwm: Renaming pwm_init to softpwm_init to not collide on symbol name with pwm_init in nrf52 machine PWM object.
    nrf5: Add modmusic QSTR definition of notes to qstrdefsport.h.
    nrf5: Update Makefile to include ticker.c and renamed softpwm. Updating also include paths to include modules/music and drivers/.
    nrf5: Adding include of modmusic.h in main.c.
    nrf5: Call microbit_music_init0() if enabled in main.c.
    nrf5/modules/music: Expose public init function for music module.
    nrf5/modules/music: Update modmusic to use updated includes. Add extern ticks. Add function which implements initialization of pwm and ticker, register ticker callback, and start the pwm and ticker. This corresponds to microbit port main.cpp init.
    nrf5/drivers/softpwm: Enable use of ticker in softpwm driver.
    nrf5/drivers/ticker: Adding ticker.c/.h from microbit port.
    nrf5/drivers/pwm: Renaming pwm.c/.h to softpwm.c/.h
    nrf5/drivers/pwm: Expose pwm_init() as public function.
    nrf5/modules/ubluepy: Making peripheral conn_handle volatile. Upon connection event, the variable is accessed in thread mode. However, the main-loop is blocking on conn_handle != 0xFFFF. If this is not volatile, optimized code will not exit the loop.
    nrf5/drivers/bluetooth: As callback functions are in most usecases are set to NULL upon last event to get public API function out of blocking mode, these function pointers has to be set as volatile, as they are updated to NULL in interrupt context, but read in blocking main-thread.
    nrf5/examples: Fixing overlapping function names and variable names inside the object. Also removing some print statements. Tuning max angle from -7/7 to -25/25.

Glenn Ruben Bakke <glennbakke@gmail.com>
    Powerup (#26)

    * nrf5/examples: Adding python example template for PowerUp 3.0 Bluetooth LE controlled Paper Airplane.
    * nrf5: Enable bluetooth le central while developing powerup 3.0 example.
    * nrf5/examples: Backing up powerup 3.0 progress.
    * nrf5/examples: Adding working example on how to control PowerUp 3.0 paper airplane using bluetooth le.
    * nrf5/bluetooth: Disable central role.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/modules/ubluepy: Correcting alignment of enum values in modubluepy.h.
    nrf5/drivers/bluetooth: Add implementation of client attribute write without response.
    nrf5/modules/ubluepy: Pass on buffer to write in characteristic write central mode.
    nrf5/modules/ubluepy: Updating characteristic object write function to be role aware. Either peripheral or central (gatts or gattc). Adding dummy call to attr_c_write if central is compiled in. Still in progress to be implemented.
    nrf5/drivers/bluetooth: Adding template function for attr_c_write.
    nrf5/drivers/bluetooth: Renaming attr_write and attr_notify to attr_s_write and attr_s_notify to prepare for introduction of attribute write for gatt client.
    nrf5/modules/ubluepy: Fixing type in ubluepy_peripheral.c.
    nrf5/modules/ubluepy: Setting peripheral role upon advertise() or connect().
    nrf5/drivers/bluetooth: Adding role member to peripheral object to indicate whether Peripheral object is Peripheral or Central role.
    nrf5/modules/ubluepy: Continue characteristic discovery until nothing more is found during connect proceedure.
    nrf5/drivers/bluetooth: Refactoring code to group statics for s130 and s132 into the same ifdef. Also adding two empty lines in discovery functions to make it more easy to read.
    nrf5/drivers/bluetooth: Updating characteristic discovery to signal whether anything was found or not.
    nrf5/modules/ubluepy: Continue primary service discovery until nothing more is found in connect proceedure.
    nrf5/drivers/bluetooth: Updating primary service discovery api to take in start handle from where to start the service discovery. Also adjusting return parameter to signal whether anything was found or not.
    nrf5/modules/ubluepy: Remove duplication GAP event handler registration in peripheral.connect().

Glenn Ruben Bakke <glennbakke@gmail.com>
    Support address types (#18)

    * nrf5/modules/ubluepy: Adding new enumeration of address types.
    * nrf5/modules/ubluepy: Adding constants that can be used from micropython for public and random static address types.
    * nrf5/modules/ubluepy: Adding support for optionally setting address type in Peripheral.connect(). Public address is used as default. Address types can be retrieved from 'constants'. Either constants.ADDR_TYPE_PUBLIC or constants.ADDR_TYPE_RANDOM_STATIC.
    * nrf5/modules/ubluepy: Register central GAP event handler before issuing connect to a peripheral. Has to be done before connect() function as a connected event will be propergated upon successfull connection. The handler will set the connection handle which gets connect function out of the busy loop waiting for connection to succeed.
    * nrf5/modules/ubluepy: Removing duplicate setting of GAP event handler in connect().

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/modules/ubluepy: Register central GAP event handler before issuing connect to a peripheral. Has to be done before connect() function as a connected event will be propergated upon successfull connection. The handler will set the connection handle which gets connect function out of the busy loop waiting for connection to succeed.
    nrf5/modules/ubluepy: Fixing compilation bug of wrong variable name when registering gattc event handler in ublupy peripheral connect function (central mode).
    nrf5/bluetooth: Updating makefiles with updated paths to bluetooth le components after moving files.
    nrf5/bluetooth: Moving stack download script to drivers/bluetooth folder.
    nrf5/bluetooth: Move bluetooth driver files to drivers/bluetooth. Move bluetooth stack download script to root folder.
    nrf5/bluetooth: Guarding implementation against being linked in by surrounding it with BLUETOOTH_SD flag. Flag is only set if SD=<sdname> parameter is provided during make.
    nrf5/bluetooth: Moving makefile include folder and source files of bluetooth driver, ble uart and ble module to main Makefile.
    nrf5/bluetooth: Moving help_sd.h and modble.c to modules/ble.
    nrf5/modules/machine: bugfix after changing to MP_ROM_PTR in machine module local dict.
    nrf5: Syncing code with upstream master and converting all module and method tables to use MP_ROM macros. Also adding explicit casting of local dicts to (mp_obj_dict_t*).
    nrf5/modules/timer: Fixing bug in timer_find(). Function allowed to locate index out of range and started to look up in config pointer (index == size of array).
    nrf5/modules/timer: Remove test which is covered by timer_find() function in the line below.
    nrf5/modules/timer: Adding locals dict table and adding start/stop template functions. Also adding constants for oneshot and periodic to locals dict.
    nrf5/modules/timer: Adding timer module to modmachine.
    nrf5/boards: Adding micro:bit default music pin definition. Also adding config flag for enabling pwm machine module.
    nrf5/hal/timer: Adding start/stop template functions to hal_timer.h/.c
    nrf5/Makefile: Adding drivers/pwm.c and modules/music files to the source file list.
    nrf5/modules/music: Adding config guard in musictunes.c and adding import of mphal.h.
    nrf5/modules/music: Including mphal.h before config guard in modmusic.c. Also changed name on config guard to MICROPY_PY_MUSIC. Missing PWM functions during linkage will show up if PWM module has not not configured.
    nrf5/drivers/pwm: Including mphal.h before config guard in pwm.c.
    nrf5: Updating mpconfigport.h to include music module as builtin. Adding new configuration for enabling music module. Activating MODULE_BUILTIN_INIT in order to run music module init function on import.
    nrf5/modules/music: Backing up progress in music module.
    nrf5/drivers/pwm: Updating soft PWM driver to only be included if SOFT_PWM config is set.
    nrf5/hal/gpio: Add function to clear output register using a pin mask.
    nrf5: Adding new configuration called MICROPY_PY_MACHINE_SOFT_PWM to mpconfigport.h. This config will enable software defined PWM using timer instead of using dedicated PWM hardware. Aimed to be used in nrf51 targets.
    nrf5/boards: Removing PWM config set to 0 from pca10001 board. Config will later be re-introduced as SOFT_PWM variant.
    nrf5/pwm: Updating config name of PWM to hardware PWM to prepare for introduction of soft variant.
    nrf5/modules/music: Backing up progress in modmusic.
    nrf5/modules/music: backing up porting progress in modmusic.c.
    nrf5/modules/music: Commenting out backend function calls in modmusic.c to make module compile for now.
    nrf5/modules/music: Updating music module to use pin_obj_t instad of microbit_pin_obj_t. Update include to drivers/pwm.h to resolve some undefined functions.
    nrf5/modules/music: Removing c++ extern definition. Updating include list in modmusic.c. Removing module name from module struct.
    nrf5/modules/music: Removing include of modmicrobit.h in musictunes.c.
    nrf5/modules/music: Adding header to expose extern structs defined in musictunes.c
    nrf5/drivers: Adding copy of microbit soft pwm.
    nrf5/modules/music: Renaming microbitmusic files to modmusic/music.
    nrf5/modules/music: Renaming microbit module to music.
    nrf5/modules/microbit: Copying microbit music module to the port.
    nrf5/modules/timer: Adding timer3 and timer4 to timer object in case of nrf52 target.
    nrf5/modules/timer: Optimizing timer object structure and updating the module to use new hal_timer_init structures and parameters.
    nrf5/hal/timer: Adding empty IRQ handlers for all timers.
    nrf5/hal/timer: Changing hardcoded hal timer instance base to a lookup, so that IRQ num can be detected automatically without the need of using struct param on it. Size of binary does not increase when using Os.
    nrf5: Updating example in main.c on how to execute string before REPL is set up, to allow for boards with two leds. Todo for later is to update this code such that it will skip this LED toggle when there are no leds defined. Or use an example not depending on LEDs.
    nrf5/bluetooth: Updating Bluetooth LE stack download script to allow to be invoked from any parent folder. No need to change directory to bluetooth/ in order to get the correct download target folder position. Using the script location to determine the target folder.
    nrf5/boards: Adding board target for feather52 using s132 v.2.0.1 application offset even if the device is not using softdevice. To be worked on later.
    nrf5/boards: decrease size of ISR region from 4k to 1k in custom feather52 linker script to get some more flash space.
    nrf5/boards: Updating feather52 mpconfigboard.h to use correct uart pins, flow control disabled. Also adjusting leds down to two leds.
    nrf5/boards: Updating path to custom linker script for feather52 board.
    nrf5/boards: Renaming bluefruit_nrf52_feather to feather52 to shorten down the name quite drastically.
    nrf5/boards: Updating path to custom bluefruit feather linker script after renaming board folder.
    nrf5/boards: Renaming bluefruit_feather to bluefruit_nrf52_feather as it also exist a m0 variant of the board name.
    nrf5/boards: Updating mpconfigboard.h for bluefruit nrf52 feather with correct board, mcu and platform name.
    nrf5/boards: Updating adafruit bluefruit nrf52 feather linker script to use 0x1c000 application offset.
    nrf5/boards: Renaming custom linker script for bluefruit feather to reflect that the purpose of the custom linker script is DFU. The script is diverging from the generic s132 v2 linker script in the offset of the application.
    nrf5/boards: Adding custom linker script for adafruit nrf52 bluefruit feather to be able to detect application upper boundry in flash. Pointing s132 mk file to use this new custom linker script instead of the generic s132 v2 linker script.
    nrf5/boards: Adding linker script for nrf52832 s132 v.2.0.1.
    nrf5/boards: Adding template board makefiles and configs for bluefruit nrf52 feather. Copied from pca10040 target board. Linker script reference updated to use s132 v2.0.1. Non-BLE enable build disabled for now. Board configuration for leds, uart etc has not been updated yet from pca10040 layout.
    nrf5/bluetooth: Correcting typo in test where s132 API version is settled.
    nrf5/bluetooth: Updating bluetooth le driver to compile with s132 v.2.0.1 stack.
    nrf5/bluetooth: Add new compiler flag to signal API variants of the s132 bluetooth le stack. The version is derived from the major number of the stack name.
    nrf5/bluetooth: Remove hardcoded softdevice version as this now comes as parameter from board makefile.
    nrf5/boards: Updating makefiles using bluetooth stack to use updated linker script file names.
    nrf5/boards: Renaming bluetooth stack linker scripts to reflect version of the stack.
    nrf5/boards: adding some spaces in s132 makefile for pca10040.
    nrf5/boards: Renaming linker script for nrf52832 using bluetooth stack such that it also holds the version number of the stack. Updating linkerscript using the target linker script.
    nrf5/bluetooth: Add support for downloading s132_2.0.1 bluetooth stack.
    nrf5/bluetooth: Switch over to downloaded bluetooth stacks from nordicsemi.com instead of getting them through the SDK's. This will facilitate download of s132 v2.0.0 later.
    nrf5/bluetooth: Fixing bug found when testing microbit. Newly introduced advertisment data pointer was not cleared on nrf51 targets. Explicit set to NULL as no additional advertisment data is set. Raises a question on why the nrf51 static variable was not zero initialized. To be checked up.
    nrf5: Removing SDK_ROOT parameter to Makefile. Bluetooth stacks should be downloaded using the download_ble_stack.sh. The script should be run inside the bluetooth folder to work properly.
    nrf5/bluetooth: Adding back SOFTDEV_HEX as flash tools in main Makefile uses this to locate hex file.
    nrf5/bluetooth: Including bluetooth stack version in folder name after download to be able to detect if stack has been updated.
    nrf5/bluetooth: Updating Bluetooth LE stack download script.
    nrf5/bluetooth: Adding bash script to automate download of bluetooth le stacks
    nrf5/examples: Adding example to show how to use current PWM module to control servo motors.
    nrf5/modules/machine: Updating PWM module with two new kwargs parameters. One for setting pulse with more fine grained. This value should not exceed the period value. Also, adding support for setting PWM mode, whether it is LOW duty cycle or HIGH duty cycle. By default, high to low is set (this could be changed).
    nrf5/hal/pwm: Updating PWM implementation to support manually set duty cycle period. Pulse width has precidence over duty cycle percentage. Also adding support for the two configurable modes, high to low, and low to high, duty cycles.
    nrf5/hal/pwm: Adding more configuration options to the PWM peripheral wrapper. Possibility to set pulse with manually, and also mode. The mode indicates whether duty cycle is low and then goes high, or if it is high and then go low. Added new type to describe the two modes.
    nrf5: Adding hal_gpio.c to Makefile's source list.
    nrf5/modules/machine: Updating Pin module to register a IRQ callback upon GPIO polarity change events.
    nrf5/hal/gpio: Adding initial gpiote implementation to handle IRQ on polarity change on a gpio.
    nrf5: Moving initialization of pin til after uart has been initialized for debugging purposes. This will make it possible to use uart to print out debug data when adding gpio irq handlers.
    nrf5/hal/gpio: Adding some new structures and functions to register irq channels to gpio's using GPIOTE peripheral
    nrf5/hal/gpio: Adding missing include.
    nrf5/modules/machine: Style fix in pin object, indention.
    nrf5/modules/machine: Adding placeholder for irq method to pin object class.
    nrf5/modules/machine: Adding pin irq type and basic functions and structures.
    nrf5/hal/gpio: Reintroducing gpio polarity toggle event to be able to reference the short form of adding high_to_low and low_to_high together.
    nrf5/hal/gpio: Updating hal_gpio.h with some tab-fixes in order to make the file a bit consistent in style.
    nrf5/hal/gpio: Removing toggle event from the enumeration as that will be a combination of the rising and falling together.
    nrf5/modules/machine: Removing toggle event trigger as that will be a combination of the rising and falling together.
    nrf5/modules/machine: Adding new constants to pin object for polarity change triggers using the enumerated values in hal_gpio.h.
    nrf5/hal/gpio: Adding new enumeration for input polarity change events.
    nrf5/hal: Moving hal_gpio functions, types and defines from mphalport.h to a new hal_gpio.h.
    Revert "lib/netutils: Adding some basic parsing and formating of ipv6 address strings. Only working with full length ipv6 strings. Short forms not supported at the moment (for example FE80::1, needs to be expressed as FE80:0000:0000:0000:0000:0000:0000:0001)."
    nrf5: Removing leftover reference to deleted display module.
    nrf5/usocket: Removing network modules related to Bluetooth 6lowpan implementation as it depends on SDK libraries for now. Will be moved to seperate working branch.
    nrf5: Removing custom display, framebuffer and graphics module to make branch contain core components instead of playground modules.
    nrf5/modules/usocket: Updating import of netutils.h after upmerge with upstream master.
    nrf5/bluetooth: Add some comment on the destination of the eddystone short-url.
    nrf5/bluetooth: Updating Eddystone URL to point to https://goo.gl/x46FES which hosts the MicroPython WebBluetooth application which will be able to connect to the Bluetooth LE UART service of the device and create the REPL.
    nrf5/bluetooth: Adding webbluetooth REPL template. Alternating advertisment of eddystone URL and UART BLE service every 500 ms. Adding new config parameter to bluetooth_conf.h to enable webbluetooth repl. Has to be configured in combination with BLE_NUS. Eddystone URL not pointing to a valid WebBluetooth application at the moment, but rather to micropython.org as a placeholder for now.
    nrf5/modules/ubluepy: Adding method Peripheral object to stop any ongoing advertisment. Adding compile guard to only include advertise and advertise_stop if peripheral role is compiled in.
    nrf5/bluetooth: Adding function to stop advertisment if onging
    nrf5/modules/ubluepy: Adding support for starting advertisment from BLE UART REPL, by delaying registration of gatt/gatts and gattc handlers until needed in advertise or connect. If non connectable advertisment is selected, handlers in peripheral new is not anymore overriding the other peripheral instances which has set the callbacks.
    nrf5/bluetooth: Adding possibility to configure whether advertisment should be connectable or not.
    nrf5/bluetooth: Removing legacy advertise function in the bluetooth driver, which only did a hardcoded eddystone beacone advertisment.
    nrf5/help: Updating ble module help description to also include the address method.
    nrf5/bluetooth: Renaming the ble module method address_print() to address(), as it will now return a string of the resolved local address. Updating the function to create a string out the local address and return this.
    nrf5/bluetooth: Update ble_drv_address_get to new api which pass in a address struct to fill by reference. Updating implementation to copy the address data. Also ensuring that the bluetooth stack has been enabled before fetching the address from the bluetooth stack.
    nrf5/bluetooth: Adding new structure which can hold local address. Updating api prototype for ble_drv_address_get with a address structure by reference.
    nrf5/bluetooth: Updating help text for ble module to also list up enabled() function which queries the bluetooth stack on whether it is enabled or not.
    nrf5/bluetooth: Removing advertise from ble module. Removing help text as well.
    nrf5/examples: Adding python eddystone example using ubluepy api.
    nrf5/modules/ubluepy: Open up Peripheral advertise method to pass custom data to the bluetooth driver. Allowing method to allow kwargs only if no args is set. To support setting data kwarg only.
    nrf5/modules/ubluepy: Adding new members to the ublupy advertisment parameters, to hold custom data payload if set.
    nrf5/bluetooth: Cleaning up stack enable function, to not set device name twice. Also, adding support for setting custom advertisment data.
    nrf5/modules/ubluepy: Adding compile guard for UBLUEPY_CENTRAL around the char_read() call to ble_drv_attr_c_read().
    nrf5/bluetooth: Moving central code inside central bluetooth stack defines to make peripheral only code compile again.
    nrf5/examples: Updating ubluepy scan example to use constant value from ubluepy instead of hardcoded value.
    nrf5/examples: Adding example on how to use the ubluepy Scanner object in order to scan for a device name and find the address of the device. This can subsequently be used to perform a Central role connect() using the Peripheral object.
    nrf5/modules/ubluepy: Turn all attributes (addr, addr_type and rssi) to method calls instead of using common .attr callback. Adding getScanData implementation, which parses the advertisment data and returns a list of tuples containing (ad_type, desc, value). Description is generated by peeking into the ad_types local dicts map table, and do a reverse lookup on the value to find the QSTR.
    nrf5/modules/ubluepy: Adding ad_types constants in new object. Linking in ad_types object into the ubluepy.constants local dict.
    nrf5/modules/ubluepy: Expose ubluepy constant objects as externs in modubluepy.h to be able to get access to the local dict tables in order to do a reverse lookup on value to resolve QSTR from external modules in c.
    nrf5/modules/ubluepy: Upon advertisment event, also store the advertisment data.
    nrf5/modules/ubluepy: Adding callback function to handle read response if gatt client has issued a read request. Also adding method for returning the uuid instance from the object.
    nrf5/modules/ubluepy: Adding value data member to the characteristic object. This can hold the value data when gatt client perform a read and value has to be transferred between interrupt and main thread.
    nrf5/bluetooth: Updating bluetooth driver to support GATT client read of a characteristic value. Data passed to caller in interrupt context, and copy has to be performed. The function call is itself blocking.
    nrf5/modules/ubluepy: Adding uuid() function to service object to return UUID instance of the service.
    nrf5/modules/ubluepy: Adding binVal() function to the ubluepy UUID object. For now returning the uint16_t value of the UUID as a small integer.
    nrf5/modules/ubluepy: Adding dummy function call to ble_drv_attr_c_read.
    nrf5/bluetooth: Adding new api for reading attribute as gatt client. Renaming old ble_drv_attr_read function to ble_drv_attr_s_read to indicate the server role.
    nrf5/bluetooth: Adding event handling cases for gatt client read, write and hvx events.
    nrf5/modules/ubluepy: Tab-fix
    nrf5/modules/ubluepy: Updating peripheral object to handle characteristic discovery (central mode).
    nrf5/modules/ubluepy: Adding start and end handle to service object.
    nrf5/bluetooth: Adding support for central characteristic service discovery. Updating primary service discovery to block until all services has been created in the peripheral object before returning from the bluetooth driver. This pattern is also applied to the characteristic discovery.
    nrf5/modules/ubluepy: Updating ubluepy peripheral object to new bluetooth driver API. Starting to populate service objects and uuid objects. Also adding the service to the peripheral object throught the regular static function for adding services. Handle value for the primary service is assuming that it is the first element in the handle range; start_handle reported by the service discovery.
    nrf5/bluetooth: Updating bluetooth driver to do service discovery, doing callbacks to ubluepy upon each individual primary service discovered. Using intermediate structure defined by the driver, to abstract bluetooth stack specific data in ubluepy.
    nrf5/modules/ubluepy: Adding some work in progress on service discovery.
    nrf5/bluetooth: Adding implementation to the discover service function. Adding handler for gatt client primary service discovery response events, and passing this to the ubluepy upon reception.
    nrf5/bluetooth: Adding function parameters and return type to service and characteristic discovery template functions.
    nrf5/bluetooth: Adding template functions for service discovery in bluetooth driver.
    nrf5/bluetooth: Adding function to register gattc event handler (central).
    nrf5/bluetooth: Adding intermediate gattc callback function type in bluetooth driver.
    nrf5/bluetooth: Turning off debug logging in bluetooth driver, which does not work well with bluetooth REPL mode.
    nrf5/bluetooth: Fixing some smaller tab errors in the bluetooth driver.
    nrf5/bluetooth: Updating bluetooth le driver to handle GAP conn param update request. Also updating minor syntax in previous switch case.
    nrf5/boards: Inrease heap size in the nrf52832 w/s132 bluetooth stack linker script.
    nrf5/modules/ubluepy: Update connect method to parse dev_addr parameter and pass it to the bluetooth driver, going through a allocated heap buffer. Adding call to the bluetooth driver to issue a connect. Hardcoding address type for now.
    nrf5/bluetooth: Updating connect function in the bluetooth driver to do a successful connect to a peripheral device.
    nrf5/modules/ubluepy: Adding template function for central connect() in peripheral object.
    nrf5/modules/ubluepy: Adding locals dict to Scan Entry introducing function to retreive Scan Data. Not working as expected together with .attr. It looks like locals dict functions are treated to be attributes and cannot be resolved.
    nrf5/bluetooth: Adding function for connecting to a device (in central role). Not yet tested.
    nrf5/modules/ubluepy: Return BLE peer address as string instead of bytearray. Updated struct in modubluepy.h to use a mp_obj_t to hold a string instead of a fixed 6-byte array. Stripped down ScanEntry print out to only contain class name, peer address available through addr attribute.
    nrf5/bluetooth: capture address type in addition to advertisment type in bluetooth advertisment reports.
    nrf5/modules/ubluepy: Correcting rssi member in scan_entry object to be int instead of uint.
    nrf5/modules/ubluepy: Adding attribute to ScanEntry object for getting address (returning bytearray), type (returning int) and rssi (returning int).
    nrf5/modules/ubluepy: Copy address type and rssi to the ScanEntry object upon reception of an advertisment report callback.
    nrf5/bluetooth: Adding address type to bluetooth stack driver advertisment structure, and fill the member when advertisment report is received.
    nrf5/modules/ubluepy: Swapping address bytes when copying bluetooth address over to ScanEntry object during advertisment scan report event.
    nrf5/modules/ubluepy: Extending print of ScanEntry object to also include the bluetooth le address.
    nrf5/modules/ubluepy: Create new adv report list for each individual scan. Create a new ScanEntry object instance on each advertisment event recieved and append this to the current adv_report list.
    nrf5/modules/ubluepy: Adding print function to scan_entry object.
    nrf5/modules/ubluepy: Populating ubluepy_scan_entry_obj_t with members that are interesting to keep for the ScanEntry object.
    nrf5/bluetooth: Moving callback definitions to bluetooth driver header. Refactoring bluetooth driver, setting new names on callback functions and updating api to use new callback function name prefix.
    nrf5/modules/ubluepy: Extracting advertisment reports and adding some data to list before returning it in scan() method.
    nrf5/bluetooth: Adding handling of advertisment reports in bluetooth driver and issue callback to ubluepy. A bit ugly implmentation and has to be re-worked.
    nrf5/bluetooth: adding adv report data structure to pass to ubluepy upon adv report event. Adding new api for setting callack where to handle advertisment events in ubluepy.
    nrf5/modules/ubluepy: Adding adv_reports member to scanner object, to hold the result of scan.
    nrf5/modules/machine: Cleaning up uart a bit more. Removing unused any() method, and aligning print and local dict names to use machine_uart prefix.
    nrf5/bluetooth: Turn off bluetooth printf logging.
    nrf5: Add back ublupy scanner and scan entry source files in Makefile.
    nrf5/bluetooth: Enable implementation in scan start function in the bluetooth stack driver.
    nrf5/boards: Adjust heap end after increased .data usage in nrf52832 s132 linker script.
    nrf5/bluetooth: Adding more implementation in scan start function. However, commented out for time beeing, as there is some memory issues when activating central.
    nrf5: Removing ubluepy scanner and scan entry from Makefile source list until nrf52 central issues has been resolved.
    nrf5/bluetooth: Correcting indention.
    nrf5/bluetooth: Adding some implementation to scan_start function.
    nrf5/modules/ubluepy: Adding scan method to the Scanner object. Adding locals dict table.
    nrf5/bluetooth: Adding empty scan_start and scan_stop function to the bluetooth driver.
    nrf5/modules/ubluepy: Adding constructor function to scanner object.
    nrf5/modules/ubluepy: Adding print function to Scanner object.
    nrf5/modules/ubluepy: Disable all functions central related functions in the Peripheral object for now, even if MICROPY_PY_UBLUEPY_CENTRAL is enabled.
    nrf5/modules/ubluepy: Activate Scanner and ScanEntry objects if MICROPY_PY_UBLUPY_CENTRAL is set.
    nrf5/bluetooth: Adding new configuration flag for s132 bluetooth stack, to enable/disable ubluepy central. Disabled by default.
    nrf5: Adding ubluepy_scanner.c and ubluepy_scan_entry.c to Makefile source list.
    nrf5/modules/ubluepy: Adding template object typedefs for scanner and scan entry, and extern definition for scanner and scan_entry object type in modubluepy.h
    nrf5/modules/ubluepy: Adding templates for central role Scanner and ScanEntry objects.
    nrf5/uart: Moving UART from pyb to machine module.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/uart: Refactoring UART module and HAL driver

    Facilitating for adding second HW uart. Moving pyb_uart into
    machine_uart. Adding return error codes from hal_uart functions,
    if the hardware detects an error.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/modules: Updating uart object to allow baudrate configuration.
    nrf5/bluetooth: Moving bluetooth_conf.h to port root folder to make it more exposed.
    nrf5/boards: Remove define of machine PWM module configuration in nrf51 targets, as the device does not have a HW PWM peripheral.
    nrf5: Disable machine PWM module by default if board does not define it.
    nrf5/boards: Disable all display modules in pca10028 board config.
    nrf5: Updated after merge with master. Updating nlr_jump_fail to call __fatal_error in order to provide a non-returning function call.
    nrf5/boards: Adding more heap memory to the nrf51 256k/32k s110 linker script. Leaving 2k for stack.
    nrf5/modules/machine: Adding __WFI() on machine.deepsleep()
    nrf5/modules/machine: Adding __WFE() on machine.sleep()
    nrf5/modules/machine: Adding enable_irq() and disable_irq() method to the machine module. No implementation yet for the case where bluetooth stack is used.
    nrf5/modules/rtc: Adding support for stopping and restarting rtc (if periodic) for all the instances of RTC.
    nrf5/modules: Updating RTC kwarg from type to mode to set ONESHOT or PERIODIC mode.
    nrf5/modules: Adding support for periodic RTC callback.
    nrf5/hal: hal_rtc update. Adding current counter value to period value before setting it in the compare register.
    nrf5/modules: Updating rtc module with non-const machine object list in order to allow setting callback function in constructor.
    nrf5/hal: Adding initialization of LFCLK if not already enabled in hal_rtc.
    nrf5/modules: Moving irq priority settings in RTC object to rtc_init0 when initializing the hardware instances. Also modifying comments a bit. Adding simple example in comment above make_new function on how the object is intended to work.
    nrf5: Updating main.c to initialize the rtc module if enabled.
    nrf5/modules: Added RTC into the machine module globals dict.
    nrf5/modules: Updating rtc module. Not working yet.  Updated to align with new hal_rtc interface. Added start and stop methods. Allowing callback function set from init. This should be moved to start function, not set in main.
    nrf5/hal: Updating hal RTC implementation.
    nrf5/hal: Adding hal_irq.h which defines a set of static inline functions to do nvic irq operations.
    nrf5/modules: Updating machine uart module to use new hal uart interface name.
    nrf5/hal: Renaming uart hal function to use hal_uart prefix.
    nrf5/modules: Updating readfrom function in machine i2c module to use the new hal function which has been implemented.
    nrf5/hal: Adding untested implementation of twi read. Lacking sensors to test with :)
    nrf5/boards: Renaming linker script for all nrf51 and nrf52 into more logical names. Updating all boards with new names.
    nrf5/bluetooth: Updating header guard in bluetooth_conf.h to reflect new filename.
    nrf5/bluetooth: Updating old references to 'sdk' to use the new folder name 'bluetooth' in makefiles.
    nrf5: Renaming sdk folder to bluetooth.
    nrf5: Merging sdk makefiles into bluetooth_common.mk. s1xx_iot is still left out of this refactoring.
    nrf5: Renaming nrf5_sdk_conf.h to bluetooth_conf.h
    nrf5: Starting process of renaming files in sdk folder to facilitate renaming of the folder and make it more logical. Transition will be from sdk to bluetooth.
    nrf5/boards: Adding support for SPI, I2C, ADC, and Temp in machine modules in micro:bit target. Also activating hal drivers for the peripherals.
    nrf5/sdk: Updating low frequency clock calibration from 4 seconds to 250 ms for stack enable when BLUETOOTH_LFCLK_RC is enabled.
    nrf5/boards: Updating nrf51822_aa_s110.ld to be more generic, leaving all RAM not used for stack, .bss and .data to the heap.
    nrf51: Removing stack section from startup file as it got added to the final hex file. Thanks dhylands for helping out.
    nrf5/boards: Adding BLUETOOTH_LFCLK_RC to CFLAGS in microbit s110 makefile.
    nrf5/sdk: Adding support for initializing the bluetooth stack using RC oscillator instead of crystal. If BLUETOOTH_LFCLK_RC is set in CFLAGS, this variant of softdevice enable will be activated.
    nrf5: Initialize repl_display_debugging_info in pyexec.c for cortex-m0 targets.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/sdk: Updating ringbuffer.h to use volatile variables for start and end.
    nrf5/sdk: Rename cccd_enable variable to m_cccd_enable in bluetooth le UART driver. Also made the variable volatile.
    nrf5/modules: Updating example in ubluepy header to use handle instead of data length upon reception of an event.
    nrf5/modules: Updating ubluepy peripheral to pass handle value to python event handler instead of data length. Data length can be derived from the bytearray structure.
    nrf5/sdk: Updating bluetooth le driver to handle SEC PARAM REQUEST by replying that pairing is not supported. Moving initialization of adv and tx in progress state variables to stack enable function.
    nrf5/modules: Enable ubluepy constants for CONNECT and DISCONNECT for other bluetooth stacks than s132.
    nrf5/sdk: Fixing unaligned access issues for nrf51 (cortex-m0) in bluetooth le driver

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/sdk: Removing SDK dependant BLE UART Service implementation

    The sdk_12.1.0 nrf52_ble.c implementation was dependent on SDK components.
    This has been replaced with the ble_uart.c implementation using a standalone
    bluetooth driver implementation without need of SDK components.

    Also, sdk.mk has been updated to not use a special linker script.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf52: Removing folder to not confuse which folder is in development

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/sdk: Removing ble_repl_linux.py

    Script does not really work very well with blocking char read and
    async ble notifications printing data when terminal stdout is blocked
    by readchar. Bluetooth UART profile implemented in ble_uart.c is
    now working with tralamazza's nus_console nodejs script.

    Ref: https://github.com/tralamazza/nus_console

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5: Add default config for MICROPY_PY_BLE_NUS (0)

    Disable Bluetooth UART to be used for REPL by default. Can be overridden
    in nrf5_sdk_conf.h. It is defined in  mpconfigport.h as it is connected to
    mphalport.c, where the config is used to determine whether default print
    functions should be using HW UART or Bluetooth UART.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/sdk: Add ble_uart.c to source list

    ble_uart.c implements UART Bluetooth service on top of the
    bluetooth stack driver api calls. Can be enabled to be compiled
    in by defining MICROPY_PY_BLE_NUS = 1 in nrf5_sdk_conf.h.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/sdk: Removing include of sdk_12.1.0's build.mk

    As no sources are needed from the SDK this build makefile
    can be deleted.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5: Force implementation of tx_str_cooked function if BLE NUS enabled.

    If BLE UART service has been enabled, the mp_hal_stdout_tx_strn_cooked
    is not defined by default anymore, and has to be implemented by the
    UART driver (in this case BLE).

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/sdk: Adding compiler guard around exchange MTU request event.

    As s110 is not having this event or function call to answer on a MTU
    exchange request, this is excluded for all other version than s132
    for now.

Bander Ajba <banderajba@macwan.local>
    minor documentation and extra tabs removal fixes

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/sdk: Updating BLE UART implementation by swapping TX and RX uuid and characterisitic handling. Removed dummy write delay of 10 ms.
    nrf5/sdk: Backing up progress in bluetooth le driver. Adding new gap and gatts handlers. Added handling of tx complete events when using notification, responding to MTU request, and setting of default connection parameters.

Bander Ajba <banderajba@macwan.local>
    fixed temp module to allow for instance support
    did required modification to merge the temperature sensore module

Dave Hylands <dhylands@gmail.com>
    Fix up Makefile dependencies

    I also didn't see any real reason for mkrules.mk to exist,
    so I merged the contents into Makefile.

    Now you can do:
    ```
    make BOARD=pca10028 clean
    make BOARD=pca10028 flash
    ```
    and it will work properly.

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5: Updating Makefile to use correct variable for setting directory of file to freeze as mpy.
    nrf5: Setting stack top in main.c. Thanks dhylands for pointing this out.
    nrf5/sdk: Backing up progress in BLE UART driver. Adding ringbuffer in order to poll bytes from recieved data in REPL main loop.
    nrf5/modules: Updating ubluepy example to print out gatts write events with data.
    nrf5/boards: Updating pca10028 bluetooth stack targets to have a MCU_SUB_VARIANT.

Bander Ajba <banderajba@macwan.local>
    added support for hardware temperature sensor

Glenn Ruben Bakke <glennbakke@gmail.com>
    nrf5/sdk: Adding macro based ringbuffer written by Philip Thrasher. source: https://github.com/pthrasher/c-generic-ring-buffer/blob/master/ringbuffer.h. Copyright noticed copied into the file, and file reviewed by Philip.
    nrf5/sdk: Updating bluetooth le driver to extract data length and pointer from the event structure upon gatts write operation.
    nrf5/modules: Expose ubluepy characteristic and peripheral types as external declaration in ublupy header.
    nrf5: Updating main to initialize bluetooth le uart module right before bluetooth REPL is started.
    nrf5/sdk: Updating bluetooth le uart implemenatation to block until cccd is written.
    nrf5/sdk: Backing up ubluepy version of ble uart service for Bluetooth LE REPL.
    nrf5/modules: Updating ubluepy example in header to align with bluetooth uart service characteristic's.
    nrf5/modules: Implementing characteristic write method. Possible to use write for both write and notifications.
    nrf5/sdk: Remaning bluetooth driver function ble_drv_attr_notif to *_notify.
    nrf5/modules: Adding props and attrs parameter to ubluepy characteristic constructor to override default values. Adding method for reading characteristic properties. Adding values to the local dict table that gives possibility to OR together a configuration of properties and attributes in the keyword argument during construction.
    nrf5/sdk: Adding parsing of characteristic properties and attributes (extra descriptions for the characteristic, for now cccd).
    nrf5/modules: Adding new members to ubluepy characteristic object, props and attrs. Adding enum typedefs for various properties and attributes.
    nrf5/modules: Syncing uart module code after upmerge with upstream master.
    nrf5/boards: Releasing more RAM for heap use in the nrf51 s110 linker script.
    nrf5/modules: Adding new gatts handler and registration of it during creation of a peripheral object. Also, added forwarding to python callback function (for now the same as for GAP).
    nrf5/modules: Adding new callback type in modubluepy for gatts events.
    nrf5/sdk: Adding support for setting gatts handler in the bluetooth le driver.
    nrf5/modules: Adding constant for CCCD uuid in ubluepy constants dict.
    nrf5: Adding ubluepy_descriptor.c into source list to compile.
    nrf5/modules: Adding template for ubluepy descriptor class implementation.
    nrf5/modules: Adding object structure for ubluepy descriptor.
    nrf5/sdk: Adding template functions for attribute read/write/notify in bluetooth le driver.
    nrf5/modules: Adding getCharacteristic method in ublupy service class. This function returns the characteristic with the given UUID if found, else None. The UUID parameter has to be of UUID class type, any other value, like strings will throw an exception.
    nrf5/modules: Updating method documentation in ubluepy peripheral and service.
    nrf5/modules: Adding new method, getCharacteristics(), in the ubluepy service class. The method returns the list of characteristics which has been added to the service instance.
    nrf5/modules: Updating method documentation in ubluepy peripheral class.
    nrf5/modules: Updating ubluepy service. Creating empty characteristic list in constructor. Appending characteristic to the list when added.
    nrf5/modules: Changed return in ubluepy addService() function to return mp_const_none instead of boolean.
    nrf5/modules: Correcting tabbing in ubluepy periheral impl.
    nrf5/modules: Updating ubluepy peripheral. Creating empty service list in constructor. Appending services to the list when added. Added new function for retreiving the service list; getServices().
    nrf5/modules: Adding new members in ubluepy peripheral and service object to keep track of child elements. Peripheral will have a list of services, and service will have a list of charactaristics.
    nrf5/modules: Removing connection handle from python gap event handler callback function.
    nrf5/modules: Updating ubluepy example in the header file with new function call to add service to a peripheral instance.
    nrf5/modules: Updating peripheral class to assign periopheral parent pointer to service's thats added. Also added a hook in the bluetooth le event handler to store the connection handle value, to prevent any services or characteristics to handle this value themselves.
    nrf5/modules: Updating service object to clear pointer to parent peripheral instance. Also assinging pointer to the service when adding a new characteristic.
    nrf5/modules: Updating print to also include peripheral's connection handle. Setting pointer to service parent instance to NULL.
    nrf5/modules: Correcting event id numbers for connect and disconnect event in ubluepy_constants.py
    nrf5/modules: Shuffle order of typedef in ubluepy header. Adding service pointer in characteristic object. Adding peripheral pointer to the service structure. When populated, the characteristic would get access to conn_handle and service handle through pointers. Also service would get access to peripheral instance.
    nrf5/modules: adding template functions for characteristic read and write.
    nrf5/modules: Adding constants class to ubluepy which will contain easy access to common bluetooth le numbers and definitions for the bluetooth stack.
    nrf5/modules: Updating example in ubluepy header with 16-bit uuid's commented out, to show usage.
    nrf5/sdk: Adding support for adding 16-bit uuid's in advertisment packet. The services in paramter list can mix 16-bit and 128-bit.
    nrf5/sdk: Updating sdk_common.mk with new filename of bluetooth le driver.
    nrf5: Updating all includes of softdevice.h to ble_drv.h
    nrf5/sdk: renaming softdevice.* to ble_drv.*
    nrf5/sdk: Renaming bluetooth driver functions to have ble_drv* prefix. Updating modules using it.
    nrf5/sdk: Enable ubluepy module if s110 bluetooth stack is enabled.
    nrf5/sdk: Updating bluetooth driver to only set periph and central count if s132 bluetooth stack. These parameters does not exist in older stacks.
    nrf5/modules: Updating bluetooth driver and ubluepy to use explicit gap event handler. Adding connection handle parameter to the gap handler from ubluepy. Resetting advertisment flag if connection event is recieved, in order to allow for subsequent advertisment if disconnected again. Example in ublupy header updated.
    nrf5: Adding target to flash bluetooth stack when using pyocd-flashtool.
    nrf5/modules: Guarding callback to python event handler before issue the call in case it is not set.
    nrf5/modules: Updating ubluepy example to turn led2 on and off when receiving connected and disconnect bluetooth event.
    nrf5/sdk: Updating bluetooth driver to have configurable logs.
    nrf5/modules: updating ubluepy and bluetooth driver to support python created event handler. Added registration of callback from ubluepy against the bluetooth driver and dispatching of events to the user supplied python function.
    nrf5/modules: Splitting includes to be inside or outside of the compile guard in ubluepy. This way, all micropython specific includes will be outside, and internal will be inside. This way, there will not be any dependency towards ubluepy headers if not compiled in.
    nrf5/modules: Adding two new functions to ubluepy peripheral class to set specific handlers for notificaitons and connection related events.
    nrf5: Set ubluepy to disabled by default in mpconfigport.h if not configured.
    nrf5/modules: Moving includes inside config defines to make non-ubluepy targets compile again.
    nrf5/modules: Adding 'withDelegate' function to peripheral class.
    nrf5/modules: Adding ubluepy delegate type to modubluepy globals table.
    nrf5: Adding ubluepy_delegate.c to list of source files to compile.
    nrf5/modules: Adding new object struct for delegate class and adding a delegate struct member to Peripheral class to bookeep callback object when event occurs.
    nrf5/modules: Adding template for ubluepy delegate class.
    nrf5/sdk: Fixing debug print in bluetooth driver to not use >>> prefix. Adding one more print for connection parameter update.
    nrf5/sdk: Correcting advertisment packet in bluetooth driver in order to make the device connectable.
    nrf5/sdk: Implementing simple event handler for bluetooth stack driver.
    nrf5/sdk: Disable all sdk components from being included in the build while implementing ubluepy, overlap in IRQ handler symbol.
    nrf5/modules: Shortening down the device name to be advertised in the example to make it fit with a 128-bit complete UUID.
    nrf5/modules: Bugfix in ubluepy_uuid_make_new. Used wrong buffer to register vendor specific uuid to the bluetooth stack.
    nrf5/sdk: Updating advertisment function in bluetooth le driver to add 128-bit complete service UUID provided in service list to the advertisment packet.
    nrf5/sdk: Updating advertisment funciton in bluetooth le driver to iterate through services passed in and calculate individiual uuid sizes.
    nrf5/modules: Updating advertisment method in peripheral class to memset advertisment structure. Also applying service list if set to the advertisment structure.
    nrf5/modules: Updating ubluepy module header usage example. Correcting enum for UUID types to start index from 1. Expanding advertisment data structure to also include service list members.
    nrf5/sdk: Adding static boolean for keeping track of whether advertisment is in progress in the bluetooth driver. Now, advertisment can be restarted with new data any time.
    nrf5/modules: Updating ubluepy peripheral class to use mp_const_none instead of MP_OBJ_NULL for unset values in advertisment method parameter list. Adding extraction of the service list in the advertisment method. The list is not yet handled.
    nrf5/modules: Adding a few examples in the modubluepy.h to get easier copy paste when implementing.
    nrf5/sdk: Successful device name advertisment. Added flags to advertisment packet and enable device name byte copy into the advertisment data.
    nrf5/modules: Turning ubluepy peripheral advertisment function into a keyword argument function so that it would be possible to set device name, service uuids, or manually constructed data payload.
    nrf5/sdk: Updating softdevice driver with function to set advertisment data and start advertisment. Does not apply device name yet. Work in progress.
    nrf5/modules: Adding new structure to ubluepy in order to pass advertisment data information to the bluetooth le stack.
    nrf5/modules: Adding function function to add characteristics to the ubluepy service. Enable function in service's local dict table.
    nrf5/modules: Adding function in bluetooth le driver to add characteristic to the bluetooth le stack.
    nrf5/modules: Adding more members to ublue characteristic object structure.
    nrf5/modules: Adding characteristic class to ubluepy globals table.
    nrf5/modules: Updating ubluepy characteristic implementation.
    nrf5/modules: Re-arranging includes in ubluepy_service.c
    nrf5/modules: Adding ubluepy charactaristic type struct.
    nrf5/modules: Updating ubluepy with more implementation in UUID and Service. Adding function in bluetooth le driver which adds services to the bluetooth stack. Making service take UUID object and Service type (primary/secondary) as constructor parameter in Service class.
    nrf5: Adding ubluepy to include path.
    nrf5/modules: Updating ubluepy UUID class constructor with some naive parsing of 128-bit UUIDs, and pass this to the softdevice driver for registration.
    nrf5/sdk: Adding new function to the softdevice handler driver to add vendor specific uuids and return an index to the entry back by reference.
    nrf5/modules: Updating ubluepy UUID class with constructor that can construct an object based on hex value of 16-bit or string of 16-bit prefixed with '0x'.
    nrf5/modules: Adding Peripheral, Service and UUID class to the ubluepy module globals table.
    nrf5/modules: Extending the implementation of Peripheral class in ubluepy.
    nrf5/modules: Extending the implementation of UUID class in ubluepy.
    nrf5/sdk: Adding configuration to enable the ubluepy peripheral class when using softdevice 132 from the SDK.
    nrf5: Adding ubluepy module to builtins if bluetooth stack is selected. Disable NUS profile by default. Adding source for ubluepy module into makefile to be included in build. The source is only linked if MICROPY_PY_UBLUEPY is set.
    nrf5: Aligning code after upmerge with master. Mostly FAT FS related updates. Not tested after merge.
    nrf5/modules: Adding new and print function to ubluepy peripheral class. Template functions only.
    nrf5/modules: Adding ubluepy UUID class template.
    nrf5/modules: Adding ubluepy characteristic class template.
    nrf5/modules: Adding missing #endif. Also adding to property templates to the lolcal dict.
    nrf5/modules: Adding ubluepy service class template.
    nrf5/modules: Updating ubluepy with class function placeholders.
    nrf5/modules: Renaming ble module folder to ubluepy.
    nrf5/modules: Adding new template file for ubluepy Peripheral class.
    nrf5/pyb: Moving pyb module into modules/pyb.
    nrf5/utime: Moving utime module into modules/utime.
    nrf5/uos: Moving uos module into modules/uos.
    nrf5/network: Moving network module into modules/network. Adding include path to network as its needed by the usocket module.
    nrf5/usocket: Moving usocket module into modules/usocket.
    nrf5/led: Moving led module into modules/machine.
    nrf5/led: Moving led module into modules/machine.
    nrf5/pwm: Moving pwm module into modules/machine.
    nrf5/rtc: Moving rtc module into modules/machine.
    nrf5/timer: Moving timer module into modules/machine.
    nrf5/pin: Moving pin module into modules/machine.
    nrf5/adc: Moving adc module into modules/machine.
    nrf5/i2c: Moving i2c module into modules/machine.
    nrf5/spi: Moving spi module into modules/machine.
    nrf5/uart: Moving uart module into modules/machine to start converting it into machine module and not pyb.
    nrf5/machine: Moving modmachine into modules/machine folder. Updating Makefile.
    nrf5/drivers: Renaming folder to modules.
    nrf5: Renaming python modules folder to freeze to give the folder its right meaning. The scripts put into this folder will be frozen.
    nrf5/drivers: Adding template for ubluepy module.
    nrf5/sdk: Adding compilation config whether to include BLE NUS implementation. Config found in sdk/nrf5_sdk_conf.h. NUS enabled for s132 targets by default.
    nrf5: Fallback to HW UART when not Bluetooth LE UART has been enabled.
    nrf5: Updating main.c to use MICROPY_PY_BLE_NUS as switch for regular uart initialization or bluetooth le uart initialization.
    nrf5/sdk: Adding work-in-progress script to connect to bluetooth le REPL using bluepy python module in linux.
    nrf5/boards: Updating board makefiles for s132 and s1xx target for pca10040 (nrf52832) by adding sub variant and device define to the makefiles.
    nrf5/examples: Updating ssd1306.py example with a comment describing proceedure on how to use the I2C variant of the driver.
    nrf5/hal: Line wrapping params in hal_spi.c to make it easier to read.
    nrf5/hal: Updating hal_twi.c tx implementation to a working state. STARTTX only issued once, before looping bytes.
    nrf5/examples: Updating ssd1306.py driver to work with i2c master write implementation.
    nrf5/hal: Updating hal_twi.c with tx function. Gets multiple startup bytes for each clocked byte.
    nrf5/hal: Updating hal_twi.c with tx function which partly works. Bytes are clocked out a bit out of order.
    nrf5/hal: Started implementation of hal_twi.c (non-DMA). Init function started.
    nrf5: Removing hal_twie.c from being compiled in.
    nrf5: Renaming configuration define in board configs using i2c from MICROPY_PY_MACHINE_HW_I2C to MICROPY_PY_MACHINE_I2C as the config is overlapping with the latter.
    nrf5: Renaming configuration define in board configs using i2c from MICROPY_PY_MACHINE_HW_I2C to MICROPY_PY_MACHINE_I2C as the config is overlapping with the latter.
    nrf5: Making i2c configurable from board configuration in case board has to sacrifice the i2c machine module.
    nrf5/boards: Activating all display drivers in pca10056 board.
    nrf5/boards: Updating s110 SD linker script for micro:bit.
    nrf5/i2c: Making use of hal twi tx function in writeto function.
    nrf5/hal: Updating twi driver with template functions.
    nrf5/hal: Updating TWI DMA implementation. Suspend not working on tx. Rx not implemented yet.
    nrf5/hal: Updating twi master tx with stop parameter.
    nrf5/hal: Adding i2c master functions for tx and rx in hal header.
    nrf5/hal: Adding new macros functions to mphalport.h which are used by extmod i2c machine module.
    nrf5/i2c: Adopting use of extmod/machine_i2c module as base for port's machine i2c module.
    nrf5/i2c: Backing up before trying out extmod i2c integration.
    nrf5: Adding i2c class to machine module globals table.
    nrf5: Updating main.c to initialize the i2c machine module if selected.
    nrf5/i2c: Updating i2c machine module with new constructor parameters to set scl and sda pins. Also updating print funciton to debug pin number and port number for the gpio set.
    nrf5/i2c: Updating i2c module to new new hal api, as master is initialized with its own init function.
    nrf5/hal: Adding members to TWI config struct, device address and scl/sda pin. Renaming and adding function such that twi slave and master has seperate init function. Started implementation of master init function for nrf52 using DMA (hal_twie.c).
    nrf5/i2c: Updating module to use new struct layout from hal_twi.h
    nrf5/hal: Updating TWI with frequency enums.
    nrf5/examples: Updating game file to use ssd1305 display driver.
    nrf5/drivers: Updating examples in comment in oled ssd1305 object to use the draw module.
    nrf5/hal: Fixing nrf51 SPI pin configuration to use pin member of struct.
    nrf5/boards: Updating boards to comply to new style of configuring pins for uart and spi.
    nrf5/boards: Updating board configuration for pca10056 (nrf52840) with new pin configuration scheme for SPI and UART.
    nrf5/hal: Updating hal QSPI header with define guard to filter out usage of undefined structures and names when compiling against non-52840 targets.
    nrf5/drivers: Updating display objects to use new SPI pin configuration in print function.
    nrf5/hal: Updating SPI DMA variant with more frequencies, and allowing rx and tx buffers to be NULL.
    nrf5/uart: Updating uart module to use new config hal config structure members for pins. Changing board config provided pins to use const pointers from generated pins instead of pin name.
    nrf5/hal: Updating uart hal to use pointers to Pin objects instead of uint pin and port number.
    nrf5/hal: Updating uart hal to use pointers to Pin objects instead of uint pin and port number.
    nrf5: Updating modmachine to add SPI in globals dict when MICROPY_PY_MACHINE_HW_SPI define is set. This diverge from regular MICROPY_PY_MACHINE_SPI config. Fixes missing SPI in the machine module after renaming port SPI enable define.
    nrf5: Updating main.c to enable SPI if MICROPY_PY_MACHINE_HW_SPI is set. This diverge from regular MICROPY_PY_MACHINE_SPI config. Fixing missing init of SPI after renaming port SPI enable define.
    nrf5/spi: Adding multiple instances of machine SPI depending on which chip is targeted (nrf51/nrf52832/nrf52540). Updating board config requirement to give variable name of const pointer to Pin instead of a Pin name. Adding support of giving keyword set mosi/miso/clk pin through constructor.
    nrf5/hal: Updating SPI hal with full list of SPI interfaces as lookup tables for all devices. Updating init struct to pass Pin instance pointers instead of uint pin number and ports.
    nrf5/drivers: Activate ssd1289 object in the display module.
    nrf5/boards: Adding ssd1289 lcd module in pca10040 (nrf52832) board.
    nrf5: Adding ssd1289 driver and python module into build.
    nrf5/drivers: Adding ssd1289 lcd tft driver and python module.
    nrf5/hal: Fixing compile issues in quad SPI driver.
    nrf5/hal: Updating Quad SPI hal driver.
    nrf5/hal: Aligning assignment in hal_adc.c
    nrf5/hal: Adding more types to quad SPI header.
    nrf5: Syncing code after upmerge with master.
    nrf5/hal: Updating clock frequency enums and lookup table for quad spi.
    nrf5/hal: Adding QSPI base and IRQ num in c-file.
    nrf5/hal: Adding hal template files for 32mhz Quad SPI peripheral.
    nrf5/drivers: Optimizing update_line in ili9341 driver a bit.
    nrf5/drivers: Adding space in macro.
    nrf5/drivers: Adding rgb16.h with macro to convert 5-6-5 rgb values into a 16-bit value.
    nrf5: Adding configuration defines for SSD1289 lcd driver.
    nrf5: Removing old framebuffer implementation.
    nrf5: Remove old framebuffer implementation from being included into the build.
    nrf5/drivers: Enable framebuffer and graphics module to be compiled in by default if display is selected into the compilation.
    nrf5/drivers: Updating epaper driver sld00200p to use new framebuffer.
    nrf5/drivers: Removing debug printf's from epaper display python module.
    nrf5/drivers: Updating python example in comment for ls0xxb7dxx display module.
    nrf5/boards: Enable LS0XXB7DXXX display module in pca10056 board config.
    nrf5/drivers: Adding ls0xxb7dxx to display module.
    nrf5: Adding ssd1305 and ls0xxb7dxxx (sharp memory display) drivers to be included in build.
    nrf5/drivers: Updating sharp memory display driver and python module to a working state.
    nrf5/spi: Adding posibility to configure SPI firstbit mode to LSB or MSB. Default is MSB. Updating python module and hal driver.
    nrf5/drivers: Tuning memory lcd driver a bit. Fixing small mp_printf usage bug.
    nrf5/drivers: Adding sharp memory display driver. For now hardcoded to 2.7 inch variant.
    nrf5: Adding configuration define for sharp memory display series in mpconfigport.h preparing for driver to be included.
    nrf5/boards: Enable ssd1305 oled display to be default for pca10028 for now.
    nrf5/drivers: Adding ssd1305 oled driver. This is very similar to ssd1306, so a merge will happen soon.
    nrf5/drivers: Adding ssd1305 oled driver. This is very similar to ssd1306, so a merge will happen soon.
    nrf5/drivers: Updating ili9341 display object to use new framebuffer.
    nrf5/drivers: Updating ili9341 driver to use new framebuffer, and removing the compressed param from the line update function.
    nrf5: Adding micropython mem_info() to be included in mpconfigport.h.
    nrf5/drivers: Adding example in comment on how to use the ili9341 driver with nrf51/pca10028 board.
    nrf5/examples: Adding a extra global variable to the game which breaks the game execution.
    nrf5/examples: Adding 2048 game using OLED SSD1306 128x64 display and analog joystick.
    nrf52/boards: Increasing the stack and heap in pca10056 (nrf52840) target from 2k/32k to 40k/128k to debug some buffer problems when running large frozen python programs.
    nrf51/boards: Increasing heap and stack size in the pca10028 board.
    nrf51/boards: Enable display driver and oled ssd1306 (also bringing in framebuffer and graphics module) into the pca10028 target.
    nrf5: Enable display/framebuffer.c and graphic/draw.c into the build.
    nrf5/drivers: Adding defines to exclude implementation of draw.c module if not enabled.
    nrf5: Adding configuration defines for the graphics module (draw) and enabling this by default if using oled ssd1306 display which has a compatible python object definition.
    nrf5/drivers: Adding draw module with circle, rectangle and text functions. Can be used by any display object which implements display callback functions.
    nrf5/drivers: Moving oled ssd1306 driver over to new framebuffer layout. Moving some of the draw algorithms into the object in order to optimize the speed on writing data from the framebuffer.
    nrf5/hal: Removing stdio.h include in adce.c which were used for debugging.
    nrf5/boards: Adding ADC pins in pins.csv file for pca10056 (nrf52840).
    nrf52/hal: Adding adce (saadc) implementation for nrf52 to sample values on a channel.
    nrf5/adc: Adding all 8 instances to adc python module. Valid for both nrf51 and nrf52.
    nrf5/drivers: Adding new structures to moddisplay. Adding a display_t structure to cast all other displays into, to retrieve function pointer table of a display object type. Also adding the function table structure which needs to be filled by any display object.
    nrf5/drivers: Adding a new framebuffer implementation to replace the mono_fb.
    nrf5/boards: Updating pca10028 (nrf51) board config. Enable SPI machine module. Enable flow control on UART. Correcting SPI CLK, MISO and MOSI pin assignments.
    nrf5/adc: Updating adc module and hal with a new interface. No need for keeping peripheral base address in structure when there is only one peripheral (nrf51).
    nrf5/rtc: Correcting RTC1 base error in rtc template.
    nrf5: Adding adc module to machine module.
    nrf5/hal: Updating hal_adc* with more api functions.
    nrf5/adc: Adding updated adc module.
    nrf5/boards: Enabling ADCE (SAADC) variant of adc hal to match hardware on nrf52 series.
    nrf5/boards: Adding ADC config to pca10028 pins.csv
    nrf5/boards: Tuning linker script for nrf51822_ac to get some more heap.
    nrf5: Updating nrf51_af.csv to reflect pins having ADC on the chip.
    nrf5/boards: Updating make-pins.py to generate ADC pin settings from board pins.csv.
    nrf5/hal: Updating hal_adc header to use correct Type for ADC on nrf52.
    nrf5/adc: Updating module to compile.
    nrf5/boards: Enable ADC machine module for pca10028, pca10040 and pca10056.
    nrf5: Add add ADC machine module into build.
    nrf5: Adding new config for ADC module in mpconfigport.h.
    nrf5/adc: Adding ADC machine module base files. Implementation missing.
    nrf5: Adding hal_adc* into build.
    nrf5/boards: Enable ADC/SAADC hal for pca10028 (nrf51), pca10040 (nrf52832) and pca10056 (nrf52840) boards.
    nrf5/hal: Removing chip variant guard for hal_adc*, and let this be up to the hal conf file to not mess up at the moment.
    nrf5: Add i2c.c, i2c machine module, and hal_twi into build.
    nrf5/boards: Enable hardware I2C machine module for pca10028 (nrf51), pca10040 (nrf52832) and pca10056 (nrf52840) boards.
    nrf5/boards: Enable TWI hal for pca10028 (nrf51), pca10040 (nrf52832) and pca10056 (nrf52840) boards.
    nrf5/i2c: Adding files for hardware i2c machine module and adding config param in mpconfigport to disable by default.
    nrf5/hal: Adding template files for TWI (i2c) hal.
    nrf5/hal: Adding template files for ADC hal.
    nrf5/drivers: Correcting tabbing in oled ssd1306 c-module.
    nrf5/boards: Enable SSD1306 spi driver for pca10040 (nrf52832) and pca10056 (nrf52840) boards.
    nrf5/drivers: Adding SSD1306 SPI display driver. Not complete, but can do fill screen operation atm.
    nrf5/drivers: Adding epaper display example script in comment for pca10056 / nrf52840 in the display module.
    nrf5/boards: Enable PWM module and epaper display module in pca10056 board config.
    nrf5/drivers: Adding some more delay on bootup to ensure display recovers after reset.
    nrf5/examples: Adding copy of ssd1306.py driver hardcoded with SPI and Pin assignments.
    nrf5/drivers: Updating ili9341 driver to set CS high after cmd or data write.
    nrf5/drivers: Extending print function for ili9341 object to also print out gpio port of the SPI pins.
    nrf5/boards: Giving a bit more heap for nrf52840 linker script.
    nrf5/drivers: bugfix of the sld00200p driver. Stopping the pwm instead of restarting it. Shuffle placement of static function.
    nrf5/drivers: Correcting object print function to also include port number of the SPI pins. Correcting usage script example in comment.
    nrf5/drivers: Adding an initial script as comment for ili9341 on nrf52840/pca10056 in the driver module comment.
    nrf5/examples: Removing tabs from epaper python script usage comment, so that it is easier to copy paste.
    nrf5/hal: Refining if-defs to set up GPIO base pointers in mphalport.h
    nrf5/devices: Removing define which clutters ported modules from nrf.h.
    nrf5/boards: Enabling spi in pca10056 hal config.
    nrf5/boards: Enabling ili9341 display drivers and to be compiled in on pca10056 target board. Updating SPI configuration with gpio port.
    nrf5/boards: Enabling display drivers/spi/pwm to be compiled in on pca10040 target board. Updating SPI configuration with gpio port.
    nrf5/hal: Correcting SPI psel port position define name to the one defined in nrf52840_bitfields.h
    nrf5/led: Hardcoding GPIO port 0 for Led module for now.
    nrf5/hal: Changing import of nrf52 includes in hal_uarte.c to not be explicit. Now only nrf.h is included.
    nrf5: Updating pin, spi and uart to use port configuration for gpio pins. Update pin generation script, macros for PIN generation. Updating macros for setting pin values adding new port parameter to select the correct GPIO peripheral port.
    nrf5/boards: Disable SPI hal from pca10001 board.
    nrf5/boards: Disable SPI/Timer/RTC hal from microbit board.
    nrf5: Exclude import of pwm.h in modmachine.c if MICROPY_PY_MACHINE_PWM is not set, as nrf51 does not yet have this module yet.
    nrf5: Exclude import of pwm.h in main.c if MICROPY_PY_MACHINE_PWM is not set, as nrf51 does not yet have this module yet.
    nrf5/drivers: Block nrf51 from compiling epaper_sld00200p for the moment. There is no soft-pwm present yet, and including pwm would just make compilation fail now.
    nrf5/hal: Making nrf51/2_hal.h go trough nrf.h to find bitfields and other mcu headers instead of explicit include.
    nrf5/boards: Adding more pins to nrf52840 / pca10056 target board.
    nrf5/pin: Adding more pins to nrf52_af.csv file for nrf52840. Port '1' will be prefixed 'B'.
    nrf5/pin: Adding PORT_B to Pin port enum to reflect gpio port 1 on nrf52840.
    nrf5/boards: Updating all board configs with gpio port configuration for uart/spi pins. Leds still not defined by gpio port.
    nrf5/devices: Updating header files for nrf51 and nrf52. Adding headers for nrf52840.
    nrf5: Updating to use new nrfjprog in makefile. Needed for nrf52840 targets. Changed from pinreset to debug reset.
    nrf5/boards: Updating makefiles to use system.c files based on sub-variant of mcu.
    nrf5/devices: Renaming system.c files for nrf51 and nrf52 to be more explicit on which version of chip they are referring to.
    nrf5/drivers: Backing up working epaper display (sld00200p shield) driver before refactoring.
    nrf5/drivers: Fixing parenthesis in ILI9341 __str__ print function.
    nrf5/pwm: Moving out object types to header file so that it can be resused by other modules.
    nrf5/drivers: Updating a working version of ili9341 module and driver. About 10 times faster than python implementation to update a full screen.
    nrf5: Started to split up lcd_mono_fb such that it can be used as a c-library and python module with the same implementaton.
    nrf5/hal: Adding include of stdbool.h in hal_spi.h as it is used by the header.
    nrf5/drivers: Adding preliminary file for ili9341 lcd driver.
    nrf5/hal: Adding support for NULL pointer to be set if no rx buffer is of interest in SPI rx_tx function.
    nrf5: Adding ili9341 class and driver files in Makefile to be included in build.
    nrf5/drivers: Adding template files for upcomming ili9341 driver.
    nrf5/drivers: Adding lcd ili9341 object implementation to make a new instance. print implemented for debugging pins assigned to the display driver. No interaction yet with the hal driver.
    nrf5/drivers: Adding ILI9341 class to the display global dict.
    nrf5/boards: Changing tft lcd display name from SLD10261P to ILI9341 in pca10040 board configuration.
    nrf5: Moving out mp_obj_framebuf_t to the header file to get access to it from other modules. Exposing helper function to make new framebuffer object from c-code.
    nrf5: Trimming down display configurations in mpconfigport.h
    nrf5/spi: Moving *_spi_obj_t out of implementation file to header. Setting hal init structure in the object structure instead of making a temp struct to configure hal. This would enable lookup of the spi settings later.
    nrf5: Removing epaper, lcd and oled modules from Makefile source list as the display modules has been moved to display root folder.
    nrf5/drivers: Removing one level of module hierarchy in display drivers. Removed epaper, lcd and oled modules, making import of classes happen directly from display module.
    nrf5/drivers: Creating python object implementation (locals) to be used for epaper sld00200p.
    nrf5: Moving color defines in lcd_mono_fb from .c to .h so that it can be reused by other modules.
    nrf5: Enable MICROPY_FINALISER and REPL_AUTO_INDENT.
    nrf5/drivers: Adding requirement for nrf52 target on the epaper sld00200p for now. There is no ported PWM module for nrf51 target yet. Hence, soft PWM for nrf51 needs to be added.
    nrf5: Adding suffix to _obj on epaper_sld00200p module.
    nrf5: Correcting define name for epaper sld00200p, missing 0.
    nrf5/drivers: Enable EPAPER_SLD00200P in epaper module globals table.
    nrf5/drivers: Adding missing file for epaper module / driver.
    nrf5/modules: Moving python scripts to examples folder to free up some flash space on constrained targets as modules folder is used as frozen files folder.
    nrf5/boards: Enable display module to be built in. Also adding one epaper display and one tft lcd to test display module when porting the corresponding drivers to micropython.
    nrf5/drivers: Removing external decleration of display module in header.
    nrf5/drivers: Renaming display module to mp_module prefix as it is going to be inbuilt. ifdef'ing all submodules based on type of display configured through mpconfigport.h
    nrf5/drivers: Adding ifdef sourrounding the implementation of module. Configurable with mpconfigport.h.
    nrf5: Adding display module to port builtins.
    nrf5/drivers: Adding driver files to makefile. Implicitly adding display module.
    nrf5/drivers: Adding template for c-implementation of lcd, epaper and oled drivers as a display module.
    nrf5/modules: Updating to correct name of display in epaper driver.
    nrf5/modules: Adding python epaper display driver. Currently colors have been reversed.
    nrf5/hal: Fixing bug in mp_hal_pin_read in mphalport.h which tried to read an OUT register. Corrected to read the IN register.
    nrf5: Adding sleep_us to modutime.c and exposing mp_hal_delay_us in hal/hal_time.h
    nrf5/lcd: Updating framebuffer with double buffer for epaper displays. Moving statics into instance struct. Adding new function to refresh using old buffer, such that epaper can get a cleaner image after update.
    nrf5/boards: Adding initial microbit build files and board configurations.
    nrf5: Makefile option to set FLASHER when doing flash target. If defined in board .mk file, this will be used, else nrfjprog will be used by default (segger). This opens up for using pyocd flashtool and still run 'make flash'.
    nrf5/boards: Updating pca10028 board config to not define RTS/CTS pins when HWFC is set to 0.
    nrf5/uart: Making compile time exclusion of RTS/CTS if not defined to use flow control by board configuration.
    nrf5/spi: Removing automatic chip select (NSS) in hal_spi.c. Also removing configuration of this pin as it is confusing to pass it if not used. User of SPI has to set the NSS/CS itself.
    nrf5/modules: Updating PWM test python script to cope with new api.
    nrf5/hal: Fixing some issues in PWM stop function. Doing a proper stop and disable the peripheral.
    nrf5/pwm: Implementing start and stop call to hal on init and deinit as hal_init does not longer start the PWM automatically.
    nrf5/hal: Exposing two new PWM hal functions start() and stop().
    nrf5/hal: Moving enablement of PWM task from init to a start function. Also activating code in stop function to stop the PWM.
    nrf5/modules: Adding licence text on seeedstudio tft shield python modules.
    nrf52/boards: Tuning linker script for nrf52832 when using iot softdevice. Need more heap for LCD framebuffer.
    nrf5/lcd: Adding lcd_mono_fb.c to source list in the makefile. Adding define in implementation to de-select the file from being included. Adding module to PORT BUILTIN in mpconfigport.h
    nrf52/sdk: Correcting path to iot softdevice if SDK is enabled.
    nrf5: Adding help text for CTRL-D (soft reset) and and CTRL-E (paste mode) in help.c
    nrf5: Adding handling of CTRL+D to reset chip in main.c. Call to NVIC System Reset is issued.
    nrf5/lcd: Correcting indention (tabs with space) in framebuffer module source and header.
    nrf5/lcd: Changing framebuffer to use petme128 8x8 font. This is vertical font. Code modified to flip and mirror the font when rendering a character. Adding copy of the font from stmhal.
    nrf5/modules: Adding new driver for seeedstudio tft shield v2, using new framebuffer module which handles faster update on single lines, callback driven write on each line which is touched in the framebuffer.
    nrf5/lcd: Adding header file for lcd_mono_fb.
    nrf5/lcd: Updating brackets in framebuffer module.
    nrf5/lcd: Renaming variable name from m_ to p_
    nrf5/lcd: Cleaning up a bit in lcd framebuffer.
    nrf5/lcd: Adding work in progress monochrome lcd framebuffer driver which only updates modified (dirty) display lines.
    nrf5/modules: Updating pulse test to set output direction on the LED pin used in the test.
    nrf5/modules: Updating seeedstudio tft lcd driver to render using already existing framebuffer implementation.
    nrf5/boards: Bouncing up heap to 32k  on pca10040 to allow for application to allocate 9600bytes+ framebuffer when using LCD screen (240x320).
    nrf5/modules: Adding a function to get access to the SD card flash drive on the seeedstudio tft shield.
    nrf5/modules: Adding new python script to initialize and clear the display on Seeedstudio 2.8 TFT Touch Shield v2.
    nrf5/modules: Updating documentation on sdcard.py copy to use new params in the example description
    nrf5/modules: Updating mountsd, SD card test script with new params.
    nrf5/pin: Merging input and output pin configuration to one comon function. Adding implementation in Pin class to be able to configure mode and pull. Updating drivers which uses gpio pin configuration to use new function parameters.
    nrf5: Adding rtc.c which implements the machine rtc module to be included in build.
    nrf5/boards: Enable MICROPY_PY_MACHINE_RTC in pca10028 (nrf51) and pca10040 (nrf52) targets.
    nrf5/hal: Adding empty init function in hal_rtc.c
    nrf5/hal: Adding structures and init function prototype to hal_rtc.h.
    nrf5: Setting MICROPY_PY_MACHINE_RTC to disabled by default (during development) in mpconfigport.h. This can be overriden by board config.
    nrf5/rtc: Adding skeleton for machine rtc module for nrf51/52.
    nrf5: Adding timer.c which implements the machine timer module to be included in build.
    nrf5: Setting MICROPY_PY_MACHINE_TIMER to disabled by default (during development) in mpconfigport.h. This can be overriden by board config.
    nrf5/boards: Enable MICROPY_PY_MACHINE_TIMER in pca10028 (nrf51) and pca10040 (nrf52) targets.
    nrf5: Adding initialization of timer module if enabled by MICROPY_PY_MACHINE_TIMER.
    nrf5/timer: Adding initializaton of id field for Timer_HandleTypeDef's. Adding simple print function. Adding make_new function. Enabling the functions in machine_timer_type.
    nrf5/hal: Adding empty init function in hal_timer.c
    nrf5/hal: Adding structures and init function prototype to hal_timer.h.
    nrf5/timer: Adding skeleton for machine timer module for nrf51/52.
    nrf/boards: Adding RTC and TIMER hal to be linked in when implemented. Enable one board for nrf51 and one for nrf52 for ease of debugging when implementing the hal.
    nrf5: Adding rtc and timer hal to Makefile.
    nrf5/hal: Adding skeleton files for rtc and timer driver.
    nrf5/modules: Updating pulse example to work with Pin object instead of hard coded pin number.
    nrf5/pwm: Switching from hardcoded pin number to Pin object type as input to the new() function. Also changing the parameter from kw to arg.
    nrf5/modules: updating test python file with correct PWM frequency type.
    nrf5/modules: Adding a python test file with function to dim a specific led (17).
    nrf5/pwm: Updating pwm module with freq function which re-initilises the PWM instance such that new frequency will be applied.
    nrf5/pwm: Initializing pwm instances in main.c if enabled by MICROPY_PY_MACHINE_PWM.
    nrf5/pwm: Adding api to initialize pwm instances.
    nrf5: Updating mpconfigport.h to set a default for PWM machine module to be enabled by default, if not disabled in a board config. Refactoring order in the file.
    nrf52: Set names to be used on PWM0-2 in board config. For nrf52840, the PWM3 is excluded as repo does not have latest headers to reflect this yet. Bump up to be done soon.
    nrf52: Enable PWM HAL for both pca10040 (nrf52832) and pca10056 (nrf52840).
    nrf51: Disable MICROPY_PY_MACHINE_PWM for now in all nrf51 target boards as sw impl. is not yet included in the repo.
    nrf5: Only enable hal_pwm.c if nrf52 target as nrf51 must have a sw implementation.
    nrf5/pwm: Adding pwm to modmachine.c
    nrf5/hal: Updating PWM header file with init function prototype. Also added PWM_HandleTypeDef structure that can be used in the pwm python module.
    nrf5/pwm: Updating PWM dict table to have freq and duty function. Also added creation of default objects based on PWM name set in board config. Adding ifdef surrounding the import of hal_pwm.h as this module might be used by software implmentation of PWM later.
    nrf5/pwm: Removing include of hal_pwm.h as pwm.c might not use a hal, but sw implementation.
    nrf5: Updating makefile to compile in pwm.c and hal_pwm.c
    nrf5/boards: Adding config flag for HAL_PWM in pca10040 and pca10056.
    nrf5: Adding pwm work in progress machine PWM module.
    nrf5/hal: Starting implementation of PWM hal to be used by PWM python module later.
    nrf5: Adding initial board files for pca10056. The files are not complete (only 32 pins are added for now). UART REPL, leds, and Pins (up to 31) are functional.
    nrf5: Updating comment in linker script for nrf52832 and nrf52840 to distinguish between the two nrf52 variants.
    nrf5: Adding new linker script for nrf52840.
    nrf5: updating flash size comment in nrf52832 linker script.
    lib/netutils: Adding some basic parsing and formating of ipv6 address strings. Only working with full length ipv6 strings. Short forms not supported at the moment (for example FE80::1, needs to be expressed as FE80:0000:0000:0000:0000:0000:0000:0001).
    nrf5: Updating port with new content. SPI, SDcard (trough sdcard.py), Pin, and machine module. Also adding some basic modules depending on SDK and bluetooth stack from nordic semiconductor. NUS is module copied from original port by tralamazza, and new basic module for 6lowpan over BLE which can be used by modnetwork and modusocket. Basic BLE module to enable bluetooth stack and start a eddystone advertisment is kept, and still works without SDK, even if in the SDK folder (its placed there as it needs bluetooth stack from an SDK).
    Renaming softdevice folder to sdk.
    Removing unused 'NRF_SOFTDEVICE' compile variable from all board .mk softdevice targets.
    Fixing main Makefile CFLAGS concatination error when setting softdevice param

Daniel Tralamazza <daniel@tralamazza.com>
    ignore default build folders
    move softdevice (SD) specific code from the main Makefile to their respective board/SD makefiles

Glenn Ruben Bakke <glennbakke@gmail.com>
    Updating Makefile by removing unwanted LDFLAG setting cpu to cortex-m0 in all cases.
    Updating modble.c method doc of address_print() to reflect the actual function name.
    Base support for nrf51 and nrf52 base without depending on SDK. SoftDevice usage optional.

Daniel Tralamazza <daniel@tralamazza.com>
    remove dup declaration mp_builtin_open_obj
    init

Date of "init" commit: Wed Jun 22 22:34:11 2016 +0200

ports/nrf/.gitignore

@@ -0,0 +1,8 @@
+# Nordic files
+#####################
+drivers/bluetooth/s1*/
+
+# Build files
+#####################
+build-*/
+

ports/nrf/Makefile

@@ -0,0 +1,292 @@
+# Select the board to build for: if not given on the command line,
+# then default to pca10040.
+BOARD ?= pca10040
+ifeq ($(wildcard boards/$(BOARD)/.),)
+$(error Invalid BOARD specified)
+endif
+
+# If SoftDevice is selected, try to use that one.
+SD ?=
+SD_LOWER = $(shell echo $(SD) | tr '[:upper:]' '[:lower:]')
+
+# TODO: Verify that it is a valid target.
+
+
+ifeq ($(SD), )
+	# If the build directory is not given, make it reflect the board name.
+	BUILD ?= build-$(BOARD)
+	include ../py/mkenv.mk
+	include boards/$(BOARD)/mpconfigboard.mk
+else
+	# If the build directory is not given, make it reflect the board name.
+	BUILD ?= build-$(BOARD)-$(SD_LOWER)
+	include ../py/mkenv.mk
+	include boards/$(BOARD)/mpconfigboard_$(SD_LOWER).mk
+
+	include drivers/bluetooth/bluetooth_common.mk
+endif
+
+# qstr definitions (must come before including py.mk)
+QSTR_DEFS = qstrdefsport.h $(BUILD)/pins_qstr.h
+
+FROZEN_MPY_DIR = freeze
+
+# include py core make definitions
+include ../py/py.mk
+
+
+FATFS_DIR = lib/oofatfs
+MPY_CROSS = ../mpy-cross/mpy-cross
+MPY_TOOL = ../tools/mpy-tool.py
+
+CROSS_COMPILE = arm-none-eabi-
+
+MCU_VARIANT_UPPER = $(shell echo $(MCU_VARIANT) | tr '[:lower:]' '[:upper:]')
+
+INC += -I.
+INC += -I..
+INC += -I$(BUILD)
+INC += -I./../lib/cmsis/inc
+INC += -I./device
+INC += -I./device/$(MCU_VARIANT)
+INC += -I./hal
+INC += -I./hal/$(MCU_VARIANT)
+INC += -I./modules/machine
+INC += -I./modules/ubluepy
+INC += -I./modules/music
+INC += -I./modules/random
+INC += -I./modules/ble
+INC += -I../lib/mp-readline
+INC += -I./drivers/bluetooth
+INC += -I./drivers
+
+NRF_DEFINES += -D$(MCU_VARIANT_UPPER)
+NRF_DEFINES += -DCONFIG_GPIO_AS_PINRESET
+
+CFLAGS_CORTEX_M = -mthumb -mabi=aapcs -fsingle-precision-constant -Wdouble-promotion
+
+CFLAGS_MCU_m4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections
+
+CFLAGS_MCU_m0 = $(CFLAGS_CORTEX_M) --short-enums -mtune=cortex-m0 -mcpu=cortex-m0 -mfloat-abi=soft -fno-builtin
+
+
+CFLAGS += $(CFLAGS_MCU_$(MCU_SERIES)) 
+CFLAGS += $(INC) -Wall -Werror -ansi -std=gnu99 -nostdlib $(COPT) $(NRF_DEFINES) $(CFLAGS_MOD)
+CFLAGS += -fno-strict-aliasing
+CFLAGS += -fstack-usage
+CFLAGS += -Iboards/$(BOARD)
+CFLAGS += -DNRF5_HAL_H='<$(MCU_VARIANT)_hal.h>'
+
+LDFLAGS = $(CFLAGS)
+LDFLAGS += -Xlinker -Map=$(@:.elf=.map)
+LDFLAGS += -mthumb -mabi=aapcs -T $(LD_FILE) -L boards/
+
+#Debugging/Optimization
+ifeq ($(DEBUG), 1)
+#ASMFLAGS += -g -gtabs+
+CFLAGS += -O0 -ggdb
+LDFLAGS += -O0
+else
+CFLAGS += -Os -DNDEBUG
+LDFLAGS += -Os
+endif
+
+LIBS = \
+
+ifeq ($(MCU_VARIANT), nrf52)
+LIBM_FILE_NAME   = $(shell $(CC) $(CFLAGS) -print-file-name=libm.a)
+LIBC_FILE_NAME   = $(shell $(CC) $(CFLAGS) -print-file-name=libc.a)
+LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
+
+LIBS += -L $(dir $(LIBM_FILE_NAME)) -lm
+LIBS += -L $(dir $(LIBC_FILE_NAME)) -lc
+LIBS += -L $(dir $(LIBGCC_FILE_NAME)) -lgcc
+endif
+
+SRC_LIB = $(addprefix lib/,\
+	libc/string0.c \
+	mp-readline/readline.c \
+	utils/pyexec.c \
+	timeutils/timeutils.c \
+	oofatfs/ff.c \
+	oofatfs/option/unicode.c \
+	)
+
+SRC_HAL = $(addprefix hal/,\
+	hal_uart.c \
+	hal_uarte.c \
+	hal_spi.c \
+	hal_spie.c \
+	hal_time.c \
+	hal_rtc.c \
+	hal_timer.c \
+	hal_twi.c \
+	hal_adc.c \
+	hal_adce.c \
+	hal_temp.c \
+	hal_gpio.c \
+	hal_rng.c \
+	)
+
+ifeq ($(MCU_VARIANT), nrf52)
+SRC_HAL += $(addprefix hal/,\
+	hal_pwm.c \
+	)
+endif
+
+SRC_C += \
+	main.c \
+	mphalport.c \
+	help.c \
+	gccollect.c \
+	pin_named_pins.c \
+	fatfs_port.c \
+	drivers/softpwm.c \
+	drivers/ticker.c \
+	drivers/bluetooth/ble_drv.c \
+	drivers/bluetooth/ble_uart.c \
+
+DRIVERS_SRC_C += $(addprefix modules/,\
+	machine/modmachine.c \
+	machine/uart.c \
+	machine/spi.c \
+	machine/i2c.c \
+	machine/adc.c \
+	machine/pin.c \
+	machine/timer.c \
+	machine/rtc.c \
+	machine/pwm.c \
+	machine/led.c \
+	machine/temp.c \
+	uos/moduos.c \
+	utime/modutime.c \
+	pyb/modpyb.c \
+	ubluepy/modubluepy.c \
+	ubluepy/ubluepy_peripheral.c \
+	ubluepy/ubluepy_service.c \
+	ubluepy/ubluepy_characteristic.c \
+	ubluepy/ubluepy_uuid.c \
+	ubluepy/ubluepy_delegate.c \
+	ubluepy/ubluepy_constants.c \
+	ubluepy/ubluepy_descriptor.c \
+	ubluepy/ubluepy_scanner.c \
+	ubluepy/ubluepy_scan_entry.c \
+	music/modmusic.c \
+	music/musictunes.c \
+	ble/modble.c \
+	random/modrandom.c \
+	)
+
+SRC_C += \
+	device/$(MCU_VARIANT)/system_$(MCU_SUB_VARIANT).c \
+	device/$(MCU_VARIANT)/startup_$(MCU_SUB_VARIANT).c \
+
+FROZEN_MPY_PY_FILES := $(shell find -L $(FROZEN_MPY_DIR) -type f -name '*.py')
+FROZEN_MPY_MPY_FILES := $(addprefix $(BUILD)/,$(FROZEN_MPY_PY_FILES:.py=.mpy))
+
+OBJ += $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(SRC_LIB:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(SRC_HAL:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
+OBJ += $(BUILD)/pins_gen.o
+
+$(BUILD)/$(FATFS_DIR)/ff.o: COPT += -Os
+$(filter $(PY_BUILD)/../extmod/vfs_fat_%.o, $(PY_O)): COPT += -Os
+
+.phony: all flash sd binary hex
+
+all: binary hex
+
+OUTPUT_FILENAME = firmware
+
+## Create binary .bin file from the .out file
+binary: $(BUILD)/$(OUTPUT_FILENAME).bin
+
+$(BUILD)/$(OUTPUT_FILENAME).bin: $(BUILD)/$(OUTPUT_FILENAME).elf
+	$(OBJCOPY) -O binary $< $@
+
+## Create binary .hex file from the .out file
+hex: $(BUILD)/$(OUTPUT_FILENAME).hex
+
+$(BUILD)/$(OUTPUT_FILENAME).hex: $(BUILD)/$(OUTPUT_FILENAME).elf
+	$(OBJCOPY) -O ihex $< $@
+
+FLASHER ?=
+
+ifeq ($(FLASHER),)
+
+flash: $(BUILD)/$(OUTPUT_FILENAME).hex
+	nrfjprog --program $< --sectorerase -f $(MCU_VARIANT)
+	nrfjprog --reset -f $(MCU_VARIANT)
+
+sd: $(BUILD)/$(OUTPUT_FILENAME).hex
+	nrfjprog --eraseall -f $(MCU_VARIANT)
+	nrfjprog --program $(SOFTDEV_HEX) -f $(MCU_VARIANT)
+	nrfjprog --program $< --sectorerase -f $(MCU_VARIANT)
+	nrfjprog --reset -f $(MCU_VARIANT)
+
+else ifeq ($(FLASHER), pyocd)
+
+flash: $(BUILD)/$(OUTPUT_FILENAME).hex
+	pyocd-flashtool -t $(MCU_VARIANT) $<
+
+sd: $(BUILD)/$(OUTPUT_FILENAME).hex
+	pyocd-flashtool -t $(MCU_VARIANT) --chip_erase
+	pyocd-flashtool -t $(MCU_VARIANT) $(SOFTDEV_HEX)
+	pyocd-flashtool -t $(MCU_VARIANT) $<
+
+endif
+
+$(BUILD)/$(OUTPUT_FILENAME).elf: $(OBJ)
+	$(ECHO) "LINK $@"
+	$(Q)$(CC) $(LDFLAGS) -o $@ $(OBJ) $(LIBS)
+	$(Q)$(SIZE) $@
+
+# List of sources for qstr extraction
+SRC_QSTR += $(SRC_C) $(SRC_MOD) $(SRC_LIB) $(DRIVERS_SRC_C)
+
+# Append any auto-generated sources that are needed by sources listed in
+# SRC_QSTR
+SRC_QSTR_AUTO_DEPS +=
+
+# Making OBJ use an order-only depenedency on the generated pins.h file
+# has the side effect of making the pins.h file before we actually compile
+# any of the objects. The normal dependency generation will deal with the
+# case when pins.h is modified. But when it doesn't exist, we don't know
+# which source files might need it.
+$(OBJ): | $(HEADER_BUILD)/pins.h
+
+# Use a pattern rule here so that make will only call make-pins.py once to make
+# both pins_$(BOARD).c and pins.h
+$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qstr.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
+	$(ECHO) "Create $@"
+	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
+
+$(BUILD)/pins_gen.o: $(BUILD)/pins_gen.c
+	$(call compile_c)
+
+MAKE_PINS = boards/make-pins.py
+BOARD_PINS = boards/$(BOARD)/pins.csv
+AF_FILE = $(MCU_VARIANT)_af.csv
+PREFIX_FILE = boards/$(MCU_VARIANT)_prefix.c
+GEN_PINS_SRC = $(BUILD)/pins_gen.c
+GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
+GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
+GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
+GEN_PINS_AF_PY = $(BUILD)/pins_af.py
+
+ifneq ($(FROZEN_DIR),)
+# To use frozen source modules, put your .py files in a subdirectory (eg scripts/)
+# and then invoke make with FROZEN_DIR=scripts (be sure to build from scratch).
+CFLAGS += -DMICROPY_MODULE_FROZEN_STR
+endif
+
+ifneq ($(FROZEN_MPY_DIR),)
+# To use frozen bytecode, put your .py files in a subdirectory (eg frozen/) and
+# then invoke make with FROZEN_MPY_DIR=frozen (be sure to build from scratch).
+CFLAGS += -DMICROPY_QSTR_EXTRA_POOL=mp_qstr_frozen_const_pool
+CFLAGS += -DMICROPY_MODULE_FROZEN_MPY
+endif
+
+include ../py/mkrules.mk
+

ports/nrf/README.md

@@ -0,0 +1,142 @@
+# MicroPython Port To The Nordic Semiconductor nRF Series
+
+This is a port of MicroPython to the Nordic Semiconductor nRF series of chips.
+
+## Supported Features
+
+* UART
+* SPI
+* LEDs
+* Pins
+* ADC
+* I2C
+* PWM (nRF52 only)
+* Temperature
+* RTC (Real Time Counter. Low-Power counter)
+* BLE support including:
+  * Peripheral role on nrf51 targets
+  * Central role and Peripheral role on nrf52 targets
+  * _REPL over Bluetooth LE_ (optionally using WebBluetooth)
+  * ubluepy: Bluetooth LE module for MicroPython
+  * 1 non-connectable advertiser while in connection
+
+## Tested Hardware
+
+* nRF51
+  * [micro:bit](http://microbit.org/)
+  * PCA10000 (dongle)
+  * PCA10001
+  * PCA10028
+  * PCA10031 (dongle)
+* nRF52832
+  * [PCA10040](http://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.nrf52%2Fdita%2Fnrf52%2Fdevelopment%2Fnrf52_dev_kit.html) 
+  * [Adafruit Feather nRF52](https://www.adafruit.com/product/3406)
+  * [Thingy:52](http://www.nordicsemi.com/eng/Products/Nordic-Thingy-52)
+  * [Arduino Primo](http://www.arduino.org/products/boards/arduino-primo)
+* nRF52840
+  * [PCA10056](http://www.nordicsemi.com/eng/Products/nRF52840-Preview-DK)
+
+## Compile and Flash
+
+Prerequisite steps for building the nrf port:
+
+    git clone <URL>.git micropython
+    cd micropython
+    git submodule update --init
+    make -C mpy-cross
+
+By default, the PCA10040 (nrf52832) is used as compile target. To build and flash issue the following command inside the nrf/ folder:
+
+    make
+    make flash
+
+Alternatively the target board could be defined:
+
+     make BOARD=pca10040
+     make flash
+     
+## Compile and Flash with Bluetooth Stack
+
+First prepare the bluetooth folder by downloading Bluetooth LE stacks and headers:
+
+     ./drivers/bluetooth/download_ble_stack.sh
+
+If the Bluetooth stacks has been downloaded, compile the target with the following command:
+
+    make BOARD=pca10040 SD=s132
+
+The **make sd** will trigger a flash of the bluetooth stack before that application is flashed. Note that **make sd** will perform a full erase of the chip, which could cause 3rd party bootloaders to also be wiped.
+
+    make BOARD=pca10040 SD=s132 sd
+
+Note: further tuning of features to include in bluetooth or even setting up the device to use REPL over Bluetooth can be configured in the `bluetooth_conf.h`.
+
+## Target Boards and Make Flags
+
+Target Board (BOARD) | Bluetooth Stack (SD)    | Bluetooth Support      | Flash Util
+---------------------|-------------------------|------------------------|-------------------------------
+microbit             | s110                    | Peripheral             | [PyOCD](#pyocdopenocd-targets)
+pca10000             | s110                    | Peripheral             | [Segger](#segger-targets)
+pca10001             | s110                    | Peripheral             | [Segger](#segger-targets)
+pca10028             | s110                    | Peripheral             | [Segger](#segger-targets)
+pca10031             | s110                    | Peripheral             | [Segger](#segger-targets)
+pca10040             | s132                    | Peripheral and Central | [Segger](#segger-targets)
+feather52            | s132                    | Peripheral and Central | [UART DFU](#dfu-targets)
+arduino_primo        | s132                    | Peripheral and Central | [PyOCD](#pyocdopenocd-targets)
+pca10056             |                         |                        | [Segger](#segger-targets)
+
+## Segger Targets
+
+Install the necessary tools to flash and debug using Segger:
+
+[JLink Download](https://www.segger.com/downloads/jlink#)
+
+[nrfjprog linux-32bit Download](https://www.nordicsemi.com/eng/nordic/download_resource/52615/16/95882111/97746)
+
+[nrfjprog linux-64bit Download](https://www.nordicsemi.com/eng/nordic/download_resource/51386/21/77886419/94917)
+
+[nrfjprog osx Download](https://www.nordicsemi.com/eng/nordic/download_resource/53402/12/97293750/99977)
+
+[nrfjprog win32 Download](https://www.nordicsemi.com/eng/nordic/download_resource/33444/40/22191727/53210)
+
+note: On Linux it might be required to link SEGGER's `libjlinkarm.so` inside nrfjprog's folder.
+
+## PyOCD/OpenOCD Targets
+
+Install the necessary tools to flash and debug using OpenOCD:
+
+    sudo apt-get install openocd
+    sudo pip install pyOCD
+
+## DFU Targets
+
+    sudo apt-get install build-essential libffi-dev pkg-config gcc-arm-none-eabi git python python-pip
+    git clone https://github.com/adafruit/Adafruit_nRF52_Arduino.git
+    cd Adafruit_nRF52_Arduino/tools/nrfutil-0.5.2/
+    sudo pip install -r requirements.txt
+    sudo python setup.py install
+  
+**make flash** and **make sd** will not work with DFU targets. Hence, **dfu-gen** and **dfu-flash** must be used instead.
+* dfu-gen: Generates a Firmware zip to be used by the DFU flash application.
+* dfu-flash: Triggers the DFU flash application to upload the firmware from the generated Firmware zip file. 
+
+Example on how to generate and flash feather52 target:
+
+    make BOARD=feather52 SD=s132
+    make BOARD=feather52 SD=s132 dfu-gen
+    make BOARD=feather52 SD=s132 dfu-flash
+    
+## Bluetooth LE REPL
+
+The port also implements a BLE REPL driver. This feature is disabled by default, as it will deactivate the UART REPL when activated. As some of the nRF devices only have one UART, using the BLE REPL free's the UART instance such that it can be used as a general UART peripheral not bound to REPL.
+
+The configuration can be enabled by editing the `bluetooth_conf.h` and set `MICROPY_PY_BLE_NUS` to 1.
+
+When enabled you have different options to test it:
+* [NUS Console for Linux](https://github.com/tralamazza/nus_console) (recommended)
+* [WebBluetooth REPL](https://glennrub.github.io/webbluetooth/micropython/repl/) (experimental)
+
+Other:
+* nRF UART application for IPhone/Android
+
+WebBluetooth mode can also be configured by editing `bluetooth_conf.h` and set `BLUETOOTH_WEBBLUETOOTH_REPL` to 1. This will alternate advertisement between Eddystone URL and regular connectable advertisement. The Eddystone URL will point the phone or PC to download [WebBluetooth REPL](https://glennrub.github.io/webbluetooth/micropython/repl/) (experimental), which subsequently can be used to connect to the Bluetooth REPL from the PC or Phone browser.

ports/nrf/bluetooth_conf.h

@@ -0,0 +1,37 @@
+#ifndef BLUETOOTH_CONF_H__
+#define BLUETOOTH_CONF_H__
+
+// SD specific configurations.
+
+#if (BLUETOOTH_SD == 110)
+
+#define MICROPY_PY_BLE                  (1)
+#define MICROPY_PY_BLE_NUS              (0)
+#define BLUETOOTH_WEBBLUETOOTH_REPL     (0)
+#define MICROPY_PY_UBLUEPY              (1)
+#define MICROPY_PY_UBLUEPY_PERIPHERAL   (1)
+
+#elif (BLUETOOTH_SD == 132)
+
+#define MICROPY_PY_BLE                  (1)
+#define MICROPY_PY_BLE_NUS              (0)
+#define BLUETOOTH_WEBBLUETOOTH_REPL     (0)
+#define MICROPY_PY_UBLUEPY              (1)
+#define MICROPY_PY_UBLUEPY_PERIPHERAL   (1)
+#define MICROPY_PY_UBLUEPY_CENTRAL      (1)
+
+#else
+#error "SD not supported"
+#endif
+
+// Default defines.
+
+#ifndef MICROPY_PY_BLE
+#define MICROPY_PY_BLE                  (0)
+#endif
+
+#ifndef MICROPY_PY_BLE_NUS
+#define MICROPY_PY_BLE_NUS              (0)
+#endif
+
+#endif

ports/nrf/boards/arduino_primo/mpconfigboard.h

@@ -0,0 +1,79 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#define MICROPY_HW_BOARD_NAME       "Arduino Primo"
+#define MICROPY_HW_MCU_NAME         "NRF52832"
+#define MICROPY_PY_SYS_PLATFORM     "nrf52"
+
+#define MICROPY_PY_MACHINE_SOFT_PWM (1)
+#define MICROPY_PY_MUSIC            (1)
+
+#define MICROPY_PY_MACHINE_HW_PWM   (1)
+#define MICROPY_PY_MACHINE_HW_SPI   (1)
+#define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_RTC      (1)
+#define MICROPY_PY_MACHINE_I2C      (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_TEMP     (1)
+
+#define MICROPY_HW_HAS_LED          (1)
+#define MICROPY_HW_HAS_SWITCH       (0)
+#define MICROPY_HW_HAS_FLASH        (0)
+#define MICROPY_HW_HAS_SDCARD       (0)
+#define MICROPY_HW_HAS_MMA7660      (0)
+#define MICROPY_HW_HAS_LIS3DSH      (0)
+#define MICROPY_HW_HAS_LCD          (0)
+#define MICROPY_HW_ENABLE_RNG       (0)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_TIMER     (0)
+#define MICROPY_HW_ENABLE_SERVO     (0)
+#define MICROPY_HW_ENABLE_DAC       (0)
+#define MICROPY_HW_ENABLE_CAN       (0)
+
+#define MICROPY_HW_LED_COUNT        (1)
+#define MICROPY_HW_LED_PULLUP       (0)
+
+#define MICROPY_HW_LED1             (20) // LED1
+
+// UART config
+#define MICROPY_HW_UART1_RX         (pin_A11)
+#define MICROPY_HW_UART1_TX         (pin_A12)
+#define MICROPY_HW_UART1_HWFC       (0)
+
+// SPI0 config
+#define MICROPY_HW_SPI0_NAME        "SPI0"
+#define MICROPY_HW_SPI0_SCK         (pin_A25) // (Arduino D13)
+#define MICROPY_HW_SPI0_MOSI        (pin_A23) // (Arduino D11)
+#define MICROPY_HW_SPI0_MISO        (pin_A24) // (Arduino D12)
+
+#define MICROPY_HW_PWM0_NAME        "PWM0"
+#define MICROPY_HW_PWM1_NAME        "PWM1"
+#define MICROPY_HW_PWM2_NAME        "PWM2"
+
+// buzzer pin
+#define MICROPY_HW_MUSIC_PIN        (pin_A8)
+
+#define HELP_TEXT_BOARD_LED         "1"

ports/nrf/boards/arduino_primo/mpconfigboard.mk

@@ -0,0 +1,7 @@
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52832
+LD_FILE = boards/nrf52832_512k_64k.ld
+FLASHER = pyocd
+
+NRF_DEFINES += -DNRF52832_XXAA

ports/nrf/boards/arduino_primo/mpconfigboard_s132.mk

@@ -0,0 +1,9 @@
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52832
+SOFTDEV_VERSION = 3.0.0
+FLASHER=pyocd
+
+LD_FILE = boards/nrf52832_512k_64k_s132_$(SOFTDEV_VERSION).ld
+
+NRF_DEFINES += -DNRF52832_XXAA

ports/nrf/boards/arduino_primo/nrf52_hal_conf.h

@@ -0,0 +1,17 @@
+#ifndef NRF52_HAL_CONF_H__
+#define NRF52_HAL_CONF_H__
+
+#define HAL_UART_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIME_MODULE_ENABLED
+#define HAL_PWM_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_TIMER_MODULE_ENABLED
+#define HAL_TWI_MODULE_ENABLED
+#define HAL_ADCE_MODULE_ENABLED
+#define HAL_TEMP_MODULE_ENABLED
+// #define HAL_UARTE_MODULE_ENABLED
+// #define HAL_SPIE_MODULE_ENABLED
+// #define HAL_TWIE_MODULE_ENABLED
+
+#endif // NRF52_HAL_CONF_H__

ports/nrf/boards/arduino_primo/pins.csv

@@ -0,0 +1,30 @@
+PA2,PA2
+PA3,PA3
+PA4,PA4
+PA5,PA5
+PA6,PA6
+PA7,PA7
+PA8,PA8
+PA9,PA9
+PA10,PA10
+PA11,PA11
+PA12,PA12
+PA13,PA13
+PA14,PA14
+PA15,PA15
+PA16,PA16
+PA17,PA17
+PA18,PA18
+PA19,PA19
+PA20,PA20
+PA21,PA21
+PA22,PA22
+PA23,PA23
+PA24,PA24
+PA25,PA25
+PA26,PA26
+PA27,PA27
+PA28,PA28
+PA29,PA29
+PA30,PA30
+PA31,PA31

ports/nrf/boards/common.ld

@@ -0,0 +1,103 @@
+/* define output sections */
+SECTIONS
+{
+    /* The startup code goes first into FLASH */
+    .isr_vector :
+    {
+        . = ALIGN(4);
+        KEEP(*(.isr_vector)) /* Startup code */
+
+        . = ALIGN(4);
+    } >FLASH_ISR
+   
+    /* The program code and other data goes into FLASH */
+    .text :
+    {
+        . = ALIGN(4);
+        *(.text)           /* .text sections (code) */
+        *(.text*)          /* .text* sections (code) */
+        *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+        *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    /*  *(.glue_7)   */    /* glue arm to thumb code */
+    /*  *(.glue_7t)  */    /* glue thumb to arm code */
+
+        . = ALIGN(4);
+        _etext = .;        /* define a global symbol at end of code */
+    } >FLASH_TEXT
+     
+    /*
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } >FLASH
+
+    .ARM :
+    {
+        __exidx_start = .;
+        *(.ARM.exidx*)
+        __exidx_end = .;
+    } >FLASH
+    */
+        
+    /* used by the startup to initialize data */
+    _sidata = .;
+        
+    /* This is the initialized data section
+    The program executes knowing that the data is in the RAM
+    but the loader puts the initial values in the FLASH (inidata).
+    It is one task of the startup to copy the initial values from FLASH to RAM. */
+    .data : AT (_sidata)
+    {
+        . = ALIGN(4);
+        _sdata = .;        /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
+        _ram_start = .;    /* create a global symbol at ram start for garbage collector */
+        *(.data)           /* .data sections */
+        *(.data*)          /* .data* sections */
+
+        . = ALIGN(4);
+        _edata = .;        /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
+    } >RAM 
+            
+    /* Uninitialized data section */
+    .bss :
+    {
+        . = ALIGN(4);
+        _sbss = .;         /* define a global symbol at bss start; used by startup code */
+        *(.bss)
+        *(.bss*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        _ebss = .;         /* define a global symbol at bss end; used by startup code and GC */
+    } >RAM
+
+    /* this is to define the start of the heap, and make sure we have a minimum size */
+    .heap :
+    {
+        . = ALIGN(4);
+	PROVIDE ( end = . );
+	PROVIDE ( _end = . );
+        _heap_start = .;    /* define a global symbol at heap start */
+        . = . + _minimum_heap_size;
+    } >RAM
+
+    /* this just checks there is enough RAM for the stack */
+    .stack :
+    {
+        . = ALIGN(4);
+        . = . + _minimum_stack_size;
+        . = ALIGN(4);
+    } >RAM
+
+    /* Remove information from the standard libraries */
+    /*
+    /DISCARD/ :
+    {
+        libc.a ( * )
+        libm.a ( * )
+        libgcc.a ( * )
+    }
+    */
+
+    .ARM.attributes 0 : { *(.ARM.attributes) }
+}

ports/nrf/boards/dvk_bl652/mpconfigboard.h

@@ -0,0 +1,78 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#define DVK_BL652
+
+#define MICROPY_HW_BOARD_NAME       "DVK-BL652"
+#define MICROPY_HW_MCU_NAME         "NRF52832"
+#define MICROPY_PY_SYS_PLATFORM     "bl652"
+
+#define MICROPY_PY_MACHINE_PWM      (1)
+#define MICROPY_PY_MACHINE_HW_SPI   (1)
+#define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_RTC      (1)
+#define MICROPY_PY_MACHINE_I2C      (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_TEMP     (1)
+
+#define MICROPY_HW_HAS_LED          (1)
+#define MICROPY_HW_HAS_SWITCH       (0)
+#define MICROPY_HW_HAS_FLASH        (0)
+#define MICROPY_HW_HAS_SDCARD       (0)
+#define MICROPY_HW_HAS_MMA7660      (0)
+#define MICROPY_HW_HAS_LIS3DSH      (0)
+#define MICROPY_HW_HAS_LCD          (0)
+#define MICROPY_HW_ENABLE_RNG       (0)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_TIMER     (0)
+#define MICROPY_HW_ENABLE_SERVO     (0)
+#define MICROPY_HW_ENABLE_DAC       (0)
+#define MICROPY_HW_ENABLE_CAN       (0)
+
+#define MICROPY_HW_LED_COUNT        (2)
+#define MICROPY_HW_LED_PULLUP       (0)
+
+#define MICROPY_HW_LED1             (17) // LED1
+#define MICROPY_HW_LED2             (19) // LED2
+
+// UART config
+#define MICROPY_HW_UART1_RX         (pin_A8)
+#define MICROPY_HW_UART1_TX         (pin_A6)
+#define MICROPY_HW_UART1_CTS        (pin_A7)
+#define MICROPY_HW_UART1_RTS        (pin_A5)
+#define MICROPY_HW_UART1_HWFC       (1)
+
+// SPI0 config
+#define MICROPY_HW_SPI0_NAME        "SPI0"
+#define MICROPY_HW_SPI0_SCK         (pin_A25)
+#define MICROPY_HW_SPI0_MOSI        (pin_A23)
+#define MICROPY_HW_SPI0_MISO        (pin_A24)
+
+#define MICROPY_HW_PWM0_NAME        "PWM0"
+#define MICROPY_HW_PWM1_NAME        "PWM1"
+#define MICROPY_HW_PWM2_NAME        "PWM2"
+
+#define HELP_TEXT_BOARD_LED         "1,2"

ports/nrf/boards/dvk_bl652/mpconfigboard.mk

@@ -0,0 +1,6 @@
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52832
+LD_FILE = boards/nrf52832_512k_64k.ld
+
+NRF_DEFINES += -DNRF52832_XXAA

ports/nrf/boards/dvk_bl652/mpconfigboard_s132.mk

@@ -0,0 +1,10 @@
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52832
+SOFTDEV_VERSION = 3.0.0
+
+LD_FILE = boards/nrf52832_512k_64k_s132_$(SOFTDEV_VERSION).ld
+
+NRF_DEFINES += -DNRF52832_XXAA
+CFLAGS += -DBLUETOOTH_LFCLK_RC
+

ports/nrf/boards/dvk_bl652/nrf52_hal_conf.h

@@ -0,0 +1,18 @@
+#ifndef NRF52_HAL_CONF_H__
+#define NRF52_HAL_CONF_H__
+
+#define HAL_UART_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIME_MODULE_ENABLED
+#define HAL_PWM_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_TIMER_MODULE_ENABLED
+#define HAL_TWI_MODULE_ENABLED
+#define HAL_ADCE_MODULE_ENABLED
+#define HAL_TEMP_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+// #define HAL_UARTE_MODULE_ENABLED
+// #define HAL_SPIE_MODULE_ENABLED
+// #define HAL_TWIE_MODULE_ENABLED
+
+#endif // NRF52_HAL_CONF_H__

ports/nrf/boards/dvk_bl652/pins.csv

@@ -0,0 +1,31 @@
+PA2,PA2
+PA3,PA3
+PA4,PA4
+UART_RTS,PA5
+UART_TX,PA6
+UART_CTS,PA7
+UART_RX,PA8
+PA9,PA9
+PA10,PA10
+PA11,PA11
+PA12,PA12
+PA13,PA13
+PA14,PA14
+PA15,PA15
+PA16,PA16
+PA17,PA17
+PA18,PA18
+PA19,PA19
+PA20,PA20
+PA21,PA21
+PA22,PA22
+PA23,PA23
+PA24,PA24
+PA25,PA25
+PA26,PA26
+PA27,PA27
+PA28,PA28
+PA29,PA29
+PA30,PA30
+PA31,PA31
+

ports/nrf/boards/feather52/custom_nrf52832_dfu_app.ld

@@ -0,0 +1,27 @@
+/*
+    GNU linker script for NRF52 w/ s132 2.0.1 SoftDevice
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x0001c000, LENGTH = 0x001000 /* sector 0, 4 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x0001c400, LENGTH = 0x026c00 /* 152 KiB - APP - ISR */
+    RAM (xrw)       : ORIGIN = 0x200039c0, LENGTH = 0x0c640  /* 49.5 KiB, give 8KiB headroom for softdevice */
+}
+ 
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 16K;
+ 
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20007000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/feather52/mpconfigboard.h

@@ -0,0 +1,76 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#define PCA10040
+
+#define MICROPY_HW_BOARD_NAME       "Bluefruit nRF52 Feather"
+#define MICROPY_HW_MCU_NAME         "NRF52832"
+#define MICROPY_PY_SYS_PLATFORM     "nrf52"
+
+#define MICROPY_PY_MACHINE_HW_PWM   (1)
+#define MICROPY_PY_MACHINE_HW_SPI   (1)
+#define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_RTC      (1)
+#define MICROPY_PY_MACHINE_I2C      (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_TEMP     (1)
+
+#define MICROPY_HW_HAS_LED          (1)
+#define MICROPY_HW_HAS_SWITCH       (0)
+#define MICROPY_HW_HAS_FLASH        (0)
+#define MICROPY_HW_HAS_SDCARD       (0)
+#define MICROPY_HW_HAS_MMA7660      (0)
+#define MICROPY_HW_HAS_LIS3DSH      (0)
+#define MICROPY_HW_HAS_LCD          (0)
+#define MICROPY_HW_ENABLE_RNG       (0)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_TIMER     (0)
+#define MICROPY_HW_ENABLE_SERVO     (0)
+#define MICROPY_HW_ENABLE_DAC       (0)
+#define MICROPY_HW_ENABLE_CAN       (0)
+
+#define MICROPY_HW_LED_COUNT        (2)
+#define MICROPY_HW_LED_PULLUP       (0)
+
+#define MICROPY_HW_LED1             (17) // LED1
+#define MICROPY_HW_LED2             (19) // LED2
+
+// UART config
+#define MICROPY_HW_UART1_RX         (pin_A8)
+#define MICROPY_HW_UART1_TX         (pin_A6)
+#define MICROPY_HW_UART1_HWFC       (0)
+
+// SPI0 config
+#define MICROPY_HW_SPI0_NAME        "SPI0"
+#define MICROPY_HW_SPI0_SCK         (pin_A12) // (Arduino D13)
+#define MICROPY_HW_SPI0_MOSI        (pin_A13) // (Arduino D11)
+#define MICROPY_HW_SPI0_MISO        (pin_A14) // (Arduino D12)
+
+#define MICROPY_HW_PWM0_NAME        "PWM0"
+#define MICROPY_HW_PWM1_NAME        "PWM1"
+#define MICROPY_HW_PWM2_NAME        "PWM2"
+
+#define HELP_TEXT_BOARD_LED         "1,2"

ports/nrf/boards/feather52/mpconfigboard.mk

@@ -0,0 +1,25 @@
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52832
+SOFTDEV_VERSION = 2.0.1
+
+LD_FILE = boards/feather52/custom_nrf52832_dfu_app.ld
+
+NRF_DEFINES += -DNRF52832_XXAA
+
+
+check_defined = \
+    $(strip $(foreach 1,$1, \
+    $(call __check_defined,$1,$(strip $(value 2)))))
+__check_defined = \
+    $(if $(value $1),, \
+    $(error Undefined make flag: $1$(if $2, ($2))))
+
+.PHONY: dfu-gen dfu-flash
+
+dfu-gen:
+	nrfutil dfu genpkg --dev-type 0x0052 --application $(BUILD)/$(OUTPUT_FILENAME).hex $(BUILD)/dfu-package.zip
+
+dfu-flash:
+	@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyUSB0)
+	sudo nrfutil dfu serial --package $(BUILD)/dfu-package.zip -p $(SERIAL)

ports/nrf/boards/feather52/mpconfigboard_s132.mk

@@ -0,0 +1,25 @@
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52832
+SOFTDEV_VERSION = 2.0.1
+
+LD_FILE = boards/feather52/custom_nrf52832_dfu_app.ld
+
+NRF_DEFINES += -DNRF52832_XXAA
+
+
+check_defined = \
+    $(strip $(foreach 1,$1, \
+    $(call __check_defined,$1,$(strip $(value 2)))))
+__check_defined = \
+    $(if $(value $1),, \
+    $(error Undefined make flag: $1$(if $2, ($2))))
+
+.PHONY: dfu-gen dfu-flash
+
+dfu-gen:
+	nrfutil dfu genpkg --dev-type 0x0052 --application $(BUILD)/$(OUTPUT_FILENAME).hex $(BUILD)/dfu-package.zip
+
+dfu-flash:
+	@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyUSB0)
+	sudo nrfutil dfu serial --package $(BUILD)/dfu-package.zip -p $(SERIAL)

ports/nrf/boards/feather52/nrf52_hal_conf.h

@@ -0,0 +1,18 @@
+#ifndef NRF52_HAL_CONF_H__
+#define NRF52_HAL_CONF_H__
+
+#define HAL_UART_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIME_MODULE_ENABLED
+#define HAL_PWM_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_TIMER_MODULE_ENABLED
+#define HAL_TWI_MODULE_ENABLED
+#define HAL_ADCE_MODULE_ENABLED
+#define HAL_TEMP_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+// #define HAL_UARTE_MODULE_ENABLED
+// #define HAL_SPIE_MODULE_ENABLED
+// #define HAL_TWIE_MODULE_ENABLED
+
+#endif // NRF52_HAL_CONF_H__

ports/nrf/boards/feather52/pins.csv

@@ -0,0 +1,25 @@
+PA2,PA2,ADC0_IN0
+PA3,PA3,ADC0_IN1
+PA4,PA4,ADC0_IN2
+PA5,PA5,ADC0_IN3
+UART_TX,PA6
+PA7,PA7
+UART_RX,PA8
+NFC1,PA9
+NFC2,PA10
+PA11,PA11
+SPI_SCK,PA12
+SPI_MOSI,PA13
+SPI_MISO,PA14
+PA15,PA15
+PA16,PA16
+LED1,PA17
+LED2,PA19
+PA20,PA20
+I2C_SDA,PA25
+I2C_SCL,PA26
+PA27,PA27
+PA28,PA28,ADC0_IN4
+PA29,PA29,ADC0_IN5
+PA30,PA30,ADC0_IN6
+PA31,PA31,ADC0_IN7

ports/nrf/boards/make-pins.py

@@ -0,0 +1,399 @@
+#!/usr/bin/env python
+"""Creates the pin file for the nRF5."""
+
+from __future__ import print_function
+
+import argparse
+import sys
+import csv
+
+SUPPORTED_FN = {
+    'UART'  : ['RX', 'TX', 'CTS', 'RTS']
+}
+
+def parse_port_pin(name_str):
+    """Parses a string and returns a (port-num, pin-num) tuple."""
+    if len(name_str) < 3:
+        raise ValueError("Expecting pin name to be at least 4 charcters.")
+    if name_str[0] != 'P':
+        raise ValueError("Expecting pin name to start with P")
+    if name_str[1] not in ('A', 'B'):
+        raise ValueError("Expecting pin port to be in A or B")
+    port = ord(name_str[1]) - ord('A')
+    pin_str = name_str[2:].split('/')[0]
+    if not pin_str.isdigit():
+        raise ValueError("Expecting numeric pin number.")
+    return (port, int(pin_str))
+
+def split_name_num(name_num):
+    num = None
+    for num_idx in range(len(name_num) - 1, -1, -1):
+        if not name_num[num_idx].isdigit():
+            name = name_num[0:num_idx + 1]
+            num_str = name_num[num_idx + 1:]
+            if len(num_str) > 0:
+                num = int(num_str)
+            break
+    return name, num
+
+
+class AlternateFunction(object):
+    """Holds the information associated with a pins alternate function."""
+
+    def __init__(self, idx, af_str):
+        self.idx = idx
+        self.af_str = af_str
+
+        self.func = ''
+        self.fn_num = None
+        self.pin_type = ''
+        self.supported = False
+
+        af_words = af_str.split('_', 1)
+        self.func, self.fn_num = split_name_num(af_words[0])
+        if len(af_words) > 1:
+            self.pin_type = af_words[1]
+        if self.func in SUPPORTED_FN:
+            pin_types = SUPPORTED_FN[self.func]
+            if self.pin_type in pin_types:
+                self.supported = True
+
+    def is_supported(self):
+        return self.supported
+
+    def ptr(self):
+        """Returns the numbered function (i.e. USART6) for this AF."""
+        if self.fn_num is None:
+            return self.func
+        return '{:s}{:d}'.format(self.func, self.fn_num)
+
+    def mux_name(self):
+        return 'AF{:d}_{:s}'.format(self.idx, self.ptr())
+
+    def print(self):
+        """Prints the C representation of this AF."""
+        if self.supported:
+            print('  AF',  end='')
+        else:
+            print('  //', end='')
+        fn_num = self.fn_num
+        if fn_num is None:
+            fn_num = 0
+        print('({:2d}, {:8s}, {:2d}, {:10s}, {:8s}), // {:s}'.format(self.idx,
+              self.func, fn_num, self.pin_type, self.ptr(), self.af_str))
+
+    def qstr_list(self):
+        return [self.mux_name()]
+
+
+class Pin(object):
+    """Holds the information associated with a pin."""
+
+    def __init__(self, port, pin):
+        self.port = port
+        self.pin = pin
+        self.alt_fn = []
+        self.alt_fn_count = 0
+        self.adc_num = 0
+        self.adc_channel = 0
+        self.board_pin = False
+
+    def port_letter(self):
+        return chr(self.port + ord('A'))
+
+    def cpu_pin_name(self):
+        return '{:s}{:d}'.format(self.port_letter(), self.pin)
+
+    def is_board_pin(self):
+        return self.board_pin
+
+    def set_is_board_pin(self):
+        self.board_pin = True
+
+    def parse_adc(self, adc_str):
+        if (adc_str[:3] != 'ADC'):
+            return
+        (adc,channel) = adc_str.split('_')
+        for idx in range(3, len(adc)):
+            self.adc_num = int(adc[idx])
+        self.adc_channel = int(channel[2:])
+
+    def parse_af(self, af_idx, af_strs_in):
+        if len(af_strs_in) == 0:
+            return
+        # If there is a slash, then the slash separates 2 aliases for the
+        # same alternate function.
+        af_strs = af_strs_in.split('/')
+        for af_str in af_strs:
+            alt_fn = AlternateFunction(af_idx, af_str)
+            self.alt_fn.append(alt_fn)
+            if alt_fn.is_supported():
+                self.alt_fn_count += 1
+
+    def alt_fn_name(self, null_if_0=False):
+        if null_if_0 and self.alt_fn_count == 0:
+            return 'NULL'
+        return 'pin_{:s}_af'.format(self.cpu_pin_name())
+
+    def adc_num_str(self):
+        str = ''
+        for adc_num in range(1,4):
+            if self.adc_num & (1 << (adc_num - 1)):
+                if len(str) > 0:
+                    str += ' | '
+                str += 'PIN_ADC'
+                str += chr(ord('0') + adc_num)
+        if len(str) == 0:
+            str = '0'
+        return str
+
+    def print(self):
+        if self.alt_fn_count == 0:
+            print("// ",  end='')
+        print('const pin_af_obj_t {:s}[] = {{'.format(self.alt_fn_name()))
+        for alt_fn in self.alt_fn:
+            alt_fn.print()
+        if self.alt_fn_count == 0:
+            print("// ",  end='')
+        print('};')
+        print('')
+        print('const pin_obj_t pin_{:s} = PIN({:s}, {:d}, {:s}, {:s}, {:d});'.format(
+            self.cpu_pin_name(), self.port_letter(), self.pin,
+            self.alt_fn_name(null_if_0=True),
+            self.adc_num_str(), self.adc_channel))
+        print('')
+
+    def print_header(self, hdr_file):
+        hdr_file.write('extern const pin_obj_t pin_{:s};\n'.
+                       format(self.cpu_pin_name()))
+        if self.alt_fn_count > 0:
+            hdr_file.write('extern const pin_af_obj_t pin_{:s}_af[];\n'.
+                           format(self.cpu_pin_name()))
+
+    def qstr_list(self):
+        result = []
+        for alt_fn in self.alt_fn:
+            if alt_fn.is_supported():
+                result += alt_fn.qstr_list()
+        return result
+
+
+class NamedPin(object):
+
+    def __init__(self, name, pin):
+        self._name = name
+        self._pin = pin
+
+    def pin(self):
+        return self._pin
+
+    def name(self):
+        return self._name
+
+
+class Pins(object):
+
+    def __init__(self):
+        self.cpu_pins = []   # list of NamedPin objects
+        self.board_pins = [] # list of NamedPin objects
+
+    def find_pin(self, port_num, pin_num):
+        for named_pin in self.cpu_pins:
+            pin = named_pin.pin()
+            if pin.port == port_num and pin.pin == pin_num:
+                return pin
+
+    def parse_af_file(self, filename, pinname_col, af_col, af_col_end):
+        with open(filename, 'r') as csvfile:
+            rows = csv.reader(csvfile)
+            for row in rows:
+                try:
+                    (port_num, pin_num) = parse_port_pin(row[pinname_col])
+                except:
+                    continue
+                pin = Pin(port_num, pin_num)
+                for af_idx in range(af_col, len(row)):
+                    if af_idx < af_col_end:
+                        pin.parse_af(af_idx - af_col, row[af_idx])
+                    elif af_idx == af_col_end:
+                        pin.parse_adc(row[af_idx])
+                self.cpu_pins.append(NamedPin(pin.cpu_pin_name(), pin))
+
+    def parse_board_file(self, filename):
+        with open(filename, 'r') as csvfile:
+            rows = csv.reader(csvfile)
+            for row in rows:
+                try:
+                    (port_num, pin_num) = parse_port_pin(row[1])
+                except:
+                    continue
+                pin = self.find_pin(port_num, pin_num)
+                if pin:
+                    pin.set_is_board_pin()
+                    self.board_pins.append(NamedPin(row[0], pin))
+
+    def print_named(self, label, named_pins):
+        print('STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{'.format(label))
+        for named_pin in named_pins:
+            pin = named_pin.pin()
+            if pin.is_board_pin():
+                print('  {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}) }},'.format(named_pin.name(),  pin.cpu_pin_name()))
+        print('};')
+        print('MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);'.format(label, label));
+
+    def print(self):
+        for named_pin in self.cpu_pins:
+            pin = named_pin.pin()
+            if pin.is_board_pin():
+                pin.print()
+        self.print_named('cpu', self.cpu_pins)
+        print('')
+        self.print_named('board', self.board_pins)
+
+    def print_adc(self, adc_num):
+        print('');
+        print('const pin_obj_t * const pin_adc{:d}[] = {{'.format(adc_num))
+        for channel in range(16):
+            adc_found = False
+            for named_pin in self.cpu_pins:
+                pin = named_pin.pin()
+                if (pin.is_board_pin() and
+                    (pin.adc_num & (1 << (adc_num - 1))) and (pin.adc_channel == channel)):
+                    print('  &pin_{:s}, // {:d}'.format(pin.cpu_pin_name(), channel))
+                    adc_found = True
+                    break
+            if not adc_found:
+                print('  NULL,    // {:d}'.format(channel))
+        print('};')
+
+
+    def print_header(self, hdr_filename):
+        with open(hdr_filename, 'wt') as hdr_file:
+            for named_pin in self.cpu_pins:
+                pin = named_pin.pin()
+                if pin.is_board_pin():
+                    pin.print_header(hdr_file)
+            hdr_file.write('extern const pin_obj_t * const pin_adc1[];\n')
+            hdr_file.write('extern const pin_obj_t * const pin_adc2[];\n')
+            hdr_file.write('extern const pin_obj_t * const pin_adc3[];\n')
+
+    def print_qstr(self, qstr_filename):
+        with open(qstr_filename, 'wt') as qstr_file:
+            qstr_set = set([])
+            for named_pin in self.cpu_pins:
+                pin = named_pin.pin()
+                if pin.is_board_pin():
+                    qstr_set |= set(pin.qstr_list())
+                    qstr_set |= set([named_pin.name()])
+            for named_pin in self.board_pins:
+                qstr_set |= set([named_pin.name()])
+            for qstr in sorted(qstr_set):
+                print('Q({})'.format(qstr), file=qstr_file)
+
+
+    def print_af_hdr(self, af_const_filename):
+        with open(af_const_filename,  'wt') as af_const_file:
+            af_hdr_set = set([])
+            mux_name_width = 0
+            for named_pin in self.cpu_pins:
+                pin = named_pin.pin()
+                if pin.is_board_pin():
+                    for af in pin.alt_fn:
+                        if af.is_supported():
+                            mux_name = af.mux_name()
+                            af_hdr_set |= set([mux_name])
+                            if len(mux_name) > mux_name_width:
+                                mux_name_width = len(mux_name)
+            for mux_name in sorted(af_hdr_set):
+                key = 'MP_ROM_QSTR(MP_QSTR_{}),'.format(mux_name)
+                val = 'MP_ROM_INT(GPIO_{})'.format(mux_name)
+                print('    { %-*s %s },' % (mux_name_width + 26, key, val),
+                      file=af_const_file)
+
+    def print_af_py(self, af_py_filename):
+        with open(af_py_filename,  'wt') as af_py_file:
+            print('PINS_AF = (', file=af_py_file);
+            for named_pin in self.board_pins:
+                print("  ('%s', " % named_pin.name(), end='', file=af_py_file)
+                for af in named_pin.pin().alt_fn:
+                    if af.is_supported():
+                        print("(%d, '%s'), " % (af.idx, af.af_str), end='', file=af_py_file)
+                print('),', file=af_py_file)
+            print(')',  file=af_py_file)
+
+
+def main():
+    parser = argparse.ArgumentParser(
+        prog="make-pins.py",
+        usage="%(prog)s [options] [command]",
+        description="Generate board specific pin file"
+    )
+    parser.add_argument(
+        "-a", "--af",
+        dest="af_filename",
+        help="Specifies the alternate function file for the chip",
+        default="nrf.csv"
+    )
+    parser.add_argument(
+        "--af-const",
+        dest="af_const_filename",
+        help="Specifies header file for alternate function constants.",
+        default="build/pins_af_const.h"
+    )
+    parser.add_argument(
+        "--af-py",
+        dest="af_py_filename",
+        help="Specifies the filename for the python alternate function mappings.",
+        default="build/pins_af.py"
+    )
+    parser.add_argument(
+        "-b", "--board",
+        dest="board_filename",
+        help="Specifies the board file",
+    )
+    parser.add_argument(
+        "-p", "--prefix",
+        dest="prefix_filename",
+        help="Specifies beginning portion of generated pins file",
+        default="nrf52_prefix.c"
+    )
+    parser.add_argument(
+        "-q", "--qstr",
+        dest="qstr_filename",
+        help="Specifies name of generated qstr header file",
+        default="build/pins_qstr.h"
+    )
+    parser.add_argument(
+        "-r", "--hdr",
+        dest="hdr_filename",
+        help="Specifies name of generated pin header file",
+        default="build/pins.h"
+    )
+    args = parser.parse_args(sys.argv[1:])
+
+    pins = Pins()
+
+    print('// This file was automatically generated by make-pins.py')
+    print('//')
+    if args.af_filename:
+        print('// --af {:s}'.format(args.af_filename))
+        pins.parse_af_file(args.af_filename, 1, 2, 2)
+
+    if args.board_filename:
+        print('// --board {:s}'.format(args.board_filename))
+        pins.parse_board_file(args.board_filename)
+
+    if args.prefix_filename:
+        print('// --prefix {:s}'.format(args.prefix_filename))
+        print('')
+        with open(args.prefix_filename, 'r') as prefix_file:
+            print(prefix_file.read())
+    pins.print()
+    pins.print_header(args.hdr_filename)
+    pins.print_qstr(args.qstr_filename)
+    pins.print_af_hdr(args.af_const_filename)
+    pins.print_af_py(args.af_py_filename)
+
+
+if __name__ == "__main__":
+    main()

ports/nrf/boards/microbit/mpconfigboard.h

@@ -0,0 +1,68 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#define PCA10028
+
+#define MICROPY_HW_BOARD_NAME       "micro:bit"
+#define MICROPY_HW_MCU_NAME         "NRF51822"
+#define MICROPY_PY_SYS_PLATFORM     "nrf51"
+
+#define MICROPY_PY_MUSIC            (0)
+#define MICROPY_PY_MACHINE_SOFT_PWM (0)
+#define MICROPY_PY_MACHINE_HW_SPI   (1)
+#define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_RTC      (1)
+#define MICROPY_PY_MACHINE_I2C      (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_TEMP     (1)
+
+#define MICROPY_HW_HAS_LED          (0)
+#define MICROPY_HW_HAS_SWITCH       (0)
+#define MICROPY_HW_HAS_FLASH        (0)
+#define MICROPY_HW_HAS_SDCARD       (0)
+#define MICROPY_HW_HAS_MMA7660      (0)
+#define MICROPY_HW_HAS_LIS3DSH      (0)
+#define MICROPY_HW_HAS_LCD          (0)
+#define MICROPY_HW_ENABLE_RNG       (0)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_TIMER     (0)
+#define MICROPY_HW_ENABLE_SERVO     (0)
+#define MICROPY_HW_ENABLE_DAC       (0)
+#define MICROPY_HW_ENABLE_CAN       (0)
+
+// UART config
+#define MICROPY_HW_UART1_RX         (pin_A25)
+#define MICROPY_HW_UART1_TX         (pin_A24)
+#define MICROPY_HW_UART1_HWFC       (0)
+
+// SPI0 config
+#define MICROPY_HW_SPI0_NAME        "SPI0"
+#define MICROPY_HW_SPI0_SCK         (pin_A23)
+#define MICROPY_HW_SPI0_MOSI        (pin_A21)
+#define MICROPY_HW_SPI0_MISO        (pin_A22)
+
+// micro:bit music pin
+#define MICROPY_HW_MUSIC_PIN        (pin_A3)

ports/nrf/boards/microbit/mpconfigboard.mk

@@ -0,0 +1,5 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+LD_FILE = boards/nrf51x22_256k_16k.ld
+FLASHER = pyocd

ports/nrf/boards/microbit/mpconfigboard_s110.mk

@@ -0,0 +1,8 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+SOFTDEV_VERSION = 8.0.0
+LD_FILE = boards/nrf51x22_256k_16k_s110_$(SOFTDEV_VERSION).ld
+FLASHER = pyocd
+
+CFLAGS += -DBLUETOOTH_LFCLK_RC

ports/nrf/boards/microbit/nrf51_hal_conf.h

@@ -0,0 +1,14 @@
+#ifndef NRF51_HAL_CONF_H__
+#define NRF51_HAL_CONF_H__
+
+#define HAL_UART_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIME_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_TIMER_MODULE_ENABLED
+#define HAL_TWI_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_TEMP_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+
+#endif // NRF51_HAL_CONF_H__

ports/nrf/boards/microbit/pins.csv

@@ -0,0 +1,32 @@
+I2C_SCL,PA0
+PA1,PA1
+PA2,PA2
+PA3,PA3
+PA4,PA4
+PA5,PA5
+PA6,PA6
+PA7,PA7
+UART_RTS,PA8
+UART_TX,PA9
+UART_CTS,PA10
+UART_RX,PA11
+PA12,PA12
+PA13,PA13
+PA14,PA14
+PA15,PA15
+PA16,PA16
+PA17,PA17
+PA18,PA18
+PA19,PA19
+PA20,PA20
+SPI_MOSI,PA21
+SPI_MISO,PA22
+SPI_SCK,PA23
+PA24,PA24
+PA25,PA25
+PA26,PA26
+PA27,PA27
+PA28,PA28
+PA29,PA29
+I2C_SDA,PA30
+PA31,PA31

ports/nrf/boards/nrf51_prefix.c

@@ -0,0 +1,31 @@
+// nrf51_prefix.c becomes the initial portion of the generated pins file.
+
+#include <stdio.h>
+
+#include "py/obj.h"
+#include "py/mphal.h"
+#include "pin.h"
+
+#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \
+{ \
+    { &pin_af_type }, \
+    .name = MP_QSTR_AF ## af_idx ## _ ## af_fn ## af_unit, \
+    .idx = (af_idx), \
+    .fn = AF_FN_ ## af_fn, \
+    .unit = (af_unit), \
+    .type = AF_PIN_TYPE_ ## af_fn ## _ ## af_type, \
+    .af_fn = (af_ptr) \
+}
+
+#define PIN(p_port, p_pin, p_af, p_adc_num, p_adc_channel) \
+{ \
+    { &pin_type }, \
+    .name = MP_QSTR_ ## p_port ## p_pin, \
+    .port = PORT_ ## p_port, \
+    .pin = (p_pin), \
+    .num_af = (sizeof(p_af) / sizeof(pin_af_obj_t)), \
+    .pin_mask = (1 << p_pin), \
+    .af = p_af, \
+    .adc_num = p_adc_num, \
+    .adc_channel = p_adc_channel, \
+}

ports/nrf/boards/nrf51x22_256k_16k.ld

@@ -0,0 +1,28 @@
+/*
+    GNU linker script for NRF52 blank w/ no SoftDevice
+*/
+/* Specify the memory areas */
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x00000000, LENGTH = 0x000400 /* sector 0, 1 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x00000400, LENGTH = 0x03FC00 /* 255 KiB */
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 0x004000 /* 16 KiB */
+}
+ 
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 4K;
+_minimum_heap_size = 8K;
+ 
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20002000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/nrf51x22_256k_16k_s110_8.0.0.ld

@@ -0,0 +1,28 @@
+/*
+    GNU linker script for NRF51822 AA w/ S110 8.0.0 SoftDevice
+*/
+/* Specify the memory areas */
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x00018000, LENGTH = 0x000400 /* sector 0, 1 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x00018400, LENGTH = 0x027c00 /* 159 KiB */
+    RAM (xrw)       : ORIGIN = 0x20002000, LENGTH = 0x002000 /* 8 KiB */
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 1K;
+
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20003c00; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/nrf51x22_256k_32k.ld

@@ -0,0 +1,28 @@
+/*
+    GNU linker script for NRF52 blank w/ no SoftDevice
+*/
+/* Specify the memory areas */
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x00000000, LENGTH = 0x000400 /* sector 0, 1 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x00000400, LENGTH = 0x03F000 /* 255 KiB */
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 0x008000 /* 32 KiB */
+}
+ 
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 4K;
+_minimum_heap_size = 24K;
+ 
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20006000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/nrf51x22_256k_32k_s110_8.0.0.ld

@@ -0,0 +1,28 @@
+/*
+    GNU linker script for NRF51822 AC w/ S110 8.0.0 SoftDevice
+*/
+/* Specify the memory areas */
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x00018000, LENGTH = 0x000400 /* sector 0, 1 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x00018400, LENGTH = 0x027c00 /* 159 KiB */
+    RAM (xrw)       : ORIGIN = 0x20002000, LENGTH = 0x006000 /* 24 KiB */
+}
+ 
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 1K;
+ 
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20005000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/nrf51x22_256k_32k_s120_2.1.0.ld

@@ -0,0 +1,28 @@
+/*
+    GNU linker script for NRF51822 AC w/ S120 2.1.0 SoftDevice
+*/
+/* Specify the memory areas */
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x0001D000, LENGTH = 0x000400 /* sector 0, 1 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x0001D400, LENGTH = 0x022c00 /* 139 KiB */
+    RAM (xrw)       : ORIGIN = 0x20002800, LENGTH = 0x005800 /* 22 KiB */
+}
+ 
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 4K;
+ 
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20003000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/nrf51x22_256k_32k_s130_2.0.1.ld

@@ -0,0 +1,28 @@
+/*
+    GNU linker script for NRF51822 AC w/ S130 2.0.1 SoftDevice
+*/
+/* Specify the memory areas */
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x0001b000, LENGTH = 0x000400 /* sector 0, 1 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x0001b400, LENGTH = 0x024c00 /* 147 KiB */
+    RAM (xrw)       : ORIGIN = 0x200013c8, LENGTH = 0x006c38 /* 27 KiB */
+}
+ 
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 6K;
+ 
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20002000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/nrf52832_512k_64k.ld

@@ -0,0 +1,27 @@
+/*
+    GNU linker script for NRF52832 blank w/ no SoftDevice
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x00000000, LENGTH = 0x001000 /* sector 0, 4 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x00001000, LENGTH = 0x07F000 /* 508 KiB */
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 0x010000 /* 64 KiB */
+}
+ 
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 32K;
+ 
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20008000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/nrf52832_512k_64k_s132_2.0.1.ld

@@ -0,0 +1,27 @@
+/*
+    GNU linker script for NRF52 w/ s132 2.0.1 SoftDevice
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x0001c000, LENGTH = 0x001000 /* sector 0, 4 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x0001d000, LENGTH = 0x060000 /* 396 KiB */
+    RAM (xrw)       : ORIGIN = 0x200039c0, LENGTH = 0x0c640  /* 49.5 KiB, give 8KiB headroom for softdevice */
+}
+ 
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 16K;
+ 
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20007000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/nrf52832_512k_64k_s132_3.0.0.ld

@@ -0,0 +1,27 @@
+/*
+    GNU linker script for NRF52 w/ s132 3.0.0 SoftDevice
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x0001f000, LENGTH = 0x001000 /* sector 0, 4 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x00020000, LENGTH = 0x060000 /* 396 KiB */
+    RAM (xrw)       : ORIGIN = 0x200039c0, LENGTH = 0x0c640  /* 49.5 KiB, give 8KiB headroom for softdevice */
+}
+ 
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 16K;
+ 
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20007000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/nrf52840_1M_256k.ld

@@ -0,0 +1,27 @@
+/*
+    GNU linker script for NRF52840 blank w/ no SoftDevice
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x100000 /* entire flash, 1 MiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x00000000, LENGTH = 0x001000 /* sector 0, 4 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x00001000, LENGTH = 0x0FF000 /* 1020 KiB */
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 0x040000 /* 256 KiB */
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 40K;
+_minimum_heap_size = 128K;
+ 
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20020000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/nrf52_prefix.c

@@ -0,0 +1,31 @@
+// nrf52_prefix.c becomes the initial portion of the generated pins file.
+
+#include <stdio.h>
+
+#include "py/obj.h"
+#include "py/mphal.h"
+#include "pin.h"
+
+#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \
+{ \
+    { &pin_af_type }, \
+    .name = MP_QSTR_AF ## af_idx ## _ ## af_fn ## af_unit, \
+    .idx = (af_idx), \
+    .fn = AF_FN_ ## af_fn, \
+    .unit = (af_unit), \
+    .type = AF_PIN_TYPE_ ## af_fn ## _ ## af_type, \
+    .af_fn = (af_ptr) \
+}
+
+#define PIN(p_port, p_pin, p_af, p_adc_num, p_adc_channel) \
+{ \
+    { &pin_type }, \
+    .name = MP_QSTR_ ## p_port ## p_pin, \
+    .port = PORT_ ## p_port, \
+    .pin = (p_pin), \
+    .num_af = (sizeof(p_af) / sizeof(pin_af_obj_t)), \
+    .pin_mask = (1 << p_pin), \
+    .af = p_af, \
+    .adc_num = p_adc_num, \
+    .adc_channel = p_adc_channel, \
+}

ports/nrf/boards/pca10000/mpconfigboard.h

@@ -0,0 +1,66 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#define PCA10000
+
+#define MICROPY_HW_BOARD_NAME       "PCA10000"
+#define MICROPY_HW_MCU_NAME         "NRF51822"
+#define MICROPY_PY_SYS_PLATFORM     "nrf51-dongle"
+
+#define MICROPY_PY_MACHINE_HW_SPI   (0)
+#define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_RTC      (1)
+#define MICROPY_PY_MACHINE_I2C      (0)
+#define MICROPY_PY_MACHINE_ADC      (0)
+#define MICROPY_PY_MACHINE_TEMP     (1)
+
+#define MICROPY_HW_HAS_LED          (1)
+#define MICROPY_HW_HAS_SWITCH       (0)
+#define MICROPY_HW_HAS_FLASH        (0)
+#define MICROPY_HW_HAS_SDCARD       (0)
+#define MICROPY_HW_HAS_MMA7660      (0)
+#define MICROPY_HW_HAS_LIS3DSH      (0)
+#define MICROPY_HW_HAS_LCD          (0)
+#define MICROPY_HW_ENABLE_RNG       (0)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_TIMER     (0)
+#define MICROPY_HW_ENABLE_SERVO     (0)
+#define MICROPY_HW_ENABLE_DAC       (0)
+#define MICROPY_HW_ENABLE_CAN       (0)
+
+#define MICROPY_HW_LED_TRICOLOR     (1)
+#define MICROPY_HW_LED_PULLUP       (1)
+
+#define MICROPY_HW_LED_RED          (21) // RED
+#define MICROPY_HW_LED_GREEN        (22) // GREEN
+#define MICROPY_HW_LED_BLUE         (23) // BLUE
+
+// UART config
+#define MICROPY_HW_UART1_RX         (pin_A11)
+#define MICROPY_HW_UART1_TX         (pin_A9)
+#define MICROPY_HW_UART1_HWFC       (0)
+
+#define HELP_TEXT_BOARD_LED         "1,2,3"

ports/nrf/boards/pca10000/mpconfigboard.mk

@@ -0,0 +1,4 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+LD_FILE = boards/nrf51x22_256k_16k.ld

ports/nrf/boards/pca10000/mpconfigboard_s110.mk

@@ -0,0 +1,5 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+SOFTDEV_VERSION = 8.0.0
+LD_FILE = boards/nrf51x22_256k_16k_s110_$(SOFTDEV_VERSION).ld

ports/nrf/boards/pca10000/nrf51_hal_conf.h

@@ -0,0 +1,11 @@
+#ifndef NRF51_HAL_CONF_H__
+#define NRF51_HAL_CONF_H__
+
+#define HAL_UART_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_TIMER_MODULE_ENABLED
+#define HAL_TIME_MODULE_ENABLED
+#define HAL_TEMP_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+
+#endif // NRF51_HAL_CONF_H__

ports/nrf/boards/pca10000/pins.csv

@@ -0,0 +1,7 @@
+UART_RTS,PA8
+UART_TX,PA9
+UART_CTS,PA10
+UART_RX,PA11
+LED_RED,PA21
+LED_GREEN,PA22
+LED_BLUE,PA23

ports/nrf/boards/pca10001/mpconfigboard.h

@@ -0,0 +1,68 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#define PCA10001
+
+#define MICROPY_HW_BOARD_NAME       "PCA10001"
+#define MICROPY_HW_MCU_NAME         "NRF51822"
+#define MICROPY_PY_SYS_PLATFORM     "nrf51-DK"
+
+#define MICROPY_PY_MACHINE_HW_SPI   (0)
+#define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_RTC      (1)
+#define MICROPY_PY_MACHINE_I2C      (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_TEMP     (1)
+
+#define MICROPY_HW_HAS_LED          (1)
+#define MICROPY_HW_HAS_SWITCH       (0)
+#define MICROPY_HW_HAS_FLASH        (0)
+#define MICROPY_HW_HAS_SDCARD       (0)
+#define MICROPY_HW_HAS_MMA7660      (0)
+#define MICROPY_HW_HAS_LIS3DSH      (0)
+#define MICROPY_HW_HAS_LCD          (0)
+#define MICROPY_HW_ENABLE_RNG       (0)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_TIMER     (0)
+#define MICROPY_HW_ENABLE_SERVO     (0)
+#define MICROPY_HW_ENABLE_DAC       (0)
+#define MICROPY_HW_ENABLE_CAN       (0)
+
+
+#define MICROPY_HW_LED_COUNT        (2)
+#define MICROPY_HW_LED_PULLUP       (0)
+
+#define MICROPY_HW_LED1             (18) // LED1
+#define MICROPY_HW_LED2             (19) // LED2
+
+// UART config
+#define MICROPY_HW_UART1_RX         (pin_A11)
+#define MICROPY_HW_UART1_TX         (pin_A9)
+#define MICROPY_HW_UART1_CTS        (pin_A10)
+#define MICROPY_HW_UART1_RTS        (pin_A8)
+#define MICROPY_HW_UART1_HWFC       (0)
+
+#define HELP_TEXT_BOARD_LED         "1,2"

ports/nrf/boards/pca10001/mpconfigboard.mk

@@ -0,0 +1,4 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+LD_FILE = boards/nrf51x22_256k_16k.ld

ports/nrf/boards/pca10001/mpconfigboard_s110.mk

@@ -0,0 +1,5 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+SOFTDEV_VERSION = 8.0.0
+LD_FILE = boards/nrf51x22_256k_16k_s110_$(SOFTDEV_VERSION).ld

ports/nrf/boards/pca10001/nrf51_hal_conf.h

@@ -0,0 +1,14 @@
+#ifndef NRF51_HAL_CONF_H__
+#define NRF51_HAL_CONF_H__
+
+#define HAL_UART_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIME_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_TIMER_MODULE_ENABLED
+#define HAL_TWI_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_TEMP_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+
+#endif // NRF51_HAL_CONF_H__

ports/nrf/boards/pca10001/pins.csv

@@ -0,0 +1,32 @@
+PA0,PA0
+PA1,PA1
+PA2,PA2
+PA3,PA3
+PA4,PA4
+PA5,PA5
+PA6,PA6
+PA7,PA7
+UART_RTS,PA8
+UART_TX,PA9
+UART_CTS,PA10
+UART_RX,PA11
+PA12,PA12
+PA13,PA13
+PA14,PA14
+PA15,PA15
+PA16,PA16
+PA17,PA17
+PA18,PA18
+PA19,PA19
+PA20,PA20
+PA21,PA21
+PA22,PA22
+PA23,PA23
+PA24,PA24
+PA25,PA25
+PA26,PA26
+PA27,PA27
+PA28,PA28
+PA29,PA29
+PA30,PA30
+PA31,PA31

ports/nrf/boards/pca10028/mpconfigboard.h

@@ -0,0 +1,75 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#define PCA10028
+
+#define MICROPY_HW_BOARD_NAME       "PCA10028"
+#define MICROPY_HW_MCU_NAME         "NRF51822"
+#define MICROPY_PY_SYS_PLATFORM     "nrf51-DK"
+
+#define MICROPY_PY_MACHINE_HW_SPI   (1)
+#define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_RTC      (1)
+#define MICROPY_PY_MACHINE_I2C      (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_TEMP     (1)
+
+#define MICROPY_HW_HAS_LED          (1)
+#define MICROPY_HW_HAS_SWITCH       (0)
+#define MICROPY_HW_HAS_FLASH        (0)
+#define MICROPY_HW_HAS_SDCARD       (0)
+#define MICROPY_HW_HAS_MMA7660      (0)
+#define MICROPY_HW_HAS_LIS3DSH      (0)
+#define MICROPY_HW_HAS_LCD          (0)
+#define MICROPY_HW_ENABLE_RNG       (0)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_TIMER     (0)
+#define MICROPY_HW_ENABLE_SERVO     (0)
+#define MICROPY_HW_ENABLE_DAC       (0)
+#define MICROPY_HW_ENABLE_CAN       (0)
+
+#define MICROPY_HW_LED_COUNT        (4)
+#define MICROPY_HW_LED_PULLUP       (1)
+
+#define MICROPY_HW_LED1             (21) // LED1
+#define MICROPY_HW_LED2             (22) // LED2
+#define MICROPY_HW_LED3             (23) // LED3
+#define MICROPY_HW_LED4             (24) // LED4
+
+// UART config
+#define MICROPY_HW_UART1_RX         (pin_A11)
+#define MICROPY_HW_UART1_TX         (pin_A9)
+#define MICROPY_HW_UART1_CTS        (pin_A10)
+#define MICROPY_HW_UART1_RTS        (pin_A8)
+#define MICROPY_HW_UART1_HWFC       (1)
+
+// SPI0 config
+#define MICROPY_HW_SPI0_NAME        "SPI0"
+#define MICROPY_HW_SPI0_SCK         (pin_A29)
+#define MICROPY_HW_SPI0_MOSI        (pin_A25)
+#define MICROPY_HW_SPI0_MISO        (pin_A28)
+
+#define HELP_TEXT_BOARD_LED         "1,2,3,4"

ports/nrf/boards/pca10028/mpconfigboard.mk

@@ -0,0 +1,4 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+LD_FILE = boards/nrf51x22_256k_32k.ld

ports/nrf/boards/pca10028/mpconfigboard_s110.mk

@@ -0,0 +1,5 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+SOFTDEV_VERSION = 8.0.0
+LD_FILE = boards/nrf51x22_256k_32k_s110_$(SOFTDEV_VERSION).ld

ports/nrf/boards/pca10028/mpconfigboard_s120.mk

@@ -0,0 +1,5 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+SOFTDEV_VERSION = 2.1.0
+LD_FILE = boards/nrf51x22_256k_32k_s120_$(SOFTDEV_VERSION).ld

ports/nrf/boards/pca10028/mpconfigboard_s130.mk

@@ -0,0 +1,5 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+SOFTDEV_VERSION = 2.0.1
+LD_FILE = boards/nrf51x22_256k_32k_s130_$(SOFTDEV_VERSION).ld

ports/nrf/boards/pca10028/nrf51_hal_conf.h

@@ -0,0 +1,14 @@
+#ifndef NRF51_HAL_CONF_H__
+#define NRF51_HAL_CONF_H__
+
+#define HAL_UART_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIME_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_TIMER_MODULE_ENABLED
+#define HAL_TWI_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_TEMP_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+
+#endif // NRF51_HAL_CONF_H__

ports/nrf/boards/pca10028/pins.csv

@@ -0,0 +1,32 @@
+PA0,PA0
+PA1,PA1,ADC0_IN2
+PA2,PA2,ADC0_IN3
+PA3,PA3,ADC0_IN4
+PA4,PA4,ADC0_IN5
+PA5,PA5,ADC0_IN6
+PA6,PA6,ADC0_IN7
+PA7,PA7
+UART_RTS,PA8
+UART_TX,PA9
+UART_CTS,PA10
+UART_RX,PA11
+PA12,PA12
+PA13,PA13
+PA14,PA14
+PA15,PA15
+PA16,PA16
+PA17,PA17
+PA18,PA18
+PA19,PA19
+PA20,PA20
+PA21,PA21
+PA22,PA22
+PA23,PA23
+PA24,PA24
+PA25,PA25
+PA26,PA26
+PA27,PA27
+PA28,PA28
+PA29,PA29
+PA30,PA30
+PA31,PA31

ports/nrf/boards/pca10031/mpconfigboard.h

@@ -0,0 +1,74 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#define PCA10031
+
+#define MICROPY_HW_BOARD_NAME       "PCA10031"
+#define MICROPY_HW_MCU_NAME         "NRF51822"
+#define MICROPY_PY_SYS_PLATFORM     "nrf51-dongle"
+
+#define MICROPY_PY_MACHINE_HW_SPI   (1)
+#define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_RTC      (1)
+#define MICROPY_PY_MACHINE_I2C      (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_TEMP     (1)
+
+#define MICROPY_HW_HAS_LED          (1)
+#define MICROPY_HW_HAS_SWITCH       (0)
+#define MICROPY_HW_HAS_FLASH        (0)
+#define MICROPY_HW_HAS_SDCARD       (0)
+#define MICROPY_HW_HAS_MMA7660      (0)
+#define MICROPY_HW_HAS_LIS3DSH      (0)
+#define MICROPY_HW_HAS_LCD          (0)
+#define MICROPY_HW_ENABLE_RNG       (0)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_TIMER     (0)
+#define MICROPY_HW_ENABLE_SERVO     (0)
+#define MICROPY_HW_ENABLE_DAC       (0)
+#define MICROPY_HW_ENABLE_CAN       (0)
+
+#define MICROPY_HW_LED_TRICOLOR     (1)
+#define MICROPY_HW_LED_PULLUP       (1)
+
+#define MICROPY_HW_LED_RED          (21) // RED
+#define MICROPY_HW_LED_GREEN        (22) // GREEN
+#define MICROPY_HW_LED_BLUE         (23) // BLUE
+
+// UART config
+#define MICROPY_HW_UART1_RX         (pin_A11)
+#define MICROPY_HW_UART1_TX         (pin_A9)
+#define MICROPY_HW_UART1_CTS        (pin_A10)
+#define MICROPY_HW_UART1_RTS        (pin_A8)
+#define MICROPY_HW_UART1_HWFC       (0)
+
+// SPI0 config
+#define MICROPY_HW_SPI0_NAME        "SPI0"
+#define MICROPY_HW_SPI0_SCK         (pin_A15)
+#define MICROPY_HW_SPI0_MOSI        (pin_A16)
+#define MICROPY_HW_SPI0_MISO        (pin_A17)
+
+#define HELP_TEXT_BOARD_LED         "1,2,3"

ports/nrf/boards/pca10031/mpconfigboard.mk

@@ -0,0 +1,4 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+LD_FILE = boards/nrf51x22_256k_32k.ld

ports/nrf/boards/pca10031/mpconfigboard_s110.mk

@@ -0,0 +1,5 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+SOFTDEV_VERSION = 8.0.0
+LD_FILE = boards/nrf51x22_256k_32k_s110_$(SOFTDEV_VERSION).ld

ports/nrf/boards/pca10031/mpconfigboard_s120.mk

@@ -0,0 +1,5 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+SOFTDEV_VERSION = 2.1.0
+LD_FILE = boards/nrf51x22_256k_32k_s120_$(SOFTDEV_VERSION).ld

ports/nrf/boards/pca10031/mpconfigboard_s130.mk

@@ -0,0 +1,5 @@
+MCU_SERIES = m0
+MCU_VARIANT = nrf51
+MCU_SUB_VARIANT = nrf51822
+SOFTDEV_VERSION = 2.0.1
+LD_FILE = boards/nrf51x22_256k_32k_s130_$(SOFTDEV_VERSION).ld

ports/nrf/boards/pca10031/nrf51_hal_conf.h

@@ -0,0 +1,14 @@
+#ifndef NRF51_HAL_CONF_H__
+#define NRF51_HAL_CONF_H__
+
+#define HAL_UART_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIME_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_TIMER_MODULE_ENABLED
+#define HAL_TWI_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_TEMP_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+
+#endif // NRF51_HAL_CONF_H__

ports/nrf/boards/pca10031/pins.csv

@@ -0,0 +1,13 @@
+UART_RTS,PA8
+UART_TX,PA9
+UART_CTS,PA10
+UART_RX,PA11
+LED_RED,PA21
+LED_GREEN,PA22
+LED_BLUE,PA23
+PA15,PA15
+PA16,PA16
+PA17,PA17
+PA18,PA18
+PA19,PA19
+PA20,PA20

ports/nrf/boards/pca10040/mpconfigboard.h

@@ -0,0 +1,80 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#define PCA10040
+
+#define MICROPY_HW_BOARD_NAME       "PCA10040"
+#define MICROPY_HW_MCU_NAME         "NRF52832"
+#define MICROPY_PY_SYS_PLATFORM     "nrf52-DK"
+
+#define MICROPY_PY_MACHINE_HW_PWM   (1)
+#define MICROPY_PY_MACHINE_HW_SPI   (1)
+#define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_RTC      (1)
+#define MICROPY_PY_MACHINE_I2C      (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_TEMP     (1)
+
+#define MICROPY_HW_HAS_LED          (1)
+#define MICROPY_HW_HAS_SWITCH       (0)
+#define MICROPY_HW_HAS_FLASH        (0)
+#define MICROPY_HW_HAS_SDCARD       (0)
+#define MICROPY_HW_HAS_MMA7660      (0)
+#define MICROPY_HW_HAS_LIS3DSH      (0)
+#define MICROPY_HW_HAS_LCD          (0)
+#define MICROPY_HW_ENABLE_RNG       (0)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_TIMER     (0)
+#define MICROPY_HW_ENABLE_SERVO     (0)
+#define MICROPY_HW_ENABLE_DAC       (0)
+#define MICROPY_HW_ENABLE_CAN       (0)
+
+#define MICROPY_HW_LED_COUNT        (4)
+#define MICROPY_HW_LED_PULLUP       (1)
+
+#define MICROPY_HW_LED1             (17) // LED1
+#define MICROPY_HW_LED2             (18) // LED2
+#define MICROPY_HW_LED3             (19) // LED3
+#define MICROPY_HW_LED4             (20) // LED4
+
+// UART config
+#define MICROPY_HW_UART1_RX         (pin_A8)
+#define MICROPY_HW_UART1_TX         (pin_A6)
+#define MICROPY_HW_UART1_CTS        (pin_A7)
+#define MICROPY_HW_UART1_RTS        (pin_A5)
+#define MICROPY_HW_UART1_HWFC       (1)
+
+// SPI0 config
+#define MICROPY_HW_SPI0_NAME        "SPI0"
+#define MICROPY_HW_SPI0_SCK         (pin_A25) // (Arduino D13)
+#define MICROPY_HW_SPI0_MOSI        (pin_A23) // (Arduino D11)
+#define MICROPY_HW_SPI0_MISO        (pin_A24) // (Arduino D12)
+
+#define MICROPY_HW_PWM0_NAME        "PWM0"
+#define MICROPY_HW_PWM1_NAME        "PWM1"
+#define MICROPY_HW_PWM2_NAME        "PWM2"
+
+#define HELP_TEXT_BOARD_LED         "1,2,3,4"

ports/nrf/boards/pca10040/mpconfigboard.mk

@@ -0,0 +1,6 @@
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52832
+LD_FILE = boards/nrf52832_512k_64k.ld
+
+NRF_DEFINES += -DNRF52832_XXAA

ports/nrf/boards/pca10040/mpconfigboard_s132.mk

@@ -0,0 +1,8 @@
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52832
+SOFTDEV_VERSION = 3.0.0
+
+LD_FILE = boards/nrf52832_512k_64k_s132_$(SOFTDEV_VERSION).ld
+
+NRF_DEFINES += -DNRF52832_XXAA

ports/nrf/boards/pca10040/nrf52_hal_conf.h

@@ -0,0 +1,18 @@
+#ifndef NRF52_HAL_CONF_H__
+#define NRF52_HAL_CONF_H__
+
+#define HAL_UART_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIME_MODULE_ENABLED
+#define HAL_PWM_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_TIMER_MODULE_ENABLED
+#define HAL_TWI_MODULE_ENABLED
+#define HAL_ADCE_MODULE_ENABLED
+#define HAL_TEMP_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+// #define HAL_UARTE_MODULE_ENABLED
+// #define HAL_SPIE_MODULE_ENABLED
+// #define HAL_TWIE_MODULE_ENABLED
+
+#endif // NRF52_HAL_CONF_H__

ports/nrf/boards/pca10040/pins.csv

@@ -0,0 +1,30 @@
+PA2,PA2
+PA3,PA3
+PA4,PA4
+PA5,PA5
+PA6,PA6
+PA7,PA7
+PA8,PA8
+PA9,PA9
+PA10,PA10
+PA11,PA11
+PA12,PA12
+PA13,PA13
+PA14,PA14
+PA15,PA15
+PA16,PA16
+PA17,PA17
+PA18,PA18
+PA19,PA19
+PA20,PA20
+PA21,PA21
+PA22,PA22
+PA23,PA23
+PA24,PA24
+PA25,PA25
+PA26,PA26
+PA27,PA27
+PA28,PA28
+PA29,PA29
+PA30,PA30
+PA31,PA31

ports/nrf/boards/pca10056/mpconfigboard.h

@@ -0,0 +1,84 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#define PCA10056
+
+#define MICROPY_HW_BOARD_NAME       "PCA10056"
+#define MICROPY_HW_MCU_NAME         "NRF52840"
+#define MICROPY_PY_SYS_PLATFORM     "nrf52840-PDK"
+
+#define MICROPY_PY_MACHINE_HW_PWM   (1)
+#define MICROPY_PY_MACHINE_HW_SPI   (1)
+#define MICROPY_PY_MACHINE_TIMER    (1)
+#define MICROPY_PY_MACHINE_RTC      (1)
+#define MICROPY_PY_MACHINE_I2C      (1)
+#define MICROPY_PY_MACHINE_ADC      (1)
+#define MICROPY_PY_MACHINE_TEMP     (1)
+
+#define MICROPY_HW_HAS_LED          (1)
+#define MICROPY_HW_HAS_SWITCH       (0)
+#define MICROPY_HW_HAS_FLASH        (0)
+#define MICROPY_HW_HAS_SDCARD       (0)
+#define MICROPY_HW_HAS_MMA7660      (0)
+#define MICROPY_HW_HAS_LIS3DSH      (0)
+#define MICROPY_HW_HAS_LCD          (0)
+#define MICROPY_HW_ENABLE_RNG       (0)
+#define MICROPY_HW_ENABLE_RTC       (0)
+#define MICROPY_HW_ENABLE_TIMER     (0)
+#define MICROPY_HW_ENABLE_SERVO     (0)
+#define MICROPY_HW_ENABLE_DAC       (0)
+#define MICROPY_HW_ENABLE_CAN       (0)
+
+#define MICROPY_HW_LED_COUNT        (4)
+#define MICROPY_HW_LED_PULLUP       (1)
+
+#define MICROPY_HW_LED1             (13) // LED1
+#define MICROPY_HW_LED2             (14) // LED2
+#define MICROPY_HW_LED3             (15) // LED3
+#define MICROPY_HW_LED4             (16) // LED4
+
+// UART config
+#define MICROPY_HW_UART1_RX         (pin_A8)
+#define MICROPY_HW_UART1_TX         (pin_A6)
+#define MICROPY_HW_UART1_CTS        (pin_A7)
+#define MICROPY_HW_UART1_RTS        (pin_A5)
+#define MICROPY_HW_UART1_HWFC       (1)
+
+// SPI0 config
+#define MICROPY_HW_SPI0_NAME        "SPI0"
+
+#define MICROPY_HW_SPI0_SCK         (pin_B15)
+#define MICROPY_HW_SPI0_MOSI        (pin_B13)
+#define MICROPY_HW_SPI0_MISO        (pin_B14)
+
+#define MICROPY_HW_PWM0_NAME        "PWM0"
+#define MICROPY_HW_PWM1_NAME        "PWM1"
+#define MICROPY_HW_PWM2_NAME        "PWM2"
+#if 0
+#define MICROPY_HW_PWM3_NAME        "PWM3"
+#endif
+
+#define HELP_TEXT_BOARD_LED         "1,2,3,4"

ports/nrf/boards/pca10056/mpconfigboard.mk

@@ -0,0 +1,6 @@
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52840
+LD_FILE = boards/nrf52840_1M_256k.ld
+
+NRF_DEFINES += -DNRF52840_XXAA

ports/nrf/boards/pca10056/nrf52_hal_conf.h

@@ -0,0 +1,18 @@
+#ifndef NRF52_HAL_CONF_H__
+#define NRF52_HAL_CONF_H__
+
+// #define HAL_UART_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIME_MODULE_ENABLED
+#define HAL_PWM_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_TIMER_MODULE_ENABLED
+#define HAL_TWI_MODULE_ENABLED
+#define HAL_ADCE_MODULE_ENABLED
+#define HAL_TEMP_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+#define HAL_UARTE_MODULE_ENABLED
+// #define HAL_SPIE_MODULE_ENABLED
+// #define HAL_TWIE_MODULE_ENABLED
+
+#endif // NRF52_HAL_CONF_H__

ports/nrf/boards/pca10056/pins.csv

@@ -0,0 +1,48 @@
+PA0,PA0
+PA1,PA1
+PA2,PA2,ADC0_IN0
+PA3,PA3,ADC0_IN1
+PA4,PA4,ADC0_IN2
+PA5,PA5,ADC0_IN3
+PA6,PA6
+PA7,PA7
+PA8,PA8
+PA9,PA9
+PA10,PA10
+PA11,PA11
+PA12,PA12
+PA13,PA13
+PA14,PA14
+PA15,PA15
+PA16,PA16
+PA17,PA17
+PA18,PA18
+PA19,PA19
+PA20,PA20
+PA21,PA21
+PA22,PA22
+PA23,PA23
+PA24,PA24
+PA25,PA25
+PA26,PA26
+PA27,PA27
+PA28,PA28,ADC0_IN4
+PA29,PA29,ADC0_IN5
+PA30,PA30,ADC0_IN6
+PA31,PA31,ADC0_IN7
+PB0,PB0
+PB1,PB1
+PB2,PB2
+PB3,PB3
+PB4,PB4
+PB5,PB5
+PB6,PB6
+PB7,PB7
+PB8,PB8
+PB9,PB9
+PB10,PB10
+PB11,PB11
+PB12,PB12
+PB13,PB13
+PB14,PB14
+PB15,PB15

ports/nrf/builtin_open.c

@@ -0,0 +1,30 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2013, 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "extmod/vfs_fat_file.h"
+
+MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, fatfs_builtin_open);

ports/nrf/device/compiler_abstraction.h

@@ -0,0 +1,144 @@
+/* Copyright (c) 2016, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of Nordic Semiconductor ASA nor the names of its
+ *     contributors may be used to endorse or promote products derived from
+ *     this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#ifndef _COMPILER_ABSTRACTION_H
+#define _COMPILER_ABSTRACTION_H
+
+/*lint ++flb "Enter library region" */
+
+#if defined ( __CC_ARM )
+
+    #ifndef __ASM
+        #define __ASM               __asm
+    #endif
+
+    #ifndef __INLINE
+        #define __INLINE            __inline
+    #endif
+
+    #ifndef __WEAK
+        #define __WEAK              __weak
+    #endif
+
+    #ifndef __ALIGN
+        #define __ALIGN(n)          __align(n)
+    #endif
+
+    #ifndef __PACKED
+        #define __PACKED            __packed
+    #endif
+
+    #define GET_SP()                __current_sp()
+
+#elif defined ( __ICCARM__ )
+
+    #ifndef __ASM
+        #define __ASM               __asm
+    #endif
+
+    #ifndef __INLINE
+        #define __INLINE            inline
+    #endif
+
+    #ifndef __WEAK
+        #define __WEAK              __weak
+    #endif
+
+    #ifndef __ALIGN
+        #define STRING_PRAGMA(x) _Pragma(#x)
+        #define __ALIGN(n) STRING_PRAGMA(data_alignment = n)
+    #endif
+
+    #ifndef __PACKED
+        #define __PACKED            __packed
+    #endif
+    
+    #define GET_SP()                __get_SP()
+
+#elif defined   ( __GNUC__ )
+
+    #ifndef __ASM
+        #define __ASM               __asm
+    #endif
+
+    #ifndef __INLINE
+        #define __INLINE            inline
+    #endif
+
+    #ifndef __WEAK
+        #define __WEAK              __attribute__((weak))
+    #endif
+
+    #ifndef __ALIGN
+        #define __ALIGN(n)          __attribute__((aligned(n)))
+    #endif
+
+    #ifndef __PACKED
+        #define __PACKED           __attribute__((packed)) 
+    #endif
+
+    #define GET_SP()                gcc_current_sp()
+
+    static inline unsigned int gcc_current_sp(void)
+    {
+        register unsigned sp __ASM("sp");
+        return sp;
+    }
+
+#elif defined   ( __TASKING__ )
+
+    #ifndef __ASM
+        #define __ASM               __asm
+    #endif
+
+    #ifndef __INLINE
+        #define __INLINE            inline
+    #endif
+
+    #ifndef __WEAK
+        #define __WEAK              __attribute__((weak))
+    #endif
+
+    #ifndef __ALIGN
+        #define __ALIGN(n)          __align(n)
+    #endif
+    
+    /* Not defined for TASKING. */
+    #ifndef __PACKED
+        #define __PACKED
+    #endif
+
+    #define GET_SP()                __get_MSP()
+
+#endif
+
+/*lint --flb "Leave library region" */
+
+#endif

ports/nrf/device/nrf.h

@@ -0,0 +1,77 @@
+/* Copyright (c) 2016, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of Nordic Semiconductor ASA nor the names of its
+ *     contributors may be used to endorse or promote products derived from
+ *     this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#ifndef NRF_H
+#define NRF_H
+
+/* MDK version */
+#define MDK_MAJOR_VERSION   8
+#define MDK_MINOR_VERSION   11
+#define MDK_MICRO_VERSION   1
+
+/* Define NRF52_SERIES for common use in nRF52 series devices. */
+#if defined (NRF52832_XXAA) || defined (NRF52840_XXAA)
+    #define NRF52_SERIES
+#endif
+
+
+#if defined(_WIN32)
+    /* Do not include nrf specific files when building for PC host */
+#elif defined(__unix)
+    /* Do not include nrf specific files when building for PC host */
+#elif defined(__APPLE__)
+    /* Do not include nrf specific files when building for PC host */
+#else
+
+    /* Device selection for device includes. */
+    #if defined (NRF51)
+        #include "nrf51.h"
+        #include "nrf51_bitfields.h"
+        #include "nrf51_deprecated.h"
+    #elif defined (NRF52840_XXAA)
+        #include "nrf52840.h"
+        #include "nrf52840_bitfields.h"
+        #include "nrf51_to_nrf52840.h"
+        #include "nrf52_to_nrf52840.h"
+    #elif defined (NRF52832_XXAA)
+        #include "nrf52.h"
+        #include "nrf52_bitfields.h"
+        #include "nrf51_to_nrf52.h"
+        #include "nrf52_name_change.h"
+    #else
+        #error "Device must be defined. See nrf.h."
+    #endif /* NRF51, NRF52832_XXAA, NRF52840_XXAA */
+
+    #include "compiler_abstraction.h"
+
+#endif /* _WIN32 || __unix || __APPLE__ */
+
+#endif /* NRF_H */
+

ports/nrf/device/nrf51/nrf51_deprecated.h

@@ -0,0 +1,440 @@
+/* Copyright (c) 2016, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of Nordic Semiconductor ASA nor the names of its
+ *     contributors may be used to endorse or promote products derived from
+ *     this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#ifndef NRF51_DEPRECATED_H
+#define NRF51_DEPRECATED_H
+
+/*lint ++flb "Enter library region */
+
+/* This file is given to prevent your SW from not compiling with the updates made to nrf51.h and 
+ * nrf51_bitfields.h. The macros defined in this file were available previously. Do not use these
+ * macros on purpose. Use the ones defined in nrf51.h and nrf51_bitfields.h instead.
+ */
+
+/* NVMC */
+/* The register ERASEPROTECTEDPAGE is called ERASEPCR0 in the documentation. */
+#define ERASEPROTECTEDPAGE   ERASEPCR0
+
+ 
+/* LPCOMP */
+/* The interrupt ISR was renamed. Adding old name to the macros. */
+#define LPCOMP_COMP_IRQHandler          LPCOMP_IRQHandler
+#define LPCOMP_COMP_IRQn                LPCOMP_IRQn
+/* Corrected typo in RESULT register. */
+#define LPCOMP_RESULT_RESULT_Bellow     LPCOMP_RESULT_RESULT_Below
+ 
+ 
+/* MPU */
+/* The field MPU.PERR0.LPCOMP_COMP was renamed. Added into deprecated in case somebody was using the macros defined for it. */
+#define MPU_PERR0_LPCOMP_COMP_Pos           MPU_PERR0_LPCOMP_Pos
+#define MPU_PERR0_LPCOMP_COMP_Msk           MPU_PERR0_LPCOMP_Msk
+#define MPU_PERR0_LPCOMP_COMP_InRegion1     MPU_PERR0_LPCOMP_InRegion1
+#define MPU_PERR0_LPCOMP_COMP_InRegion0     MPU_PERR0_LPCOMP_InRegion0
+ 
+ 
+/* POWER */
+/* The field POWER.RAMON.OFFRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
+#define POWER_RAMON_OFFRAM3_Pos         (19UL)                                  
+#define POWER_RAMON_OFFRAM3_Msk         (0x1UL << POWER_RAMON_OFFRAM3_Pos)      
+#define POWER_RAMON_OFFRAM3_RAM3Off     (0UL)                                   
+#define POWER_RAMON_OFFRAM3_RAM3On      (1UL)                                   
+/* The field POWER.RAMON.OFFRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
+#define POWER_RAMON_OFFRAM2_Pos         (18UL)                                  
+#define POWER_RAMON_OFFRAM2_Msk         (0x1UL << POWER_RAMON_OFFRAM2_Pos)      
+#define POWER_RAMON_OFFRAM2_RAM2Off     (0UL)                                   
+#define POWER_RAMON_OFFRAM2_RAM2On      (1UL)                                  
+/* The field POWER.RAMON.ONRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
+#define POWER_RAMON_ONRAM3_Pos          (3UL)                                  
+#define POWER_RAMON_ONRAM3_Msk          (0x1UL << POWER_RAMON_ONRAM3_Pos)      
+#define POWER_RAMON_ONRAM3_RAM3Off      (0UL)                                  
+#define POWER_RAMON_ONRAM3_RAM3On       (1UL)                                  
+/* The field POWER.RAMON.ONRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
+#define POWER_RAMON_ONRAM2_Pos          (2UL)                                  
+#define POWER_RAMON_ONRAM2_Msk          (0x1UL << POWER_RAMON_ONRAM2_Pos)       
+#define POWER_RAMON_ONRAM2_RAM2Off      (0UL)                                  
+#define POWER_RAMON_ONRAM2_RAM2On       (1UL)                                 
+
+ 
+/* RADIO */
+/* The enumerated value RADIO.TXPOWER.TXPOWER.Neg40dBm was renamed. Added into deprecated with the new macro name. */
+#define RADIO_TXPOWER_TXPOWER_Neg40dBm  RADIO_TXPOWER_TXPOWER_Neg30dBm      
+/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
+#define RADIO_CRCCNF_SKIP_ADDR_Pos      RADIO_CRCCNF_SKIPADDR_Pos 
+#define RADIO_CRCCNF_SKIP_ADDR_Msk      RADIO_CRCCNF_SKIPADDR_Msk 
+#define RADIO_CRCCNF_SKIP_ADDR_Include  RADIO_CRCCNF_SKIPADDR_Include 
+#define RADIO_CRCCNF_SKIP_ADDR_Skip     RADIO_CRCCNF_SKIPADDR_Skip 
+/* The name of the field PLLLOCK was corrected. Old macros added for compatibility. */
+#define RADIO_TEST_PLL_LOCK_Pos         RADIO_TEST_PLLLOCK_Pos 
+#define RADIO_TEST_PLL_LOCK_Msk         RADIO_TEST_PLLLOCK_Msk 
+#define RADIO_TEST_PLL_LOCK_Disabled    RADIO_TEST_PLLLOCK_Disabled 
+#define RADIO_TEST_PLL_LOCK_Enabled     RADIO_TEST_PLLLOCK_Enabled 
+/* The name of the field CONSTCARRIER was corrected. Old macros added for compatibility. */
+#define RADIO_TEST_CONST_CARRIER_Pos        RADIO_TEST_CONSTCARRIER_Pos 
+#define RADIO_TEST_CONST_CARRIER_Msk        RADIO_TEST_CONSTCARRIER_Msk 
+#define RADIO_TEST_CONST_CARRIER_Disabled   RADIO_TEST_CONSTCARRIER_Disabled 
+#define RADIO_TEST_CONST_CARRIER_Enabled    RADIO_TEST_CONSTCARRIER_Enabled 
+
+
+/* FICR */
+/* The registers FICR.SIZERAMBLOCK0, FICR.SIZERAMBLOCK1, FICR.SIZERAMBLOCK2 and FICR.SIZERAMBLOCK3 were renamed into an array. */
+#define SIZERAMBLOCK0   SIZERAMBLOCKS                   
+#define SIZERAMBLOCK1   SIZERAMBLOCKS                   
+#define SIZERAMBLOCK2   SIZERAMBLOCK[2]                 /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */
+#define SIZERAMBLOCK3   SIZERAMBLOCK[3]                 /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */
+/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
+#define DEVICEID0       DEVICEID[0]                     
+#define DEVICEID1       DEVICEID[1]                     
+/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
+#define ER0             ER[0]                           
+#define ER1             ER[1]                          
+#define ER2             ER[2]                       
+#define ER3             ER[3]                      
+/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
+#define IR0             IR[0]                         
+#define IR1             IR[1]                         
+#define IR2             IR[2]                         
+#define IR3             IR[3]                          
+/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
+#define DEVICEADDR0     DEVICEADDR[0]                  
+#define DEVICEADDR1     DEVICEADDR[1]                  
+
+
+/* PPI */
+/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
+#define TASKS_CHG0EN     TASKS_CHG[0].EN                    
+#define TASKS_CHG0DIS    TASKS_CHG[0].DIS                  
+#define TASKS_CHG1EN     TASKS_CHG[1].EN                    
+#define TASKS_CHG1DIS    TASKS_CHG[1].DIS                  
+#define TASKS_CHG2EN     TASKS_CHG[2].EN                   
+#define TASKS_CHG2DIS    TASKS_CHG[2].DIS                  
+#define TASKS_CHG3EN     TASKS_CHG[3].EN                    
+#define TASKS_CHG3DIS    TASKS_CHG[3].DIS                  
+/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
+#define CH0_EEP          CH[0].EEP                          
+#define CH0_TEP          CH[0].TEP                          
+#define CH1_EEP          CH[1].EEP                         
+#define CH1_TEP          CH[1].TEP                         
+#define CH2_EEP          CH[2].EEP                          
+#define CH2_TEP          CH[2].TEP                         
+#define CH3_EEP          CH[3].EEP                          
+#define CH3_TEP          CH[3].TEP                         
+#define CH4_EEP          CH[4].EEP                         
+#define CH4_TEP          CH[4].TEP                         
+#define CH5_EEP          CH[5].EEP                          
+#define CH5_TEP          CH[5].TEP                          
+#define CH6_EEP          CH[6].EEP                          
+#define CH6_TEP          CH[6].TEP                         
+#define CH7_EEP          CH[7].EEP                          
+#define CH7_TEP          CH[7].TEP                          
+#define CH8_EEP          CH[8].EEP                         
+#define CH8_TEP          CH[8].TEP                          
+#define CH9_EEP          CH[9].EEP                          
+#define CH9_TEP          CH[9].TEP                          
+#define CH10_EEP         CH[10].EEP                         
+#define CH10_TEP         CH[10].TEP                         
+#define CH11_EEP         CH[11].EEP                         
+#define CH11_TEP         CH[11].TEP                         
+#define CH12_EEP         CH[12].EEP                         
+#define CH12_TEP         CH[12].TEP                         
+#define CH13_EEP         CH[13].EEP                         
+#define CH13_TEP         CH[13].TEP                         
+#define CH14_EEP         CH[14].EEP                         
+#define CH14_TEP         CH[14].TEP                         
+#define CH15_EEP         CH[15].EEP                         
+#define CH15_TEP         CH[15].TEP                        
+/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
+#define CHG0             CHG[0]                            
+#define CHG1             CHG[1]                            
+#define CHG2             CHG[2]                             
+#define CHG3             CHG[3]                           
+/* All bitfield macros for the CHGx registers therefore changed name. */
+#define PPI_CHG0_CH15_Pos       PPI_CHG_CH15_Pos            
+#define PPI_CHG0_CH15_Msk       PPI_CHG_CH15_Msk            
+#define PPI_CHG0_CH15_Excluded  PPI_CHG_CH15_Excluded       
+#define PPI_CHG0_CH15_Included  PPI_CHG_CH15_Included       
+#define PPI_CHG0_CH14_Pos       PPI_CHG_CH14_Pos            
+#define PPI_CHG0_CH14_Msk       PPI_CHG_CH14_Msk           
+#define PPI_CHG0_CH14_Excluded  PPI_CHG_CH14_Excluded       
+#define PPI_CHG0_CH14_Included  PPI_CHG_CH14_Included       
+#define PPI_CHG0_CH13_Pos       PPI_CHG_CH13_Pos            
+#define PPI_CHG0_CH13_Msk       PPI_CHG_CH13_Msk            
+#define PPI_CHG0_CH13_Excluded  PPI_CHG_CH13_Excluded      
+#define PPI_CHG0_CH13_Included  PPI_CHG_CH13_Included       
+#define PPI_CHG0_CH12_Pos       PPI_CHG_CH12_Pos            
+#define PPI_CHG0_CH12_Msk       PPI_CHG_CH12_Msk            
+#define PPI_CHG0_CH12_Excluded  PPI_CHG_CH12_Excluded       
+#define PPI_CHG0_CH12_Included  PPI_CHG_CH12_Included       
+#define PPI_CHG0_CH11_Pos       PPI_CHG_CH11_Pos            
+#define PPI_CHG0_CH11_Msk       PPI_CHG_CH11_Msk            
+#define PPI_CHG0_CH11_Excluded  PPI_CHG_CH11_Excluded       
+#define PPI_CHG0_CH11_Included  PPI_CHG_CH11_Included       
+#define PPI_CHG0_CH10_Pos       PPI_CHG_CH10_Pos            
+#define PPI_CHG0_CH10_Msk       PPI_CHG_CH10_Msk            
+#define PPI_CHG0_CH10_Excluded  PPI_CHG_CH10_Excluded       
+#define PPI_CHG0_CH10_Included  PPI_CHG_CH10_Included       
+#define PPI_CHG0_CH9_Pos        PPI_CHG_CH9_Pos             
+#define PPI_CHG0_CH9_Msk        PPI_CHG_CH9_Msk             
+#define PPI_CHG0_CH9_Excluded   PPI_CHG_CH9_Excluded        
+#define PPI_CHG0_CH9_Included   PPI_CHG_CH9_Included        
+#define PPI_CHG0_CH8_Pos        PPI_CHG_CH8_Pos             
+#define PPI_CHG0_CH8_Msk        PPI_CHG_CH8_Msk             
+#define PPI_CHG0_CH8_Excluded   PPI_CHG_CH8_Excluded        
+#define PPI_CHG0_CH8_Included   PPI_CHG_CH8_Included        
+#define PPI_CHG0_CH7_Pos        PPI_CHG_CH7_Pos             
+#define PPI_CHG0_CH7_Msk        PPI_CHG_CH7_Msk             
+#define PPI_CHG0_CH7_Excluded   PPI_CHG_CH7_Excluded        
+#define PPI_CHG0_CH7_Included   PPI_CHG_CH7_Included        
+#define PPI_CHG0_CH6_Pos        PPI_CHG_CH6_Pos             
+#define PPI_CHG0_CH6_Msk        PPI_CHG_CH6_Msk             
+#define PPI_CHG0_CH6_Excluded   PPI_CHG_CH6_Excluded        
+#define PPI_CHG0_CH6_Included   PPI_CHG_CH6_Included        
+#define PPI_CHG0_CH5_Pos        PPI_CHG_CH5_Pos             
+#define PPI_CHG0_CH5_Msk        PPI_CHG_CH5_Msk             
+#define PPI_CHG0_CH5_Excluded   PPI_CHG_CH5_Excluded       
+#define PPI_CHG0_CH5_Included   PPI_CHG_CH5_Included        
+#define PPI_CHG0_CH4_Pos        PPI_CHG_CH4_Pos             
+#define PPI_CHG0_CH4_Msk        PPI_CHG_CH4_Msk             
+#define PPI_CHG0_CH4_Excluded   PPI_CHG_CH4_Excluded       
+#define PPI_CHG0_CH4_Included   PPI_CHG_CH4_Included       
+#define PPI_CHG0_CH3_Pos        PPI_CHG_CH3_Pos             
+#define PPI_CHG0_CH3_Msk        PPI_CHG_CH3_Msk            
+#define PPI_CHG0_CH3_Excluded   PPI_CHG_CH3_Excluded        
+#define PPI_CHG0_CH3_Included   PPI_CHG_CH3_Included       
+#define PPI_CHG0_CH2_Pos        PPI_CHG_CH2_Pos            
+#define PPI_CHG0_CH2_Msk        PPI_CHG_CH2_Msk             
+#define PPI_CHG0_CH2_Excluded   PPI_CHG_CH2_Excluded       
+#define PPI_CHG0_CH2_Included   PPI_CHG_CH2_Included       
+#define PPI_CHG0_CH1_Pos        PPI_CHG_CH1_Pos            
+#define PPI_CHG0_CH1_Msk        PPI_CHG_CH1_Msk            
+#define PPI_CHG0_CH1_Excluded   PPI_CHG_CH1_Excluded        
+#define PPI_CHG0_CH1_Included   PPI_CHG_CH1_Included       
+#define PPI_CHG0_CH0_Pos        PPI_CHG_CH0_Pos            
+#define PPI_CHG0_CH0_Msk        PPI_CHG_CH0_Msk            
+#define PPI_CHG0_CH0_Excluded   PPI_CHG_CH0_Excluded        
+#define PPI_CHG0_CH0_Included   PPI_CHG_CH0_Included       
+#define PPI_CHG1_CH15_Pos       PPI_CHG_CH15_Pos           
+#define PPI_CHG1_CH15_Msk       PPI_CHG_CH15_Msk           
+#define PPI_CHG1_CH15_Excluded  PPI_CHG_CH15_Excluded       
+#define PPI_CHG1_CH15_Included  PPI_CHG_CH15_Included      
+#define PPI_CHG1_CH14_Pos       PPI_CHG_CH14_Pos           
+#define PPI_CHG1_CH14_Msk       PPI_CHG_CH14_Msk            
+#define PPI_CHG1_CH14_Excluded  PPI_CHG_CH14_Excluded      
+#define PPI_CHG1_CH14_Included  PPI_CHG_CH14_Included       
+#define PPI_CHG1_CH13_Pos       PPI_CHG_CH13_Pos           
+#define PPI_CHG1_CH13_Msk       PPI_CHG_CH13_Msk            
+#define PPI_CHG1_CH13_Excluded  PPI_CHG_CH13_Excluded      
+#define PPI_CHG1_CH13_Included  PPI_CHG_CH13_Included      
+#define PPI_CHG1_CH12_Pos       PPI_CHG_CH12_Pos            
+#define PPI_CHG1_CH12_Msk       PPI_CHG_CH12_Msk           
+#define PPI_CHG1_CH12_Excluded  PPI_CHG_CH12_Excluded      
+#define PPI_CHG1_CH12_Included  PPI_CHG_CH12_Included      
+#define PPI_CHG1_CH11_Pos       PPI_CHG_CH11_Pos            
+#define PPI_CHG1_CH11_Msk       PPI_CHG_CH11_Msk           
+#define PPI_CHG1_CH11_Excluded  PPI_CHG_CH11_Excluded      
+#define PPI_CHG1_CH11_Included  PPI_CHG_CH11_Included      
+#define PPI_CHG1_CH10_Pos       PPI_CHG_CH10_Pos           
+#define PPI_CHG1_CH10_Msk       PPI_CHG_CH10_Msk            
+#define PPI_CHG1_CH10_Excluded  PPI_CHG_CH10_Excluded      
+#define PPI_CHG1_CH10_Included  PPI_CHG_CH10_Included      
+#define PPI_CHG1_CH9_Pos        PPI_CHG_CH9_Pos            
+#define PPI_CHG1_CH9_Msk        PPI_CHG_CH9_Msk            
+#define PPI_CHG1_CH9_Excluded   PPI_CHG_CH9_Excluded       
+#define PPI_CHG1_CH9_Included   PPI_CHG_CH9_Included       
+#define PPI_CHG1_CH8_Pos        PPI_CHG_CH8_Pos            
+#define PPI_CHG1_CH8_Msk        PPI_CHG_CH8_Msk            
+#define PPI_CHG1_CH8_Excluded   PPI_CHG_CH8_Excluded       
+#define PPI_CHG1_CH8_Included   PPI_CHG_CH8_Included       
+#define PPI_CHG1_CH7_Pos        PPI_CHG_CH7_Pos             
+#define PPI_CHG1_CH7_Msk        PPI_CHG_CH7_Msk            
+#define PPI_CHG1_CH7_Excluded   PPI_CHG_CH7_Excluded        
+#define PPI_CHG1_CH7_Included   PPI_CHG_CH7_Included       
+#define PPI_CHG1_CH6_Pos        PPI_CHG_CH6_Pos             
+#define PPI_CHG1_CH6_Msk        PPI_CHG_CH6_Msk            
+#define PPI_CHG1_CH6_Excluded   PPI_CHG_CH6_Excluded       
+#define PPI_CHG1_CH6_Included   PPI_CHG_CH6_Included       
+#define PPI_CHG1_CH5_Pos        PPI_CHG_CH5_Pos             
+#define PPI_CHG1_CH5_Msk        PPI_CHG_CH5_Msk             
+#define PPI_CHG1_CH5_Excluded   PPI_CHG_CH5_Excluded       
+#define PPI_CHG1_CH5_Included   PPI_CHG_CH5_Included        
+#define PPI_CHG1_CH4_Pos        PPI_CHG_CH4_Pos             
+#define PPI_CHG1_CH4_Msk        PPI_CHG_CH4_Msk             
+#define PPI_CHG1_CH4_Excluded   PPI_CHG_CH4_Excluded        
+#define PPI_CHG1_CH4_Included   PPI_CHG_CH4_Included        
+#define PPI_CHG1_CH3_Pos        PPI_CHG_CH3_Pos            
+#define PPI_CHG1_CH3_Msk        PPI_CHG_CH3_Msk             
+#define PPI_CHG1_CH3_Excluded   PPI_CHG_CH3_Excluded        
+#define PPI_CHG1_CH3_Included   PPI_CHG_CH3_Included       
+#define PPI_CHG1_CH2_Pos        PPI_CHG_CH2_Pos            
+#define PPI_CHG1_CH2_Msk        PPI_CHG_CH2_Msk             
+#define PPI_CHG1_CH2_Excluded   PPI_CHG_CH2_Excluded        
+#define PPI_CHG1_CH2_Included   PPI_CHG_CH2_Included        
+#define PPI_CHG1_CH1_Pos        PPI_CHG_CH1_Pos             
+#define PPI_CHG1_CH1_Msk        PPI_CHG_CH1_Msk            
+#define PPI_CHG1_CH1_Excluded   PPI_CHG_CH1_Excluded        
+#define PPI_CHG1_CH1_Included   PPI_CHG_CH1_Included       
+#define PPI_CHG1_CH0_Pos        PPI_CHG_CH0_Pos             
+#define PPI_CHG1_CH0_Msk        PPI_CHG_CH0_Msk            
+#define PPI_CHG1_CH0_Excluded   PPI_CHG_CH0_Excluded       
+#define PPI_CHG1_CH0_Included   PPI_CHG_CH0_Included       
+#define PPI_CHG2_CH15_Pos       PPI_CHG_CH15_Pos           
+#define PPI_CHG2_CH15_Msk       PPI_CHG_CH15_Msk            
+#define PPI_CHG2_CH15_Excluded  PPI_CHG_CH15_Excluded      
+#define PPI_CHG2_CH15_Included  PPI_CHG_CH15_Included      
+#define PPI_CHG2_CH14_Pos       PPI_CHG_CH14_Pos           
+#define PPI_CHG2_CH14_Msk       PPI_CHG_CH14_Msk           
+#define PPI_CHG2_CH14_Excluded  PPI_CHG_CH14_Excluded       
+#define PPI_CHG2_CH14_Included  PPI_CHG_CH14_Included      
+#define PPI_CHG2_CH13_Pos       PPI_CHG_CH13_Pos           
+#define PPI_CHG2_CH13_Msk       PPI_CHG_CH13_Msk            
+#define PPI_CHG2_CH13_Excluded  PPI_CHG_CH13_Excluded       
+#define PPI_CHG2_CH13_Included  PPI_CHG_CH13_Included      
+#define PPI_CHG2_CH12_Pos       PPI_CHG_CH12_Pos            
+#define PPI_CHG2_CH12_Msk       PPI_CHG_CH12_Msk            
+#define PPI_CHG2_CH12_Excluded  PPI_CHG_CH12_Excluded      
+#define PPI_CHG2_CH12_Included  PPI_CHG_CH12_Included       
+#define PPI_CHG2_CH11_Pos       PPI_CHG_CH11_Pos           
+#define PPI_CHG2_CH11_Msk       PPI_CHG_CH11_Msk           
+#define PPI_CHG2_CH11_Excluded  PPI_CHG_CH11_Excluded       
+#define PPI_CHG2_CH11_Included  PPI_CHG_CH11_Included       
+#define PPI_CHG2_CH10_Pos       PPI_CHG_CH10_Pos            
+#define PPI_CHG2_CH10_Msk       PPI_CHG_CH10_Msk            
+#define PPI_CHG2_CH10_Excluded  PPI_CHG_CH10_Excluded      
+#define PPI_CHG2_CH10_Included  PPI_CHG_CH10_Included      
+#define PPI_CHG2_CH9_Pos        PPI_CHG_CH9_Pos            
+#define PPI_CHG2_CH9_Msk        PPI_CHG_CH9_Msk            
+#define PPI_CHG2_CH9_Excluded   PPI_CHG_CH9_Excluded        
+#define PPI_CHG2_CH9_Included   PPI_CHG_CH9_Included       
+#define PPI_CHG2_CH8_Pos        PPI_CHG_CH8_Pos            
+#define PPI_CHG2_CH8_Msk        PPI_CHG_CH8_Msk            
+#define PPI_CHG2_CH8_Excluded   PPI_CHG_CH8_Excluded       
+#define PPI_CHG2_CH8_Included   PPI_CHG_CH8_Included        
+#define PPI_CHG2_CH7_Pos        PPI_CHG_CH7_Pos            
+#define PPI_CHG2_CH7_Msk        PPI_CHG_CH7_Msk            
+#define PPI_CHG2_CH7_Excluded   PPI_CHG_CH7_Excluded       
+#define PPI_CHG2_CH7_Included   PPI_CHG_CH7_Included       
+#define PPI_CHG2_CH6_Pos        PPI_CHG_CH6_Pos            
+#define PPI_CHG2_CH6_Msk        PPI_CHG_CH6_Msk            
+#define PPI_CHG2_CH6_Excluded   PPI_CHG_CH6_Excluded       
+#define PPI_CHG2_CH6_Included   PPI_CHG_CH6_Included       
+#define PPI_CHG2_CH5_Pos        PPI_CHG_CH5_Pos            
+#define PPI_CHG2_CH5_Msk        PPI_CHG_CH5_Msk            
+#define PPI_CHG2_CH5_Excluded   PPI_CHG_CH5_Excluded       
+#define PPI_CHG2_CH5_Included   PPI_CHG_CH5_Included        
+#define PPI_CHG2_CH4_Pos        PPI_CHG_CH4_Pos             
+#define PPI_CHG2_CH4_Msk        PPI_CHG_CH4_Msk             
+#define PPI_CHG2_CH4_Excluded   PPI_CHG_CH4_Excluded        
+#define PPI_CHG2_CH4_Included   PPI_CHG_CH4_Included       
+#define PPI_CHG2_CH3_Pos        PPI_CHG_CH3_Pos            
+#define PPI_CHG2_CH3_Msk        PPI_CHG_CH3_Msk            
+#define PPI_CHG2_CH3_Excluded   PPI_CHG_CH3_Excluded       
+#define PPI_CHG2_CH3_Included   PPI_CHG_CH3_Included       
+#define PPI_CHG2_CH2_Pos        PPI_CHG_CH2_Pos            
+#define PPI_CHG2_CH2_Msk        PPI_CHG_CH2_Msk           
+#define PPI_CHG2_CH2_Excluded   PPI_CHG_CH2_Excluded       
+#define PPI_CHG2_CH2_Included   PPI_CHG_CH2_Included       
+#define PPI_CHG2_CH1_Pos        PPI_CHG_CH1_Pos             
+#define PPI_CHG2_CH1_Msk        PPI_CHG_CH1_Msk             
+#define PPI_CHG2_CH1_Excluded   PPI_CHG_CH1_Excluded       
+#define PPI_CHG2_CH1_Included   PPI_CHG_CH1_Included       
+#define PPI_CHG2_CH0_Pos        PPI_CHG_CH0_Pos            
+#define PPI_CHG2_CH0_Msk        PPI_CHG_CH0_Msk            
+#define PPI_CHG2_CH0_Excluded   PPI_CHG_CH0_Excluded       
+#define PPI_CHG2_CH0_Included   PPI_CHG_CH0_Included        
+#define PPI_CHG3_CH15_Pos       PPI_CHG_CH15_Pos           
+#define PPI_CHG3_CH15_Msk       PPI_CHG_CH15_Msk           
+#define PPI_CHG3_CH15_Excluded  PPI_CHG_CH15_Excluded     
+#define PPI_CHG3_CH15_Included  PPI_CHG_CH15_Included      
+#define PPI_CHG3_CH14_Pos       PPI_CHG_CH14_Pos          
+#define PPI_CHG3_CH14_Msk       PPI_CHG_CH14_Msk           
+#define PPI_CHG3_CH14_Excluded  PPI_CHG_CH14_Excluded      
+#define PPI_CHG3_CH14_Included  PPI_CHG_CH14_Included       
+#define PPI_CHG3_CH13_Pos       PPI_CHG_CH13_Pos           
+#define PPI_CHG3_CH13_Msk       PPI_CHG_CH13_Msk            
+#define PPI_CHG3_CH13_Excluded  PPI_CHG_CH13_Excluded      
+#define PPI_CHG3_CH13_Included  PPI_CHG_CH13_Included      
+#define PPI_CHG3_CH12_Pos       PPI_CHG_CH12_Pos            
+#define PPI_CHG3_CH12_Msk       PPI_CHG_CH12_Msk            
+#define PPI_CHG3_CH12_Excluded  PPI_CHG_CH12_Excluded       
+#define PPI_CHG3_CH12_Included  PPI_CHG_CH12_Included       
+#define PPI_CHG3_CH11_Pos       PPI_CHG_CH11_Pos            
+#define PPI_CHG3_CH11_Msk       PPI_CHG_CH11_Msk            
+#define PPI_CHG3_CH11_Excluded  PPI_CHG_CH11_Excluded      
+#define PPI_CHG3_CH11_Included  PPI_CHG_CH11_Included       
+#define PPI_CHG3_CH10_Pos       PPI_CHG_CH10_Pos            
+#define PPI_CHG3_CH10_Msk       PPI_CHG_CH10_Msk            
+#define PPI_CHG3_CH10_Excluded  PPI_CHG_CH10_Excluded      
+#define PPI_CHG3_CH10_Included  PPI_CHG_CH10_Included      
+#define PPI_CHG3_CH9_Pos        PPI_CHG_CH9_Pos            
+#define PPI_CHG3_CH9_Msk        PPI_CHG_CH9_Msk            
+#define PPI_CHG3_CH9_Excluded   PPI_CHG_CH9_Excluded       
+#define PPI_CHG3_CH9_Included   PPI_CHG_CH9_Included       
+#define PPI_CHG3_CH8_Pos        PPI_CHG_CH8_Pos            
+#define PPI_CHG3_CH8_Msk        PPI_CHG_CH8_Msk             
+#define PPI_CHG3_CH8_Excluded   PPI_CHG_CH8_Excluded       
+#define PPI_CHG3_CH8_Included   PPI_CHG_CH8_Included       
+#define PPI_CHG3_CH7_Pos        PPI_CHG_CH7_Pos             
+#define PPI_CHG3_CH7_Msk        PPI_CHG_CH7_Msk            
+#define PPI_CHG3_CH7_Excluded   PPI_CHG_CH7_Excluded        
+#define PPI_CHG3_CH7_Included   PPI_CHG_CH7_Included       
+#define PPI_CHG3_CH6_Pos        PPI_CHG_CH6_Pos             
+#define PPI_CHG3_CH6_Msk        PPI_CHG_CH6_Msk             
+#define PPI_CHG3_CH6_Excluded   PPI_CHG_CH6_Excluded       
+#define PPI_CHG3_CH6_Included   PPI_CHG_CH6_Included        
+#define PPI_CHG3_CH5_Pos        PPI_CHG_CH5_Pos             
+#define PPI_CHG3_CH5_Msk        PPI_CHG_CH5_Msk             
+#define PPI_CHG3_CH5_Excluded   PPI_CHG_CH5_Excluded        
+#define PPI_CHG3_CH5_Included   PPI_CHG_CH5_Included       
+#define PPI_CHG3_CH4_Pos        PPI_CHG_CH4_Pos             
+#define PPI_CHG3_CH4_Msk        PPI_CHG_CH4_Msk            
+#define PPI_CHG3_CH4_Excluded   PPI_CHG_CH4_Excluded        
+#define PPI_CHG3_CH4_Included   PPI_CHG_CH4_Included        
+#define PPI_CHG3_CH3_Pos        PPI_CHG_CH3_Pos             
+#define PPI_CHG3_CH3_Msk        PPI_CHG_CH3_Msk            
+#define PPI_CHG3_CH3_Excluded   PPI_CHG_CH3_Excluded        
+#define PPI_CHG3_CH3_Included   PPI_CHG_CH3_Included        
+#define PPI_CHG3_CH2_Pos        PPI_CHG_CH2_Pos             
+#define PPI_CHG3_CH2_Msk        PPI_CHG_CH2_Msk             
+#define PPI_CHG3_CH2_Excluded   PPI_CHG_CH2_Excluded        
+#define PPI_CHG3_CH2_Included   PPI_CHG_CH2_Included       
+#define PPI_CHG3_CH1_Pos        PPI_CHG_CH1_Pos             
+#define PPI_CHG3_CH1_Msk        PPI_CHG_CH1_Msk             
+#define PPI_CHG3_CH1_Excluded   PPI_CHG_CH1_Excluded        
+#define PPI_CHG3_CH1_Included   PPI_CHG_CH1_Included        
+#define PPI_CHG3_CH0_Pos        PPI_CHG_CH0_Pos             
+#define PPI_CHG3_CH0_Msk        PPI_CHG_CH0_Msk             
+#define PPI_CHG3_CH0_Excluded   PPI_CHG_CH0_Excluded        
+#define PPI_CHG3_CH0_Included   PPI_CHG_CH0_Included        
+
+
+
+/*lint --flb "Leave library region" */
+
+#endif /* NRF51_DEPRECATED_H */
+

ports/nrf/device/nrf51/startup_nrf51822.c

@@ -0,0 +1,151 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+
+extern uint32_t _estack;
+extern uint32_t _sidata;
+extern uint32_t _sdata;
+extern uint32_t _edata;
+extern uint32_t _sbss;
+extern uint32_t _ebss;
+
+typedef void (*func)(void);
+
+extern void  _start(void) __attribute__((noreturn));
+extern void SystemInit(void);
+
+void Default_Handler(void) {
+    while (1);
+}
+
+void Reset_Handler(void) {
+    uint32_t * ram_on_addr   = (uint32_t *)0x40000524;
+    uint32_t * ram_on_b_addr = (uint32_t *)0x40000554;
+    // RAM on in on-mode
+    *ram_on_addr   = 3; // block 0 and 1
+    *ram_on_b_addr = 3; // block 2 and 3
+#if 0 
+    // RAM on in off-mode 
+    ram_on_addr   = 1 << 16;
+    ram_on_b_addr = 1 << 17;
+#endif
+
+    uint32_t * p_src  = &_sidata;
+    uint32_t * p_dest = &_sdata;
+
+    while (p_dest < &_edata) {
+      *p_dest++ = *p_src++;
+    }
+
+    uint32_t * p_bss     = &_sbss;
+    uint32_t * p_bss_end = &_ebss;
+    while (p_bss < p_bss_end) {
+        *p_bss++ = 0ul;
+    }
+
+    SystemInit();
+    _start();
+}
+
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void POWER_CLOCK_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void RADIO_IRQHandler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART0_IRQHandler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPI0_TWI0_IRQHandler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPI1_TWI1_IRQHandler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void GPIOTE_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void ADC_IRQHandler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER0_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER1_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER2_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC0_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void TEMP_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void RNG_IRQHandler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void ECB_IRQHandler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void CCM_AAR_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void WDT_IRQHandler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC1_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void QDEC_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void LPCOMP_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI0_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI1_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI2_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI3_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI4_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI5_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+const func __Vectors[] __attribute__ ((section(".isr_vector"))) = {
+    (func)&_estack,
+    Reset_Handler,
+    NMI_Handler,
+    HardFault_Handler,
+    0,
+    0,
+    0,
+    0,
+    0,
+    0,
+    0,
+    SVC_Handler,
+    0,
+    0,
+    PendSV_Handler,
+    SysTick_Handler,
+
+    /* External Interrupts */
+    POWER_CLOCK_IRQHandler,
+    RADIO_IRQHandler,
+    UART0_IRQHandler,
+    SPI0_TWI0_IRQHandler,
+    SPI1_TWI1_IRQHandler,
+    0,
+    GPIOTE_IRQHandler,
+    ADC_IRQHandler,
+    TIMER0_IRQHandler,
+    TIMER1_IRQHandler,
+    TIMER2_IRQHandler,
+    RTC0_IRQHandler,
+    TEMP_IRQHandler,
+    RNG_IRQHandler,
+    ECB_IRQHandler,
+    CCM_AAR_IRQHandler,
+    WDT_IRQHandler,
+    RTC1_IRQHandler,
+    QDEC_IRQHandler,
+    LPCOMP_IRQHandler,
+    SWI0_IRQHandler,
+    SWI1_IRQHandler,
+    SWI2_IRQHandler,
+    SWI3_IRQHandler,
+    SWI4_IRQHandler,
+    SWI5_IRQHandler
+};

ports/nrf/device/nrf51/system_nrf51.h

@@ -0,0 +1,69 @@
+/* Copyright (c) 2012 ARM LIMITED
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of ARM nor the names of its contributors may be used to
+ *     endorse or promote products derived from this software without specific
+ *     prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#ifndef SYSTEM_NRF51_H
+#define SYSTEM_NRF51_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+
+extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
+
+/**
+ * Initialize the system
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock 
+ *         retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_NRF51_H */

ports/nrf/device/nrf51/system_nrf51822.c

@@ -0,0 +1,151 @@
+/* Copyright (c) 2012 ARM LIMITED
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of ARM nor the names of its contributors may be used to
+ *     endorse or promote products derived from this software without specific
+ *     prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/* NOTE: Template files (including this one) are application specific and therefore expected to
+   be copied into the application project folder prior to its use! */
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "nrf.h"
+#include "system_nrf51.h"
+
+/*lint ++flb "Enter library region" */
+
+
+#define __SYSTEM_CLOCK      (16000000UL)     /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
+
+static bool is_manual_peripheral_setup_needed(void);
+static bool is_disabled_in_debug_needed(void);
+static bool is_peripheral_domain_setup_needed(void);
+
+
+#if defined ( __CC_ARM )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
+#elif defined ( __ICCARM__ )
+    __root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
+#elif defined   ( __GNUC__ )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
+#endif
+
+void SystemCoreClockUpdate(void)
+{
+    SystemCoreClock = __SYSTEM_CLOCK;
+}
+
+void SystemInit(void)
+{
+    /* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
+       It can also be done in the application main() function. */
+
+    /* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
+       to enable the use of peripherals" found at Product Anomaly document for your device found at
+       https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
+       that do not need it is that the new peripherals in the second generation devices (LPCOMP for
+       example) will not be available. */
+    if (is_manual_peripheral_setup_needed())
+    {
+        *(uint32_t volatile *)0x40000504 = 0xC007FFDF;
+        *(uint32_t volatile *)0x40006C18 = 0x00008000;
+    }
+
+    /* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
+       register is incorrect" found at Product Anomaly document for your device found at
+       https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
+    if (is_disabled_in_debug_needed())
+    {
+        NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
+    }
+
+    /* Execute the following code to eliminate excessive current in sleep mode with RAM retention in nRF51802 devices,
+       as indicated by PAN 76 "System: Excessive current in sleep mode with retention" found at Product Anomaly document
+       for your device found at https://www.nordicsemi.com/. */
+    if (is_peripheral_domain_setup_needed()){
+        if (*(uint32_t volatile *)0x4006EC00 != 1){
+            *(uint32_t volatile *)0x4006EC00 = 0x9375;
+            while (*(uint32_t volatile *)0x4006EC00 != 1){
+            }
+        }
+        *(uint32_t volatile *)0x4006EC14 = 0xC0;
+    }
+}
+
+
+static bool is_manual_peripheral_setup_needed(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
+    {
+        if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x00) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
+        {
+            return true;
+        }
+        if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x10) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
+        {
+            return true;
+        }
+        if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
+        {
+            return true;
+        }
+    }
+
+    return false;
+}
+
+static bool is_disabled_in_debug_needed(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
+    {
+        if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
+        {
+            return true;
+        }
+    }
+
+    return false;
+}
+
+static bool is_peripheral_domain_setup_needed(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
+    {
+        if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0xA0) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
+        {
+            return true;
+        }
+        if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0xD0) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
+        {
+            return true;
+        }
+    }
+
+    return false;
+}
+
+/*lint --flb "Leave library region" */

ports/nrf/device/nrf52/nrf51_to_nrf52.h

@@ -0,0 +1,952 @@
+/* Copyright (c) 2016, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of Nordic Semiconductor ASA nor the names of its
+ *     contributors may be used to endorse or promote products derived from
+ *     this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#ifndef NRF51_TO_NRF52_H
+#define NRF51_TO_NRF52_H
+
+/*lint ++flb "Enter library region */
+
+/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52 devices.
+ * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the
+ * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
+ * from the nrf51_deprecated.h file. */
+
+
+/* IRQ */
+/* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */
+#define UART0_IRQHandler        UARTE0_UART0_IRQHandler
+#define SPI0_TWI0_IRQHandler    SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+#define SPI1_TWI1_IRQHandler    SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+#define ADC_IRQHandler          SAADC_IRQHandler
+#define LPCOMP_IRQHandler       COMP_LPCOMP_IRQHandler
+#define SWI0_IRQHandler         SWI0_EGU0_IRQHandler
+#define SWI1_IRQHandler         SWI1_EGU1_IRQHandler
+#define SWI2_IRQHandler         SWI2_EGU2_IRQHandler
+#define SWI3_IRQHandler         SWI3_EGU3_IRQHandler
+#define SWI4_IRQHandler         SWI4_EGU4_IRQHandler
+#define SWI5_IRQHandler         SWI5_EGU5_IRQHandler
+
+#define UART0_IRQn              UARTE0_UART0_IRQn
+#define SPI0_TWI0_IRQn          SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn
+#define SPI1_TWI1_IRQn          SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn
+#define ADC_IRQn                SAADC_IRQn
+#define LPCOMP_IRQn             COMP_LPCOMP_IRQn
+#define SWI0_IRQn               SWI0_EGU0_IRQn
+#define SWI1_IRQn               SWI1_EGU1_IRQn
+#define SWI2_IRQn               SWI2_EGU2_IRQn
+#define SWI3_IRQn               SWI3_EGU3_IRQn
+#define SWI4_IRQn               SWI4_EGU4_IRQn
+#define SWI5_IRQn               SWI5_EGU5_IRQn
+
+
+/* UICR */
+/* Register RBPCONF was renamed to APPROTECT. */
+#define RBPCONF     APPROTECT
+
+#define UICR_RBPCONF_PALL_Pos           UICR_APPROTECT_PALL_Pos
+#define UICR_RBPCONF_PALL_Msk           UICR_APPROTECT_PALL_Msk
+#define UICR_RBPCONF_PALL_Enabled       UICR_APPROTECT_PALL_Enabled
+#define UICR_RBPCONF_PALL_Disabled      UICR_APPROTECT_PALL_Disabled
+
+
+/* GPIO */
+/* GPIO port was renamed to P0. */
+#define NRF_GPIO        NRF_P0
+#define NRF_GPIO_BASE   NRF_P0_BASE
+
+
+/* QDEC */
+/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */
+#define PSELLED     PSEL.LED
+#define PSELA       PSEL.A
+#define PSELB       PSEL.B
+
+
+/* SPIS */
+/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */
+#define PSELSCK       PSEL.SCK
+#define PSELMISO      PSEL.MISO
+#define PSELMOSI      PSEL.MOSI
+#define PSELCSN       PSEL.CSN
+
+/* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */
+#define RXDPTR        RXD.PTR
+#define MAXRX         RXD.MAXCNT
+#define AMOUNTRX      RXD.AMOUNT
+
+#define SPIS_MAXRX_MAXRX_Pos        SPIS_RXD_MAXCNT_MAXCNT_Pos
+#define SPIS_MAXRX_MAXRX_Msk        SPIS_RXD_MAXCNT_MAXCNT_Msk
+
+#define SPIS_AMOUNTRX_AMOUNTRX_Pos  SPIS_RXD_AMOUNT_AMOUNT_Pos
+#define SPIS_AMOUNTRX_AMOUNTRX_Msk  SPIS_RXD_AMOUNT_AMOUNT_Msk
+
+/* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */
+#define TXDPTR        TXD.PTR
+#define MAXTX         TXD.MAXCNT
+#define AMOUNTTX      TXD.AMOUNT
+
+#define SPIS_MAXTX_MAXTX_Pos        SPIS_TXD_MAXCNT_MAXCNT_Pos
+#define SPIS_MAXTX_MAXTX_Msk        SPIS_TXD_MAXCNT_MAXCNT_Msk
+
+#define SPIS_AMOUNTTX_AMOUNTTX_Pos  SPIS_TXD_AMOUNT_AMOUNT_Pos
+#define SPIS_AMOUNTTX_AMOUNTTX_Msk  SPIS_TXD_AMOUNT_AMOUNT_Msk
+
+
+/* MPU */
+/* Part of MPU module was renamed BPROT, while the rest was eliminated. */
+#define NRF_MPU     NRF_BPROT
+
+/* Register DISABLEINDEBUG macros were affected. */
+#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos       BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos
+#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Msk       BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk
+#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Enabled   BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled
+#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled  BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled
+
+/* Registers PROTENSET0 and PROTENSET1 were affected and renamed as CONFIG0 and CONFIG1. */
+#define PROTENSET0  CONFIG0
+#define PROTENSET1  CONFIG1
+
+#define MPU_PROTENSET1_PROTREG63_Pos        BPROT_CONFIG1_REGION63_Pos
+#define MPU_PROTENSET1_PROTREG63_Msk        BPROT_CONFIG1_REGION63_Msk
+#define MPU_PROTENSET1_PROTREG63_Disabled   BPROT_CONFIG1_REGION63_Disabled
+#define MPU_PROTENSET1_PROTREG63_Enabled    BPROT_CONFIG1_REGION63_Enabled
+#define MPU_PROTENSET1_PROTREG63_Set        BPROT_CONFIG1_REGION63_Enabled
+
+#define MPU_PROTENSET1_PROTREG62_Pos        BPROT_CONFIG1_REGION62_Pos
+#define MPU_PROTENSET1_PROTREG62_Msk        BPROT_CONFIG1_REGION62_Msk
+#define MPU_PROTENSET1_PROTREG62_Disabled   BPROT_CONFIG1_REGION62_Disabled
+#define MPU_PROTENSET1_PROTREG62_Enabled    BPROT_CONFIG1_REGION62_Enabled
+#define MPU_PROTENSET1_PROTREG62_Set        BPROT_CONFIG1_REGION62_Enabled
+
+#define MPU_PROTENSET1_PROTREG61_Pos        BPROT_CONFIG1_REGION61_Pos
+#define MPU_PROTENSET1_PROTREG61_Msk        BPROT_CONFIG1_REGION61_Msk
+#define MPU_PROTENSET1_PROTREG61_Disabled   BPROT_CONFIG1_REGION61_Disabled
+#define MPU_PROTENSET1_PROTREG61_Enabled    BPROT_CONFIG1_REGION61_Enabled
+#define MPU_PROTENSET1_PROTREG61_Set        BPROT_CONFIG1_REGION61_Enabled
+
+#define MPU_PROTENSET1_PROTREG60_Pos        BPROT_CONFIG1_REGION60_Pos
+#define MPU_PROTENSET1_PROTREG60_Msk        BPROT_CONFIG1_REGION60_Msk
+#define MPU_PROTENSET1_PROTREG60_Disabled   BPROT_CONFIG1_REGION60_Disabled
+#define MPU_PROTENSET1_PROTREG60_Enabled    BPROT_CONFIG1_REGION60_Enabled
+#define MPU_PROTENSET1_PROTREG60_Set        BPROT_CONFIG1_REGION60_Enabled
+
+#define MPU_PROTENSET1_PROTREG59_Pos        BPROT_CONFIG1_REGION59_Pos
+#define MPU_PROTENSET1_PROTREG59_Msk        BPROT_CONFIG1_REGION59_Msk
+#define MPU_PROTENSET1_PROTREG59_Disabled   BPROT_CONFIG1_REGION59_Disabled
+#define MPU_PROTENSET1_PROTREG59_Enabled    BPROT_CONFIG1_REGION59_Enabled
+#define MPU_PROTENSET1_PROTREG59_Set        BPROT_CONFIG1_REGION59_Enabled
+
+#define MPU_PROTENSET1_PROTREG58_Pos        BPROT_CONFIG1_REGION58_Pos
+#define MPU_PROTENSET1_PROTREG58_Msk        BPROT_CONFIG1_REGION58_Msk
+#define MPU_PROTENSET1_PROTREG58_Disabled   BPROT_CONFIG1_REGION58_Disabled
+#define MPU_PROTENSET1_PROTREG58_Enabled    BPROT_CONFIG1_REGION58_Enabled
+#define MPU_PROTENSET1_PROTREG58_Set        BPROT_CONFIG1_REGION58_Enabled
+
+#define MPU_PROTENSET1_PROTREG57_Pos        BPROT_CONFIG1_REGION57_Pos
+#define MPU_PROTENSET1_PROTREG57_Msk        BPROT_CONFIG1_REGION57_Msk
+#define MPU_PROTENSET1_PROTREG57_Disabled   BPROT_CONFIG1_REGION57_Disabled
+#define MPU_PROTENSET1_PROTREG57_Enabled    BPROT_CONFIG1_REGION57_Enabled
+#define MPU_PROTENSET1_PROTREG57_Set        BPROT_CONFIG1_REGION57_Enabled
+
+#define MPU_PROTENSET1_PROTREG56_Pos        BPROT_CONFIG1_REGION56_Pos
+#define MPU_PROTENSET1_PROTREG56_Msk        BPROT_CONFIG1_REGION56_Msk
+#define MPU_PROTENSET1_PROTREG56_Disabled   BPROT_CONFIG1_REGION56_Disabled
+#define MPU_PROTENSET1_PROTREG56_Enabled    BPROT_CONFIG1_REGION56_Enabled
+#define MPU_PROTENSET1_PROTREG56_Set        BPROT_CONFIG1_REGION56_Enabled
+
+#define MPU_PROTENSET1_PROTREG55_Pos        BPROT_CONFIG1_REGION55_Pos
+#define MPU_PROTENSET1_PROTREG55_Msk        BPROT_CONFIG1_REGION55_Msk
+#define MPU_PROTENSET1_PROTREG55_Disabled   BPROT_CONFIG1_REGION55_Disabled
+#define MPU_PROTENSET1_PROTREG55_Enabled    BPROT_CONFIG1_REGION55_Enabled
+#define MPU_PROTENSET1_PROTREG55_Set        BPROT_CONFIG1_REGION55_Enabled
+
+#define MPU_PROTENSET1_PROTREG54_Pos        BPROT_CONFIG1_REGION54_Pos
+#define MPU_PROTENSET1_PROTREG54_Msk        BPROT_CONFIG1_REGION54_Msk
+#define MPU_PROTENSET1_PROTREG54_Disabled   BPROT_CONFIG1_REGION54_Disabled
+#define MPU_PROTENSET1_PROTREG54_Enabled    BPROT_CONFIG1_REGION54_Enabled
+#define MPU_PROTENSET1_PROTREG54_Set        BPROT_CONFIG1_REGION54_Enabled
+
+#define MPU_PROTENSET1_PROTREG53_Pos        BPROT_CONFIG1_REGION53_Pos
+#define MPU_PROTENSET1_PROTREG53_Msk        BPROT_CONFIG1_REGION53_Msk
+#define MPU_PROTENSET1_PROTREG53_Disabled   BPROT_CONFIG1_REGION53_Disabled
+#define MPU_PROTENSET1_PROTREG53_Enabled    BPROT_CONFIG1_REGION53_Enabled
+#define MPU_PROTENSET1_PROTREG53_Set        BPROT_CONFIG1_REGION53_Enabled
+
+#define MPU_PROTENSET1_PROTREG52_Pos        BPROT_CONFIG1_REGION52_Pos
+#define MPU_PROTENSET1_PROTREG52_Msk        BPROT_CONFIG1_REGION52_Msk
+#define MPU_PROTENSET1_PROTREG52_Disabled   BPROT_CONFIG1_REGION52_Disabled
+#define MPU_PROTENSET1_PROTREG52_Enabled    BPROT_CONFIG1_REGION52_Enabled
+#define MPU_PROTENSET1_PROTREG52_Set        BPROT_CONFIG1_REGION52_Enabled
+
+#define MPU_PROTENSET1_PROTREG51_Pos        BPROT_CONFIG1_REGION51_Pos
+#define MPU_PROTENSET1_PROTREG51_Msk        BPROT_CONFIG1_REGION51_Msk
+#define MPU_PROTENSET1_PROTREG51_Disabled   BPROT_CONFIG1_REGION51_Disabled
+#define MPU_PROTENSET1_PROTREG51_Enabled    BPROT_CONFIG1_REGION51_Enabled
+#define MPU_PROTENSET1_PROTREG51_Set        BPROT_CONFIG1_REGION51_Enabled
+
+#define MPU_PROTENSET1_PROTREG50_Pos        BPROT_CONFIG1_REGION50_Pos
+#define MPU_PROTENSET1_PROTREG50_Msk        BPROT_CONFIG1_REGION50_Msk
+#define MPU_PROTENSET1_PROTREG50_Disabled   BPROT_CONFIG1_REGION50_Disabled
+#define MPU_PROTENSET1_PROTREG50_Enabled    BPROT_CONFIG1_REGION50_Enabled
+#define MPU_PROTENSET1_PROTREG50_Set        BPROT_CONFIG1_REGION50_Enabled
+
+#define MPU_PROTENSET1_PROTREG49_Pos        BPROT_CONFIG1_REGION49_Pos
+#define MPU_PROTENSET1_PROTREG49_Msk        BPROT_CONFIG1_REGION49_Msk
+#define MPU_PROTENSET1_PROTREG49_Disabled   BPROT_CONFIG1_REGION49_Disabled
+#define MPU_PROTENSET1_PROTREG49_Enabled    BPROT_CONFIG1_REGION49_Enabled
+#define MPU_PROTENSET1_PROTREG49_Set        BPROT_CONFIG1_REGION49_Enabled
+
+#define MPU_PROTENSET1_PROTREG48_Pos        BPROT_CONFIG1_REGION48_Pos
+#define MPU_PROTENSET1_PROTREG48_Msk        BPROT_CONFIG1_REGION48_Msk
+#define MPU_PROTENSET1_PROTREG48_Disabled   BPROT_CONFIG1_REGION48_Disabled
+#define MPU_PROTENSET1_PROTREG48_Enabled    BPROT_CONFIG1_REGION48_Enabled
+#define MPU_PROTENSET1_PROTREG48_Set        BPROT_CONFIG1_REGION48_Enabled
+
+#define MPU_PROTENSET1_PROTREG47_Pos        BPROT_CONFIG1_REGION47_Pos
+#define MPU_PROTENSET1_PROTREG47_Msk        BPROT_CONFIG1_REGION47_Msk
+#define MPU_PROTENSET1_PROTREG47_Disabled   BPROT_CONFIG1_REGION47_Disabled
+#define MPU_PROTENSET1_PROTREG47_Enabled    BPROT_CONFIG1_REGION47_Enabled
+#define MPU_PROTENSET1_PROTREG47_Set        BPROT_CONFIG1_REGION47_Enabled
+
+#define MPU_PROTENSET1_PROTREG46_Pos        BPROT_CONFIG1_REGION46_Pos
+#define MPU_PROTENSET1_PROTREG46_Msk        BPROT_CONFIG1_REGION46_Msk
+#define MPU_PROTENSET1_PROTREG46_Disabled   BPROT_CONFIG1_REGION46_Disabled
+#define MPU_PROTENSET1_PROTREG46_Enabled    BPROT_CONFIG1_REGION46_Enabled
+#define MPU_PROTENSET1_PROTREG46_Set        BPROT_CONFIG1_REGION46_Enabled
+
+#define MPU_PROTENSET1_PROTREG45_Pos        BPROT_CONFIG1_REGION45_Pos
+#define MPU_PROTENSET1_PROTREG45_Msk        BPROT_CONFIG1_REGION45_Msk
+#define MPU_PROTENSET1_PROTREG45_Disabled   BPROT_CONFIG1_REGION45_Disabled
+#define MPU_PROTENSET1_PROTREG45_Enabled    BPROT_CONFIG1_REGION45_Enabled
+#define MPU_PROTENSET1_PROTREG45_Set        BPROT_CONFIG1_REGION45_Enabled
+
+#define MPU_PROTENSET1_PROTREG44_Pos        BPROT_CONFIG1_REGION44_Pos
+#define MPU_PROTENSET1_PROTREG44_Msk        BPROT_CONFIG1_REGION44_Msk
+#define MPU_PROTENSET1_PROTREG44_Disabled   BPROT_CONFIG1_REGION44_Disabled
+#define MPU_PROTENSET1_PROTREG44_Enabled    BPROT_CONFIG1_REGION44_Enabled
+#define MPU_PROTENSET1_PROTREG44_Set        BPROT_CONFIG1_REGION44_Enabled
+
+#define MPU_PROTENSET1_PROTREG43_Pos        BPROT_CONFIG1_REGION43_Pos
+#define MPU_PROTENSET1_PROTREG43_Msk        BPROT_CONFIG1_REGION43_Msk
+#define MPU_PROTENSET1_PROTREG43_Disabled   BPROT_CONFIG1_REGION43_Disabled
+#define MPU_PROTENSET1_PROTREG43_Enabled    BPROT_CONFIG1_REGION43_Enabled
+#define MPU_PROTENSET1_PROTREG43_Set        BPROT_CONFIG1_REGION43_Enabled
+
+#define MPU_PROTENSET1_PROTREG42_Pos        BPROT_CONFIG1_REGION42_Pos
+#define MPU_PROTENSET1_PROTREG42_Msk        BPROT_CONFIG1_REGION42_Msk
+#define MPU_PROTENSET1_PROTREG42_Disabled   BPROT_CONFIG1_REGION42_Disabled
+#define MPU_PROTENSET1_PROTREG42_Enabled    BPROT_CONFIG1_REGION42_Enabled
+#define MPU_PROTENSET1_PROTREG42_Set        BPROT_CONFIG1_REGION42_Enabled
+
+#define MPU_PROTENSET1_PROTREG41_Pos        BPROT_CONFIG1_REGION41_Pos
+#define MPU_PROTENSET1_PROTREG41_Msk        BPROT_CONFIG1_REGION41_Msk
+#define MPU_PROTENSET1_PROTREG41_Disabled   BPROT_CONFIG1_REGION41_Disabled
+#define MPU_PROTENSET1_PROTREG41_Enabled    BPROT_CONFIG1_REGION41_Enabled
+#define MPU_PROTENSET1_PROTREG41_Set        BPROT_CONFIG1_REGION41_Enabled
+
+#define MPU_PROTENSET1_PROTREG40_Pos        BPROT_CONFIG1_REGION40_Pos
+#define MPU_PROTENSET1_PROTREG40_Msk        BPROT_CONFIG1_REGION40_Msk
+#define MPU_PROTENSET1_PROTREG40_Disabled   BPROT_CONFIG1_REGION40_Disabled
+#define MPU_PROTENSET1_PROTREG40_Enabled    BPROT_CONFIG1_REGION40_Enabled
+#define MPU_PROTENSET1_PROTREG40_Set        BPROT_CONFIG1_REGION40_Enabled
+
+#define MPU_PROTENSET1_PROTREG39_Pos        BPROT_CONFIG1_REGION39_Pos
+#define MPU_PROTENSET1_PROTREG39_Msk        BPROT_CONFIG1_REGION39_Msk
+#define MPU_PROTENSET1_PROTREG39_Disabled   BPROT_CONFIG1_REGION39_Disabled
+#define MPU_PROTENSET1_PROTREG39_Enabled    BPROT_CONFIG1_REGION39_Enabled
+#define MPU_PROTENSET1_PROTREG39_Set        BPROT_CONFIG1_REGION39_Enabled
+
+#define MPU_PROTENSET1_PROTREG38_Pos        BPROT_CONFIG1_REGION38_Pos
+#define MPU_PROTENSET1_PROTREG38_Msk        BPROT_CONFIG1_REGION38_Msk
+#define MPU_PROTENSET1_PROTREG38_Disabled   BPROT_CONFIG1_REGION38_Disabled
+#define MPU_PROTENSET1_PROTREG38_Enabled    BPROT_CONFIG1_REGION38_Enabled
+#define MPU_PROTENSET1_PROTREG38_Set        BPROT_CONFIG1_REGION38_Enabled
+
+#define MPU_PROTENSET1_PROTREG37_Pos        BPROT_CONFIG1_REGION37_Pos
+#define MPU_PROTENSET1_PROTREG37_Msk        BPROT_CONFIG1_REGION37_Msk
+#define MPU_PROTENSET1_PROTREG37_Disabled   BPROT_CONFIG1_REGION37_Disabled
+#define MPU_PROTENSET1_PROTREG37_Enabled    BPROT_CONFIG1_REGION37_Enabled
+#define MPU_PROTENSET1_PROTREG37_Set        BPROT_CONFIG1_REGION37_Enabled
+
+#define MPU_PROTENSET1_PROTREG36_Pos        BPROT_CONFIG1_REGION36_Pos
+#define MPU_PROTENSET1_PROTREG36_Msk        BPROT_CONFIG1_REGION36_Msk
+#define MPU_PROTENSET1_PROTREG36_Disabled   BPROT_CONFIG1_REGION36_Disabled
+#define MPU_PROTENSET1_PROTREG36_Enabled    BPROT_CONFIG1_REGION36_Enabled
+#define MPU_PROTENSET1_PROTREG36_Set        BPROT_CONFIG1_REGION36_Enabled
+
+#define MPU_PROTENSET1_PROTREG35_Pos        BPROT_CONFIG1_REGION35_Pos
+#define MPU_PROTENSET1_PROTREG35_Msk        BPROT_CONFIG1_REGION35_Msk
+#define MPU_PROTENSET1_PROTREG35_Disabled   BPROT_CONFIG1_REGION35_Disabled
+#define MPU_PROTENSET1_PROTREG35_Enabled    BPROT_CONFIG1_REGION35_Enabled
+#define MPU_PROTENSET1_PROTREG35_Set        BPROT_CONFIG1_REGION35_Enabled
+
+#define MPU_PROTENSET1_PROTREG34_Pos        BPROT_CONFIG1_REGION34_Pos
+#define MPU_PROTENSET1_PROTREG34_Msk        BPROT_CONFIG1_REGION34_Msk
+#define MPU_PROTENSET1_PROTREG34_Disabled   BPROT_CONFIG1_REGION34_Disabled
+#define MPU_PROTENSET1_PROTREG34_Enabled    BPROT_CONFIG1_REGION34_Enabled
+#define MPU_PROTENSET1_PROTREG34_Set        BPROT_CONFIG1_REGION34_Enabled
+
+#define MPU_PROTENSET1_PROTREG33_Pos        BPROT_CONFIG1_REGION33_Pos
+#define MPU_PROTENSET1_PROTREG33_Msk        BPROT_CONFIG1_REGION33_Msk
+#define MPU_PROTENSET1_PROTREG33_Disabled   BPROT_CONFIG1_REGION33_Disabled
+#define MPU_PROTENSET1_PROTREG33_Enabled    BPROT_CONFIG1_REGION33_Enabled
+#define MPU_PROTENSET1_PROTREG33_Set        BPROT_CONFIG1_REGION33_Enabled
+
+#define MPU_PROTENSET1_PROTREG32_Pos        BPROT_CONFIG1_REGION32_Pos
+#define MPU_PROTENSET1_PROTREG32_Msk        BPROT_CONFIG1_REGION32_Msk
+#define MPU_PROTENSET1_PROTREG32_Disabled   BPROT_CONFIG1_REGION32_Disabled
+#define MPU_PROTENSET1_PROTREG32_Enabled    BPROT_CONFIG1_REGION32_Enabled
+#define MPU_PROTENSET1_PROTREG32_Set        BPROT_CONFIG1_REGION32_Enabled
+
+#define MPU_PROTENSET0_PROTREG31_Pos        BPROT_CONFIG0_REGION31_Pos
+#define MPU_PROTENSET0_PROTREG31_Msk        BPROT_CONFIG0_REGION31_Msk
+#define MPU_PROTENSET0_PROTREG31_Disabled   BPROT_CONFIG0_REGION31_Disabled
+#define MPU_PROTENSET0_PROTREG31_Enabled    BPROT_CONFIG0_REGION31_Enabled
+#define MPU_PROTENSET0_PROTREG31_Set        BPROT_CONFIG0_REGION31_Enabled
+
+#define MPU_PROTENSET0_PROTREG30_Pos        BPROT_CONFIG0_REGION30_Pos
+#define MPU_PROTENSET0_PROTREG30_Msk        BPROT_CONFIG0_REGION30_Msk
+#define MPU_PROTENSET0_PROTREG30_Disabled   BPROT_CONFIG0_REGION30_Disabled
+#define MPU_PROTENSET0_PROTREG30_Enabled    BPROT_CONFIG0_REGION30_Enabled
+#define MPU_PROTENSET0_PROTREG30_Set        BPROT_CONFIG0_REGION30_Enabled
+
+#define MPU_PROTENSET0_PROTREG29_Pos        BPROT_CONFIG0_REGION29_Pos
+#define MPU_PROTENSET0_PROTREG29_Msk        BPROT_CONFIG0_REGION29_Msk
+#define MPU_PROTENSET0_PROTREG29_Disabled   BPROT_CONFIG0_REGION29_Disabled
+#define MPU_PROTENSET0_PROTREG29_Enabled    BPROT_CONFIG0_REGION29_Enabled
+#define MPU_PROTENSET0_PROTREG29_Set        BPROT_CONFIG0_REGION29_Enabled
+
+#define MPU_PROTENSET0_PROTREG28_Pos        BPROT_CONFIG0_REGION28_Pos
+#define MPU_PROTENSET0_PROTREG28_Msk        BPROT_CONFIG0_REGION28_Msk
+#define MPU_PROTENSET0_PROTREG28_Disabled   BPROT_CONFIG0_REGION28_Disabled
+#define MPU_PROTENSET0_PROTREG28_Enabled    BPROT_CONFIG0_REGION28_Enabled
+#define MPU_PROTENSET0_PROTREG28_Set        BPROT_CONFIG0_REGION28_Enabled
+
+#define MPU_PROTENSET0_PROTREG27_Pos        BPROT_CONFIG0_REGION27_Pos
+#define MPU_PROTENSET0_PROTREG27_Msk        BPROT_CONFIG0_REGION27_Msk
+#define MPU_PROTENSET0_PROTREG27_Disabled   BPROT_CONFIG0_REGION27_Disabled
+#define MPU_PROTENSET0_PROTREG27_Enabled    BPROT_CONFIG0_REGION27_Enabled
+#define MPU_PROTENSET0_PROTREG27_Set        BPROT_CONFIG0_REGION27_Enabled
+
+#define MPU_PROTENSET0_PROTREG26_Pos        BPROT_CONFIG0_REGION26_Pos
+#define MPU_PROTENSET0_PROTREG26_Msk        BPROT_CONFIG0_REGION26_Msk
+#define MPU_PROTENSET0_PROTREG26_Disabled   BPROT_CONFIG0_REGION26_Disabled
+#define MPU_PROTENSET0_PROTREG26_Enabled    BPROT_CONFIG0_REGION26_Enabled
+#define MPU_PROTENSET0_PROTREG26_Set        BPROT_CONFIG0_REGION26_Enabled
+
+#define MPU_PROTENSET0_PROTREG25_Pos        BPROT_CONFIG0_REGION25_Pos
+#define MPU_PROTENSET0_PROTREG25_Msk        BPROT_CONFIG0_REGION25_Msk
+#define MPU_PROTENSET0_PROTREG25_Disabled   BPROT_CONFIG0_REGION25_Disabled
+#define MPU_PROTENSET0_PROTREG25_Enabled    BPROT_CONFIG0_REGION25_Enabled
+#define MPU_PROTENSET0_PROTREG25_Set        BPROT_CONFIG0_REGION25_Enabled
+
+#define MPU_PROTENSET0_PROTREG24_Pos        BPROT_CONFIG0_REGION24_Pos
+#define MPU_PROTENSET0_PROTREG24_Msk        BPROT_CONFIG0_REGION24_Msk
+#define MPU_PROTENSET0_PROTREG24_Disabled   BPROT_CONFIG0_REGION24_Disabled
+#define MPU_PROTENSET0_PROTREG24_Enabled    BPROT_CONFIG0_REGION24_Enabled
+#define MPU_PROTENSET0_PROTREG24_Set        BPROT_CONFIG0_REGION24_Enabled
+
+#define MPU_PROTENSET0_PROTREG23_Pos        BPROT_CONFIG0_REGION23_Pos
+#define MPU_PROTENSET0_PROTREG23_Msk        BPROT_CONFIG0_REGION23_Msk
+#define MPU_PROTENSET0_PROTREG23_Disabled   BPROT_CONFIG0_REGION23_Disabled
+#define MPU_PROTENSET0_PROTREG23_Enabled    BPROT_CONFIG0_REGION23_Enabled
+#define MPU_PROTENSET0_PROTREG23_Set        BPROT_CONFIG0_REGION23_Enabled
+
+#define MPU_PROTENSET0_PROTREG22_Pos        BPROT_CONFIG0_REGION22_Pos
+#define MPU_PROTENSET0_PROTREG22_Msk        BPROT_CONFIG0_REGION22_Msk
+#define MPU_PROTENSET0_PROTREG22_Disabled   BPROT_CONFIG0_REGION22_Disabled
+#define MPU_PROTENSET0_PROTREG22_Enabled    BPROT_CONFIG0_REGION22_Enabled
+#define MPU_PROTENSET0_PROTREG22_Set        BPROT_CONFIG0_REGION22_Enabled
+
+#define MPU_PROTENSET0_PROTREG21_Pos        BPROT_CONFIG0_REGION21_Pos
+#define MPU_PROTENSET0_PROTREG21_Msk        BPROT_CONFIG0_REGION21_Msk
+#define MPU_PROTENSET0_PROTREG21_Disabled   BPROT_CONFIG0_REGION21_Disabled
+#define MPU_PROTENSET0_PROTREG21_Enabled    BPROT_CONFIG0_REGION21_Enabled
+#define MPU_PROTENSET0_PROTREG21_Set        BPROT_CONFIG0_REGION21_Enabled
+
+#define MPU_PROTENSET0_PROTREG20_Pos        BPROT_CONFIG0_REGION20_Pos
+#define MPU_PROTENSET0_PROTREG20_Msk        BPROT_CONFIG0_REGION20_Msk
+#define MPU_PROTENSET0_PROTREG20_Disabled   BPROT_CONFIG0_REGION20_Disabled
+#define MPU_PROTENSET0_PROTREG20_Enabled    BPROT_CONFIG0_REGION20_Enabled
+#define MPU_PROTENSET0_PROTREG20_Set        BPROT_CONFIG0_REGION20_Enabled
+
+#define MPU_PROTENSET0_PROTREG19_Pos        BPROT_CONFIG0_REGION19_Pos
+#define MPU_PROTENSET0_PROTREG19_Msk        BPROT_CONFIG0_REGION19_Msk
+#define MPU_PROTENSET0_PROTREG19_Disabled   BPROT_CONFIG0_REGION19_Disabled
+#define MPU_PROTENSET0_PROTREG19_Enabled    BPROT_CONFIG0_REGION19_Enabled
+#define MPU_PROTENSET0_PROTREG19_Set        BPROT_CONFIG0_REGION19_Enabled
+
+#define MPU_PROTENSET0_PROTREG18_Pos        BPROT_CONFIG0_REGION18_Pos
+#define MPU_PROTENSET0_PROTREG18_Msk        BPROT_CONFIG0_REGION18_Msk
+#define MPU_PROTENSET0_PROTREG18_Disabled   BPROT_CONFIG0_REGION18_Disabled
+#define MPU_PROTENSET0_PROTREG18_Enabled    BPROT_CONFIG0_REGION18_Enabled
+#define MPU_PROTENSET0_PROTREG18_Set        BPROT_CONFIG0_REGION18_Enabled
+
+#define MPU_PROTENSET0_PROTREG17_Pos        BPROT_CONFIG0_REGION17_Pos
+#define MPU_PROTENSET0_PROTREG17_Msk        BPROT_CONFIG0_REGION17_Msk
+#define MPU_PROTENSET0_PROTREG17_Disabled   BPROT_CONFIG0_REGION17_Disabled
+#define MPU_PROTENSET0_PROTREG17_Enabled    BPROT_CONFIG0_REGION17_Enabled
+#define MPU_PROTENSET0_PROTREG17_Set        BPROT_CONFIG0_REGION17_Enabled
+
+#define MPU_PROTENSET0_PROTREG16_Pos        BPROT_CONFIG0_REGION16_Pos
+#define MPU_PROTENSET0_PROTREG16_Msk        BPROT_CONFIG0_REGION16_Msk
+#define MPU_PROTENSET0_PROTREG16_Disabled   BPROT_CONFIG0_REGION16_Disabled
+#define MPU_PROTENSET0_PROTREG16_Enabled    BPROT_CONFIG0_REGION16_Enabled
+#define MPU_PROTENSET0_PROTREG16_Set        BPROT_CONFIG0_REGION16_Enabled
+
+#define MPU_PROTENSET0_PROTREG15_Pos        BPROT_CONFIG0_REGION15_Pos
+#define MPU_PROTENSET0_PROTREG15_Msk        BPROT_CONFIG0_REGION15_Msk
+#define MPU_PROTENSET0_PROTREG15_Disabled   BPROT_CONFIG0_REGION15_Disabled
+#define MPU_PROTENSET0_PROTREG15_Enabled    BPROT_CONFIG0_REGION15_Enabled
+#define MPU_PROTENSET0_PROTREG15_Set        BPROT_CONFIG0_REGION15_Enabled
+
+#define MPU_PROTENSET0_PROTREG14_Pos        BPROT_CONFIG0_REGION14_Pos
+#define MPU_PROTENSET0_PROTREG14_Msk        BPROT_CONFIG0_REGION14_Msk
+#define MPU_PROTENSET0_PROTREG14_Disabled   BPROT_CONFIG0_REGION14_Disabled
+#define MPU_PROTENSET0_PROTREG14_Enabled    BPROT_CONFIG0_REGION14_Enabled
+#define MPU_PROTENSET0_PROTREG14_Set        BPROT_CONFIG0_REGION14_Enabled
+
+#define MPU_PROTENSET0_PROTREG13_Pos        BPROT_CONFIG0_REGION13_Pos
+#define MPU_PROTENSET0_PROTREG13_Msk        BPROT_CONFIG0_REGION13_Msk
+#define MPU_PROTENSET0_PROTREG13_Disabled   BPROT_CONFIG0_REGION13_Disabled
+#define MPU_PROTENSET0_PROTREG13_Enabled    BPROT_CONFIG0_REGION13_Enabled
+#define MPU_PROTENSET0_PROTREG13_Set        BPROT_CONFIG0_REGION13_Enabled
+
+#define MPU_PROTENSET0_PROTREG12_Pos        BPROT_CONFIG0_REGION12_Pos
+#define MPU_PROTENSET0_PROTREG12_Msk        BPROT_CONFIG0_REGION12_Msk
+#define MPU_PROTENSET0_PROTREG12_Disabled   BPROT_CONFIG0_REGION12_Disabled
+#define MPU_PROTENSET0_PROTREG12_Enabled    BPROT_CONFIG0_REGION12_Enabled
+#define MPU_PROTENSET0_PROTREG12_Set        BPROT_CONFIG0_REGION12_Enabled
+
+#define MPU_PROTENSET0_PROTREG11_Pos        BPROT_CONFIG0_REGION11_Pos
+#define MPU_PROTENSET0_PROTREG11_Msk        BPROT_CONFIG0_REGION11_Msk
+#define MPU_PROTENSET0_PROTREG11_Disabled   BPROT_CONFIG0_REGION11_Disabled
+#define MPU_PROTENSET0_PROTREG11_Enabled    BPROT_CONFIG0_REGION11_Enabled
+#define MPU_PROTENSET0_PROTREG11_Set        BPROT_CONFIG0_REGION11_Enabled
+
+#define MPU_PROTENSET0_PROTREG10_Pos        BPROT_CONFIG0_REGION10_Pos
+#define MPU_PROTENSET0_PROTREG10_Msk        BPROT_CONFIG0_REGION10_Msk
+#define MPU_PROTENSET0_PROTREG10_Disabled   BPROT_CONFIG0_REGION10_Disabled
+#define MPU_PROTENSET0_PROTREG10_Enabled    BPROT_CONFIG0_REGION10_Enabled
+#define MPU_PROTENSET0_PROTREG10_Set        BPROT_CONFIG0_REGION10_Enabled
+
+#define MPU_PROTENSET0_PROTREG9_Pos        BPROT_CONFIG0_REGION9_Pos
+#define MPU_PROTENSET0_PROTREG9_Msk        BPROT_CONFIG0_REGION9_Msk
+#define MPU_PROTENSET0_PROTREG9_Disabled   BPROT_CONFIG0_REGION9_Disabled
+#define MPU_PROTENSET0_PROTREG9_Enabled    BPROT_CONFIG0_REGION9_Enabled
+#define MPU_PROTENSET0_PROTREG9_Set        BPROT_CONFIG0_REGION9_Enabled
+
+#define MPU_PROTENSET0_PROTREG8_Pos        BPROT_CONFIG0_REGION8_Pos
+#define MPU_PROTENSET0_PROTREG8_Msk        BPROT_CONFIG0_REGION8_Msk
+#define MPU_PROTENSET0_PROTREG8_Disabled   BPROT_CONFIG0_REGION8_Disabled
+#define MPU_PROTENSET0_PROTREG8_Enabled    BPROT_CONFIG0_REGION8_Enabled
+#define MPU_PROTENSET0_PROTREG8_Set        BPROT_CONFIG0_REGION8_Enabled
+
+#define MPU_PROTENSET0_PROTREG7_Pos        BPROT_CONFIG0_REGION7_Pos
+#define MPU_PROTENSET0_PROTREG7_Msk        BPROT_CONFIG0_REGION7_Msk
+#define MPU_PROTENSET0_PROTREG7_Disabled   BPROT_CONFIG0_REGION7_Disabled
+#define MPU_PROTENSET0_PROTREG7_Enabled    BPROT_CONFIG0_REGION7_Enabled
+#define MPU_PROTENSET0_PROTREG7_Set        BPROT_CONFIG0_REGION7_Enabled
+
+#define MPU_PROTENSET0_PROTREG6_Pos        BPROT_CONFIG0_REGION6_Pos
+#define MPU_PROTENSET0_PROTREG6_Msk        BPROT_CONFIG0_REGION6_Msk
+#define MPU_PROTENSET0_PROTREG6_Disabled   BPROT_CONFIG0_REGION6_Disabled
+#define MPU_PROTENSET0_PROTREG6_Enabled    BPROT_CONFIG0_REGION6_Enabled
+#define MPU_PROTENSET0_PROTREG6_Set        BPROT_CONFIG0_REGION6_Enabled
+
+#define MPU_PROTENSET0_PROTREG5_Pos        BPROT_CONFIG0_REGION5_Pos
+#define MPU_PROTENSET0_PROTREG5_Msk        BPROT_CONFIG0_REGION5_Msk
+#define MPU_PROTENSET0_PROTREG5_Disabled   BPROT_CONFIG0_REGION5_Disabled
+#define MPU_PROTENSET0_PROTREG5_Enabled    BPROT_CONFIG0_REGION5_Enabled
+#define MPU_PROTENSET0_PROTREG5_Set        BPROT_CONFIG0_REGION5_Enabled
+
+#define MPU_PROTENSET0_PROTREG4_Pos        BPROT_CONFIG0_REGION4_Pos
+#define MPU_PROTENSET0_PROTREG4_Msk        BPROT_CONFIG0_REGION4_Msk
+#define MPU_PROTENSET0_PROTREG4_Disabled   BPROT_CONFIG0_REGION4_Disabled
+#define MPU_PROTENSET0_PROTREG4_Enabled    BPROT_CONFIG0_REGION4_Enabled
+#define MPU_PROTENSET0_PROTREG4_Set        BPROT_CONFIG0_REGION4_Enabled
+
+#define MPU_PROTENSET0_PROTREG3_Pos        BPROT_CONFIG0_REGION3_Pos
+#define MPU_PROTENSET0_PROTREG3_Msk        BPROT_CONFIG0_REGION3_Msk
+#define MPU_PROTENSET0_PROTREG3_Disabled   BPROT_CONFIG0_REGION3_Disabled
+#define MPU_PROTENSET0_PROTREG3_Enabled    BPROT_CONFIG0_REGION3_Enabled
+#define MPU_PROTENSET0_PROTREG3_Set        BPROT_CONFIG0_REGION3_Enabled
+
+#define MPU_PROTENSET0_PROTREG2_Pos        BPROT_CONFIG0_REGION2_Pos
+#define MPU_PROTENSET0_PROTREG2_Msk        BPROT_CONFIG0_REGION2_Msk
+#define MPU_PROTENSET0_PROTREG2_Disabled   BPROT_CONFIG0_REGION2_Disabled
+#define MPU_PROTENSET0_PROTREG2_Enabled    BPROT_CONFIG0_REGION2_Enabled
+#define MPU_PROTENSET0_PROTREG2_Set        BPROT_CONFIG0_REGION2_Enabled
+
+#define MPU_PROTENSET0_PROTREG1_Pos        BPROT_CONFIG0_REGION1_Pos
+#define MPU_PROTENSET0_PROTREG1_Msk        BPROT_CONFIG0_REGION1_Msk
+#define MPU_PROTENSET0_PROTREG1_Disabled   BPROT_CONFIG0_REGION1_Disabled
+#define MPU_PROTENSET0_PROTREG1_Enabled    BPROT_CONFIG0_REGION1_Enabled
+#define MPU_PROTENSET0_PROTREG1_Set        BPROT_CONFIG0_REGION1_Enabled
+
+#define MPU_PROTENSET0_PROTREG0_Pos        BPROT_CONFIG0_REGION0_Pos
+#define MPU_PROTENSET0_PROTREG0_Msk        BPROT_CONFIG0_REGION0_Msk
+#define MPU_PROTENSET0_PROTREG0_Disabled   BPROT_CONFIG0_REGION0_Disabled
+#define MPU_PROTENSET0_PROTREG0_Enabled    BPROT_CONFIG0_REGION0_Enabled
+#define MPU_PROTENSET0_PROTREG0_Set        BPROT_CONFIG0_REGION0_Enabled
+
+
+/* From nrf51_deprecated.h */
+
+/* NVMC */
+/* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */
+#define ERASEPROTECTEDPAGE      ERASEPCR0
+
+
+/* IRQ */
+/* COMP module was eliminated. Adapted to nrf52 headers. */
+#define LPCOMP_COMP_IRQHandler  COMP_LPCOMP_IRQHandler
+#define LPCOMP_COMP_IRQn        COMP_LPCOMP_IRQn
+
+
+/* REFSEL register redefined enumerated values and added some more. */
+#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling          LPCOMP_REFSEL_REFSEL_Ref1_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling         LPCOMP_REFSEL_REFSEL_Ref2_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling       LPCOMP_REFSEL_REFSEL_Ref3_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling        LPCOMP_REFSEL_REFSEL_Ref4_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling        LPCOMP_REFSEL_REFSEL_Ref5_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling         LPCOMP_REFSEL_REFSEL_Ref6_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling       LPCOMP_REFSEL_REFSEL_Ref7_8Vdd
+
+
+/* RADIO */
+/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
+#define RADIO_CRCCNF_SKIP_ADDR_Pos      RADIO_CRCCNF_SKIPADDR_Pos
+#define RADIO_CRCCNF_SKIP_ADDR_Msk      RADIO_CRCCNF_SKIPADDR_Msk
+#define RADIO_CRCCNF_SKIP_ADDR_Include  RADIO_CRCCNF_SKIPADDR_Include
+#define RADIO_CRCCNF_SKIP_ADDR_Skip     RADIO_CRCCNF_SKIPADDR_Skip
+
+
+/* FICR */
+/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
+#define DEVICEID0       DEVICEID[0]
+#define DEVICEID1       DEVICEID[1]
+
+/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
+#define ER0             ER[0]
+#define ER1             ER[1]
+#define ER2             ER[2]
+#define ER3             ER[3]
+
+/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
+#define IR0             IR[0]
+#define IR1             IR[1]
+#define IR2             IR[2]
+#define IR3             IR[3]
+
+/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
+#define DEVICEADDR0     DEVICEADDR[0]
+#define DEVICEADDR1     DEVICEADDR[1]
+
+
+/* PPI */
+/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
+#define TASKS_CHG0EN     TASKS_CHG[0].EN
+#define TASKS_CHG0DIS    TASKS_CHG[0].DIS
+#define TASKS_CHG1EN     TASKS_CHG[1].EN
+#define TASKS_CHG1DIS    TASKS_CHG[1].DIS
+#define TASKS_CHG2EN     TASKS_CHG[2].EN
+#define TASKS_CHG2DIS    TASKS_CHG[2].DIS
+#define TASKS_CHG3EN     TASKS_CHG[3].EN
+#define TASKS_CHG3DIS    TASKS_CHG[3].DIS
+
+/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
+#define CH0_EEP          CH[0].EEP
+#define CH0_TEP          CH[0].TEP
+#define CH1_EEP          CH[1].EEP
+#define CH1_TEP          CH[1].TEP
+#define CH2_EEP          CH[2].EEP
+#define CH2_TEP          CH[2].TEP
+#define CH3_EEP          CH[3].EEP
+#define CH3_TEP          CH[3].TEP
+#define CH4_EEP          CH[4].EEP
+#define CH4_TEP          CH[4].TEP
+#define CH5_EEP          CH[5].EEP
+#define CH5_TEP          CH[5].TEP
+#define CH6_EEP          CH[6].EEP
+#define CH6_TEP          CH[6].TEP
+#define CH7_EEP          CH[7].EEP
+#define CH7_TEP          CH[7].TEP
+#define CH8_EEP          CH[8].EEP
+#define CH8_TEP          CH[8].TEP
+#define CH9_EEP          CH[9].EEP
+#define CH9_TEP          CH[9].TEP
+#define CH10_EEP         CH[10].EEP
+#define CH10_TEP         CH[10].TEP
+#define CH11_EEP         CH[11].EEP
+#define CH11_TEP         CH[11].TEP
+#define CH12_EEP         CH[12].EEP
+#define CH12_TEP         CH[12].TEP
+#define CH13_EEP         CH[13].EEP
+#define CH13_TEP         CH[13].TEP
+#define CH14_EEP         CH[14].EEP
+#define CH14_TEP         CH[14].TEP
+#define CH15_EEP         CH[15].EEP
+#define CH15_TEP         CH[15].TEP
+
+/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
+#define CHG0             CHG[0]
+#define CHG1             CHG[1]
+#define CHG2             CHG[2]
+#define CHG3             CHG[3]
+
+/* All bitfield macros for the CHGx registers therefore changed name. */
+#define PPI_CHG0_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG0_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG0_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG0_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG0_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG0_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG0_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG0_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG0_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG0_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG0_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG0_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG0_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG0_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG0_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG0_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG0_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG0_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG0_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG0_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG0_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG0_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG0_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG0_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG0_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG0_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG0_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG0_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG0_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG0_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG0_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG0_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG0_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG0_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG0_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG0_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG0_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG0_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG0_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG0_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG0_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG0_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG0_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG0_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG0_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG0_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG0_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG0_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG0_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG0_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG0_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG0_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG0_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG0_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG0_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG0_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG0_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG0_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG0_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG0_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG0_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG0_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG0_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG0_CH0_Included   PPI_CHG_CH0_Included
+
+#define PPI_CHG1_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG1_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG1_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG1_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG1_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG1_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG1_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG1_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG1_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG1_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG1_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG1_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG1_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG1_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG1_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG1_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG1_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG1_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG1_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG1_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG1_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG1_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG1_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG1_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG1_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG1_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG1_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG1_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG1_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG1_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG1_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG1_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG1_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG1_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG1_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG1_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG1_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG1_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG1_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG1_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG1_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG1_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG1_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG1_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG1_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG1_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG1_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG1_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG1_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG1_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG1_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG1_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG1_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG1_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG1_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG1_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG1_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG1_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG1_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG1_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG1_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG1_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG1_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG1_CH0_Included   PPI_CHG_CH0_Included
+
+#define PPI_CHG2_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG2_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG2_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG2_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG2_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG2_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG2_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG2_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG2_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG2_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG2_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG2_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG2_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG2_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG2_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG2_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG2_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG2_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG2_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG2_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG2_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG2_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG2_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG2_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG2_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG2_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG2_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG2_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG2_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG2_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG2_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG2_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG2_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG2_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG2_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG2_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG2_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG2_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG2_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG2_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG2_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG2_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG2_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG2_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG2_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG2_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG2_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG2_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG2_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG2_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG2_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG2_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG2_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG2_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG2_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG2_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG2_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG2_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG2_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG2_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG2_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG2_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG2_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG2_CH0_Included   PPI_CHG_CH0_Included
+
+#define PPI_CHG3_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG3_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG3_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG3_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG3_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG3_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG3_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG3_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG3_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG3_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG3_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG3_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG3_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG3_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG3_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG3_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG3_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG3_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG3_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG3_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG3_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG3_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG3_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG3_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG3_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG3_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG3_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG3_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG3_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG3_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG3_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG3_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG3_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG3_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG3_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG3_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG3_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG3_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG3_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG3_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG3_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG3_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG3_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG3_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG3_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG3_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG3_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG3_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG3_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG3_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG3_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG3_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG3_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG3_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG3_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG3_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG3_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG3_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG3_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG3_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG3_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG3_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG3_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG3_CH0_Included   PPI_CHG_CH0_Included
+
+
+
+
+/*lint --flb "Leave library region" */
+
+#endif /* NRF51_TO_NRF52_H */
+

ports/nrf/device/nrf52/nrf51_to_nrf52840.h

@@ -0,0 +1,567 @@
+/* Copyright (c) 2016, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of Nordic Semiconductor ASA nor the names of its
+ *     contributors may be used to endorse or promote products derived from
+ *     this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#ifndef NRF51_TO_NRF52840_H
+#define NRF51_TO_NRF52840_H
+
+/*lint ++flb "Enter library region */
+
+/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52840 devices.
+ * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the
+ * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
+ * from the nrf51_deprecated.h file. */
+
+
+/* IRQ */
+/* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */
+#define UART0_IRQHandler        UARTE0_UART0_IRQHandler
+#define SPI0_TWI0_IRQHandler    SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+#define SPI1_TWI1_IRQHandler    SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+#define ADC_IRQHandler          SAADC_IRQHandler
+#define LPCOMP_IRQHandler       COMP_LPCOMP_IRQHandler
+#define SWI0_IRQHandler         SWI0_EGU0_IRQHandler
+#define SWI1_IRQHandler         SWI1_EGU1_IRQHandler
+#define SWI2_IRQHandler         SWI2_EGU2_IRQHandler
+#define SWI3_IRQHandler         SWI3_EGU3_IRQHandler
+#define SWI4_IRQHandler         SWI4_EGU4_IRQHandler
+#define SWI5_IRQHandler         SWI5_EGU5_IRQHandler
+
+#define UART0_IRQn              UARTE0_UART0_IRQn
+#define SPI0_TWI0_IRQn          SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn
+#define SPI1_TWI1_IRQn          SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn
+#define ADC_IRQn                SAADC_IRQn
+#define LPCOMP_IRQn             COMP_LPCOMP_IRQn
+#define SWI0_IRQn               SWI0_EGU0_IRQn
+#define SWI1_IRQn               SWI1_EGU1_IRQn
+#define SWI2_IRQn               SWI2_EGU2_IRQn
+#define SWI3_IRQn               SWI3_EGU3_IRQn
+#define SWI4_IRQn               SWI4_EGU4_IRQn
+#define SWI5_IRQn               SWI5_EGU5_IRQn
+
+
+/* UICR */
+/* Register RBPCONF was renamed to APPROTECT. */
+#define RBPCONF     APPROTECT
+
+#define UICR_RBPCONF_PALL_Pos           UICR_APPROTECT_PALL_Pos
+#define UICR_RBPCONF_PALL_Msk           UICR_APPROTECT_PALL_Msk
+#define UICR_RBPCONF_PALL_Enabled       UICR_APPROTECT_PALL_Enabled
+#define UICR_RBPCONF_PALL_Disabled      UICR_APPROTECT_PALL_Disabled
+
+
+/* GPIO */
+/* GPIO port was renamed to P0. */
+#define NRF_GPIO        NRF_P0
+#define NRF_GPIO_BASE   NRF_P0_BASE
+
+
+/* QDEC */
+/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */
+#define PSELLED     PSEL.LED
+#define PSELA       PSEL.A
+#define PSELB       PSEL.B
+
+
+/* SPIS */
+/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */
+#define PSELSCK       PSEL.SCK
+#define PSELMISO      PSEL.MISO
+#define PSELMOSI      PSEL.MOSI
+#define PSELCSN       PSEL.CSN
+
+/* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */
+#define RXDPTR        RXD.PTR
+#define MAXRX         RXD.MAXCNT
+#define AMOUNTRX      RXD.AMOUNT
+
+#define SPIS_MAXRX_MAXRX_Pos        SPIS_RXD_MAXCNT_MAXCNT_Pos
+#define SPIS_MAXRX_MAXRX_Msk        SPIS_RXD_MAXCNT_MAXCNT_Msk
+
+#define SPIS_AMOUNTRX_AMOUNTRX_Pos  SPIS_RXD_AMOUNT_AMOUNT_Pos
+#define SPIS_AMOUNTRX_AMOUNTRX_Msk  SPIS_RXD_AMOUNT_AMOUNT_Msk
+
+/* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */
+#define TXDPTR        TXD.PTR
+#define MAXTX         TXD.MAXCNT
+#define AMOUNTTX      TXD.AMOUNT
+
+#define SPIS_MAXTX_MAXTX_Pos        SPIS_TXD_MAXCNT_MAXCNT_Pos
+#define SPIS_MAXTX_MAXTX_Msk        SPIS_TXD_MAXCNT_MAXCNT_Msk
+
+#define SPIS_AMOUNTTX_AMOUNTTX_Pos  SPIS_TXD_AMOUNT_AMOUNT_Pos
+#define SPIS_AMOUNTTX_AMOUNTTX_Msk  SPIS_TXD_AMOUNT_AMOUNT_Msk
+
+
+/* UART */
+/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */
+#define PSELRTS       PSEL.RTS
+#define PSELTXD       PSEL.TXD
+#define PSELCTS       PSEL.CTS
+#define PSELRXD       PSEL.RXD
+
+/* TWI */
+/* The registers PSELSCL, PSELSDA were restructured into a struct. */
+#define PSELSCL       PSEL.SCL
+#define PSELSDA       PSEL.SDA
+
+
+
+/* From nrf51_deprecated.h */
+
+/* NVMC */
+/* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */
+#define ERASEPROTECTEDPAGE      ERASEPCR0
+
+
+/* IRQ */
+/* COMP module was eliminated. Adapted to nrf52840 headers. */
+#define LPCOMP_COMP_IRQHandler  COMP_LPCOMP_IRQHandler
+#define LPCOMP_COMP_IRQn        COMP_LPCOMP_IRQn
+
+
+/* REFSEL register redefined enumerated values and added some more. */
+#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling          LPCOMP_REFSEL_REFSEL_Ref1_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling         LPCOMP_REFSEL_REFSEL_Ref2_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling       LPCOMP_REFSEL_REFSEL_Ref3_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling        LPCOMP_REFSEL_REFSEL_Ref4_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling        LPCOMP_REFSEL_REFSEL_Ref5_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling         LPCOMP_REFSEL_REFSEL_Ref6_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling       LPCOMP_REFSEL_REFSEL_Ref7_8Vdd
+
+
+/* RADIO */
+/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
+#define RADIO_CRCCNF_SKIP_ADDR_Pos      RADIO_CRCCNF_SKIPADDR_Pos
+#define RADIO_CRCCNF_SKIP_ADDR_Msk      RADIO_CRCCNF_SKIPADDR_Msk
+#define RADIO_CRCCNF_SKIP_ADDR_Include  RADIO_CRCCNF_SKIPADDR_Include
+#define RADIO_CRCCNF_SKIP_ADDR_Skip     RADIO_CRCCNF_SKIPADDR_Skip
+
+
+/* FICR */
+/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
+#define DEVICEID0       DEVICEID[0]
+#define DEVICEID1       DEVICEID[1]
+
+/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
+#define ER0             ER[0]
+#define ER1             ER[1]
+#define ER2             ER[2]
+#define ER3             ER[3]
+
+/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
+#define IR0             IR[0]
+#define IR1             IR[1]
+#define IR2             IR[2]
+#define IR3             IR[3]
+
+/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
+#define DEVICEADDR0     DEVICEADDR[0]
+#define DEVICEADDR1     DEVICEADDR[1]
+
+
+/* PPI */
+/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
+#define TASKS_CHG0EN     TASKS_CHG[0].EN
+#define TASKS_CHG0DIS    TASKS_CHG[0].DIS
+#define TASKS_CHG1EN     TASKS_CHG[1].EN
+#define TASKS_CHG1DIS    TASKS_CHG[1].DIS
+#define TASKS_CHG2EN     TASKS_CHG[2].EN
+#define TASKS_CHG2DIS    TASKS_CHG[2].DIS
+#define TASKS_CHG3EN     TASKS_CHG[3].EN
+#define TASKS_CHG3DIS    TASKS_CHG[3].DIS
+
+/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
+#define CH0_EEP          CH[0].EEP
+#define CH0_TEP          CH[0].TEP
+#define CH1_EEP          CH[1].EEP
+#define CH1_TEP          CH[1].TEP
+#define CH2_EEP          CH[2].EEP
+#define CH2_TEP          CH[2].TEP
+#define CH3_EEP          CH[3].EEP
+#define CH3_TEP          CH[3].TEP
+#define CH4_EEP          CH[4].EEP
+#define CH4_TEP          CH[4].TEP
+#define CH5_EEP          CH[5].EEP
+#define CH5_TEP          CH[5].TEP
+#define CH6_EEP          CH[6].EEP
+#define CH6_TEP          CH[6].TEP
+#define CH7_EEP          CH[7].EEP
+#define CH7_TEP          CH[7].TEP
+#define CH8_EEP          CH[8].EEP
+#define CH8_TEP          CH[8].TEP
+#define CH9_EEP          CH[9].EEP
+#define CH9_TEP          CH[9].TEP
+#define CH10_EEP         CH[10].EEP
+#define CH10_TEP         CH[10].TEP
+#define CH11_EEP         CH[11].EEP
+#define CH11_TEP         CH[11].TEP
+#define CH12_EEP         CH[12].EEP
+#define CH12_TEP         CH[12].TEP
+#define CH13_EEP         CH[13].EEP
+#define CH13_TEP         CH[13].TEP
+#define CH14_EEP         CH[14].EEP
+#define CH14_TEP         CH[14].TEP
+#define CH15_EEP         CH[15].EEP
+#define CH15_TEP         CH[15].TEP
+
+/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
+#define CHG0             CHG[0]
+#define CHG1             CHG[1]
+#define CHG2             CHG[2]
+#define CHG3             CHG[3]
+
+/* All bitfield macros for the CHGx registers therefore changed name. */
+#define PPI_CHG0_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG0_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG0_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG0_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG0_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG0_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG0_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG0_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG0_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG0_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG0_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG0_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG0_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG0_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG0_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG0_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG0_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG0_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG0_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG0_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG0_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG0_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG0_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG0_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG0_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG0_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG0_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG0_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG0_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG0_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG0_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG0_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG0_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG0_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG0_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG0_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG0_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG0_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG0_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG0_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG0_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG0_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG0_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG0_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG0_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG0_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG0_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG0_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG0_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG0_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG0_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG0_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG0_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG0_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG0_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG0_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG0_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG0_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG0_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG0_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG0_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG0_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG0_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG0_CH0_Included   PPI_CHG_CH0_Included
+
+#define PPI_CHG1_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG1_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG1_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG1_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG1_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG1_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG1_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG1_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG1_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG1_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG1_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG1_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG1_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG1_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG1_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG1_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG1_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG1_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG1_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG1_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG1_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG1_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG1_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG1_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG1_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG1_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG1_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG1_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG1_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG1_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG1_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG1_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG1_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG1_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG1_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG1_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG1_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG1_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG1_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG1_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG1_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG1_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG1_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG1_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG1_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG1_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG1_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG1_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG1_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG1_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG1_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG1_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG1_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG1_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG1_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG1_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG1_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG1_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG1_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG1_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG1_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG1_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG1_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG1_CH0_Included   PPI_CHG_CH0_Included
+
+#define PPI_CHG2_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG2_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG2_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG2_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG2_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG2_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG2_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG2_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG2_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG2_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG2_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG2_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG2_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG2_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG2_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG2_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG2_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG2_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG2_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG2_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG2_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG2_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG2_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG2_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG2_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG2_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG2_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG2_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG2_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG2_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG2_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG2_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG2_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG2_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG2_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG2_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG2_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG2_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG2_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG2_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG2_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG2_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG2_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG2_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG2_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG2_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG2_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG2_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG2_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG2_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG2_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG2_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG2_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG2_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG2_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG2_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG2_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG2_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG2_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG2_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG2_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG2_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG2_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG2_CH0_Included   PPI_CHG_CH0_Included
+
+#define PPI_CHG3_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG3_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG3_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG3_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG3_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG3_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG3_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG3_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG3_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG3_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG3_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG3_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG3_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG3_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG3_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG3_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG3_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG3_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG3_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG3_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG3_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG3_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG3_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG3_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG3_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG3_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG3_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG3_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG3_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG3_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG3_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG3_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG3_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG3_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG3_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG3_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG3_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG3_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG3_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG3_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG3_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG3_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG3_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG3_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG3_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG3_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG3_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG3_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG3_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG3_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG3_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG3_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG3_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG3_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG3_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG3_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG3_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG3_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG3_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG3_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG3_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG3_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG3_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG3_CH0_Included   PPI_CHG_CH0_Included
+
+
+
+
+/*lint --flb "Leave library region" */
+
+#endif /* NRF51_TO_NRF52840_H */
+

ports/nrf/device/nrf52/nrf52_name_change.h

@@ -0,0 +1,70 @@
+/* Copyright (c) 2016, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of Nordic Semiconductor ASA nor the names of its
+ *     contributors may be used to endorse or promote products derived from
+ *     this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#ifndef NRF52_NAME_CHANGE_H
+#define NRF52_NAME_CHANGE_H
+
+/*lint ++flb "Enter library region */
+
+/* This file is given to prevent your SW from not compiling with the updates made to nrf52.h and 
+ * nrf52_bitfields.h. The macros defined in this file were available previously. Do not use these
+ * macros on purpose. Use the ones defined in nrf52.h and nrf52_bitfields.h instead.
+ */
+
+/* I2S */
+/* Several enumerations changed case. Adding old macros to keep compilation compatibility. */
+#define I2S_ENABLE_ENABLE_DISABLE           I2S_ENABLE_ENABLE_Disabled
+#define I2S_ENABLE_ENABLE_ENABLE            I2S_ENABLE_ENABLE_Enabled
+#define I2S_CONFIG_MODE_MODE_MASTER         I2S_CONFIG_MODE_MODE_Master
+#define I2S_CONFIG_MODE_MODE_SLAVE          I2S_CONFIG_MODE_MODE_Slave
+#define I2S_CONFIG_RXEN_RXEN_DISABLE        I2S_CONFIG_RXEN_RXEN_Disabled
+#define I2S_CONFIG_RXEN_RXEN_ENABLE         I2S_CONFIG_RXEN_RXEN_Enabled
+#define I2S_CONFIG_TXEN_TXEN_DISABLE        I2S_CONFIG_TXEN_TXEN_Disabled
+#define I2S_CONFIG_TXEN_TXEN_ENABLE         I2S_CONFIG_TXEN_TXEN_Enabled
+#define I2S_CONFIG_MCKEN_MCKEN_DISABLE      I2S_CONFIG_MCKEN_MCKEN_Disabled
+#define I2S_CONFIG_MCKEN_MCKEN_ENABLE       I2S_CONFIG_MCKEN_MCKEN_Enabled
+#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT       I2S_CONFIG_SWIDTH_SWIDTH_8Bit
+#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT      I2S_CONFIG_SWIDTH_SWIDTH_16Bit
+#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT      I2S_CONFIG_SWIDTH_SWIDTH_24Bit
+#define I2S_CONFIG_ALIGN_ALIGN_LEFT         I2S_CONFIG_ALIGN_ALIGN_Left
+#define I2S_CONFIG_ALIGN_ALIGN_RIGHT        I2S_CONFIG_ALIGN_ALIGN_Right
+#define I2S_CONFIG_FORMAT_FORMAT_ALIGNED    I2S_CONFIG_FORMAT_FORMAT_Aligned
+#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO I2S_CONFIG_CHANNELS_CHANNELS_Stereo
+#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT   I2S_CONFIG_CHANNELS_CHANNELS_Left
+#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT  I2S_CONFIG_CHANNELS_CHANNELS_Right
+
+/* LPCOMP */
+/* Corrected typo in RESULT register. */
+#define LPCOMP_RESULT_RESULT_Bellow         LPCOMP_RESULT_RESULT_Below
+
+/*lint --flb "Leave library region" */
+
+#endif /* NRF52_NAME_CHANGE_H */
+

ports/nrf/device/nrf52/nrf52_to_nrf52840.h

@@ -0,0 +1,88 @@
+/* Copyright (c) 2016, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of Nordic Semiconductor ASA nor the names of its
+ *     contributors may be used to endorse or promote products derived from
+ *     this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#ifndef NRF52_TO_NRF52840_H
+#define NRF52_TO_NRF52840_H
+
+/*lint ++flb "Enter library region */
+
+/* This file is given to prevent your SW from not compiling with the name changes between nRF51 or nRF52832 and nRF52840 devices.
+ * It redefines the old nRF51 or nRF52832 names into the new ones as long as the functionality is still supported. If the
+ * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
+ * from the nrf52_namechange.h file. */
+ 
+/* Differences between latest nRF52 headers and nRF52840 headers. */
+
+/* UART */
+/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */
+#define PSELRTS       PSEL.RTS
+#define PSELTXD       PSEL.TXD
+#define PSELCTS       PSEL.CTS
+#define PSELRXD       PSEL.RXD
+
+/* TWI */
+/* The registers PSELSCL, PSELSDA were restructured into a struct. */
+#define PSELSCL       PSEL.SCL
+#define PSELSDA       PSEL.SDA
+
+
+/* From nrf52_name_change.h. Several macros changed in different versions of nRF52 headers. By defining the following, any code written for any version of nRF52 headers will still compile. */
+
+/* I2S */
+/* Several enumerations changed case. Adding old macros to keep compilation compatibility. */
+#define I2S_ENABLE_ENABLE_DISABLE           I2S_ENABLE_ENABLE_Disabled
+#define I2S_ENABLE_ENABLE_ENABLE            I2S_ENABLE_ENABLE_Enabled
+#define I2S_CONFIG_MODE_MODE_MASTER         I2S_CONFIG_MODE_MODE_Master
+#define I2S_CONFIG_MODE_MODE_SLAVE          I2S_CONFIG_MODE_MODE_Slave
+#define I2S_CONFIG_RXEN_RXEN_DISABLE        I2S_CONFIG_RXEN_RXEN_Disabled
+#define I2S_CONFIG_RXEN_RXEN_ENABLE         I2S_CONFIG_RXEN_RXEN_Enabled
+#define I2S_CONFIG_TXEN_TXEN_DISABLE        I2S_CONFIG_TXEN_TXEN_Disabled
+#define I2S_CONFIG_TXEN_TXEN_ENABLE         I2S_CONFIG_TXEN_TXEN_Enabled
+#define I2S_CONFIG_MCKEN_MCKEN_DISABLE      I2S_CONFIG_MCKEN_MCKEN_Disabled
+#define I2S_CONFIG_MCKEN_MCKEN_ENABLE       I2S_CONFIG_MCKEN_MCKEN_Enabled
+#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT       I2S_CONFIG_SWIDTH_SWIDTH_8Bit
+#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT      I2S_CONFIG_SWIDTH_SWIDTH_16Bit
+#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT      I2S_CONFIG_SWIDTH_SWIDTH_24Bit
+#define I2S_CONFIG_ALIGN_ALIGN_LEFT         I2S_CONFIG_ALIGN_ALIGN_Left
+#define I2S_CONFIG_ALIGN_ALIGN_RIGHT        I2S_CONFIG_ALIGN_ALIGN_Right
+#define I2S_CONFIG_FORMAT_FORMAT_ALIGNED    I2S_CONFIG_FORMAT_FORMAT_Aligned
+#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO I2S_CONFIG_CHANNELS_CHANNELS_Stereo
+#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT   I2S_CONFIG_CHANNELS_CHANNELS_Left
+#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT  I2S_CONFIG_CHANNELS_CHANNELS_Right
+
+/* LPCOMP */
+/* Corrected typo in RESULT register. */
+#define LPCOMP_RESULT_RESULT_Bellow         LPCOMP_RESULT_RESULT_Below
+
+
+/*lint --flb "Leave library region" */
+
+#endif /* NRF51_TO_NRF52840_H */
+

ports/nrf/device/nrf52/startup_nrf52832.c

@@ -0,0 +1,167 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+
+extern uint32_t _estack;
+extern uint32_t _sidata;
+extern uint32_t _sdata;
+extern uint32_t _edata;
+extern uint32_t _sbss;
+extern uint32_t _ebss;
+
+typedef void (*func)(void);
+
+extern void  _start(void) __attribute__((noreturn));
+extern void SystemInit(void);
+
+void Default_Handler(void) {
+    while (1);
+}
+
+void Reset_Handler(void) {
+    uint32_t * p_src  = &_sidata;
+    uint32_t * p_dest = &_sdata;
+
+    while (p_dest < &_edata) {
+      *p_dest++ = *p_src++;
+    }
+
+    uint32_t * p_bss     = &_sbss;
+    uint32_t * p_bss_end = &_ebss;
+    while (p_bss < p_bss_end) {
+        *p_bss++ = 0ul;
+    }
+
+    SystemInit();
+    _start();
+}
+
+void NMI_Handler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemoryManagement_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler          (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void POWER_CLOCK_IRQHandler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void RADIO_IRQHandler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void UARTE0_UART0_IRQHandler  (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void NFCT_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void GPIOTE_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SAADC_IRQHandler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER0_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER1_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER2_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC0_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void TEMP_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void RNG_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void ECB_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void CCM_AAR_IRQHandler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void WDT_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC1_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void QDEC_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void COMP_LPCOMP_IRQHandler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI0_EGU0_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI1_EGU1_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI2_EGU2_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI3_EGU3_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI4_EGU4_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI5_EGU5_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER3_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER4_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM0_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void PDM_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void MWU_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM1_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM2_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM2_SPIS2_SPI2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC2_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void I2S_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+
+const func __Vectors[] __attribute__ ((section(".isr_vector"))) = {
+    (func)&_estack,
+    Reset_Handler,
+    NMI_Handler,
+    HardFault_Handler,
+    MemoryManagement_Handler,
+    BusFault_Handler,
+    UsageFault_Handler,
+    0,
+    0,
+    0,
+    0,
+    SVC_Handler,
+    DebugMon_Handler,
+    0,
+    PendSV_Handler,
+    SysTick_Handler,
+
+    /* External Interrupts */
+    POWER_CLOCK_IRQHandler,
+    RADIO_IRQHandler,
+    UARTE0_UART0_IRQHandler,
+    SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler,
+    SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler,
+    NFCT_IRQHandler,
+    GPIOTE_IRQHandler,
+    SAADC_IRQHandler,
+    TIMER0_IRQHandler,
+    TIMER1_IRQHandler,
+    TIMER2_IRQHandler,
+    RTC0_IRQHandler,
+    TEMP_IRQHandler,
+    RNG_IRQHandler,
+    ECB_IRQHandler,
+    CCM_AAR_IRQHandler,
+    WDT_IRQHandler,
+    RTC1_IRQHandler,
+    QDEC_IRQHandler,
+    COMP_LPCOMP_IRQHandler,
+    SWI0_EGU0_IRQHandler,
+    SWI1_EGU1_IRQHandler,
+    SWI2_EGU2_IRQHandler,
+    SWI3_EGU3_IRQHandler,
+    SWI4_EGU4_IRQHandler,
+    SWI5_EGU5_IRQHandler,
+    TIMER3_IRQHandler,
+    TIMER4_IRQHandler,
+    PWM0_IRQHandler,
+    PDM_IRQHandler,
+    0,
+    0,
+    MWU_IRQHandler,
+    PWM1_IRQHandler,
+    PWM2_IRQHandler,
+    SPIM2_SPIS2_SPI2_IRQHandler,
+    RTC2_IRQHandler,
+    I2S_IRQHandler
+};

ports/nrf/device/nrf52/startup_nrf52840.c

@@ -0,0 +1,182 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+
+extern uint32_t _estack;
+extern uint32_t _sidata;
+extern uint32_t _sdata;
+extern uint32_t _edata;
+extern uint32_t _sbss;
+extern uint32_t _ebss;
+
+typedef void (*func)(void);
+
+extern void  _start(void) __attribute__((noreturn));
+extern void SystemInit(void);
+
+void Default_Handler(void) {
+    while (1);
+}
+
+void Reset_Handler(void) {
+    uint32_t * p_src  = &_sidata;
+    uint32_t * p_dest = &_sdata;
+
+    while (p_dest < &_edata) {
+      *p_dest++ = *p_src++;
+    }
+
+    uint32_t * p_bss     = &_sbss;
+    uint32_t * p_bss_end = &_ebss;
+    while (p_bss < p_bss_end) {
+        *p_bss++ = 0ul;
+    }
+
+    SystemInit();
+    _start();
+}
+
+void NMI_Handler                 (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemoryManagement_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler                 (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler             (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void POWER_CLOCK_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void RADIO_IRQHandler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void UARTE0_UART0_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void NFCT_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void GPIOTE_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void SAADC_IRQHandler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER0_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER1_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER2_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC0_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void TEMP_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void RNG_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void ECB_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void CCM_AAR_IRQHandler          (void) __attribute__ ((weak, alias("Default_Handler")));
+void WDT_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC1_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void QDEC_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void COMP_LPCOMP_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI0_EGU0_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI1_EGU1_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI2_EGU2_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI3_EGU3_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI4_EGU4_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void SWI5_EGU5_IRQHandler        (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER3_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER4_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM0_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void PDM_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void MWU_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM1_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM2_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM2_SPIS2_SPI2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC2_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void I2S_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void FPU_IRQHandler              (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBD_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void UARTE1_IRQHandler           (void) __attribute__ ((weak, alias("Default_Handler")));
+void QSPI_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+void CRYPTOCELL_IRQHandler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPIM3_IRQHandler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void PWM3_IRQHandler             (void) __attribute__ ((weak, alias("Default_Handler")));
+
+const func __Vectors[] __attribute__ ((section(".isr_vector"))) = {
+    (func)&_estack,
+    Reset_Handler,
+    NMI_Handler,
+    HardFault_Handler,
+    MemoryManagement_Handler,
+    BusFault_Handler,
+    UsageFault_Handler,
+    0,
+    0,
+    0,
+    0,
+    SVC_Handler,
+    DebugMon_Handler,
+    0,
+    PendSV_Handler,
+    SysTick_Handler,
+
+    /* External Interrupts */
+    POWER_CLOCK_IRQHandler,
+    RADIO_IRQHandler,
+    UARTE0_UART0_IRQHandler,
+    SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler,
+    SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler,
+    NFCT_IRQHandler,
+    GPIOTE_IRQHandler,
+    SAADC_IRQHandler,
+    TIMER0_IRQHandler,
+    TIMER1_IRQHandler,
+    TIMER2_IRQHandler,
+    RTC0_IRQHandler,
+    TEMP_IRQHandler,
+    RNG_IRQHandler,
+    ECB_IRQHandler,
+    CCM_AAR_IRQHandler,
+    WDT_IRQHandler,
+    RTC1_IRQHandler,
+    QDEC_IRQHandler,
+    COMP_LPCOMP_IRQHandler,
+    SWI0_EGU0_IRQHandler,
+    SWI1_EGU1_IRQHandler,
+    SWI2_EGU2_IRQHandler,
+    SWI3_EGU3_IRQHandler,
+    SWI4_EGU4_IRQHandler,
+    SWI5_EGU5_IRQHandler,
+    TIMER3_IRQHandler,
+    TIMER4_IRQHandler,
+    PWM0_IRQHandler,
+    PDM_IRQHandler,
+    0,
+    0,
+    MWU_IRQHandler,
+    PWM1_IRQHandler,
+    PWM2_IRQHandler,
+    SPIM2_SPIS2_SPI2_IRQHandler,
+    RTC2_IRQHandler,
+    I2S_IRQHandler,
+    FPU_IRQHandler,
+    USBD_IRQHandler,
+    UARTE1_IRQHandler,
+    QSPI_IRQHandler,
+    CRYPTOCELL_IRQHandler,
+    SPIM3_IRQHandler,
+    0,
+    PWM3_IRQHandler,
+};

ports/nrf/device/nrf52/system_nrf52.h

@@ -0,0 +1,69 @@
+/* Copyright (c) 2012 ARM LIMITED
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of ARM nor the names of its contributors may be used to
+ *     endorse or promote products derived from this software without specific
+ *     prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#ifndef SYSTEM_NRF52_H
+#define SYSTEM_NRF52_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+
+extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
+
+/**
+ * Initialize the system
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock 
+ *         retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_NRF52_H */

ports/nrf/device/nrf52/system_nrf52832.c

@@ -0,0 +1,308 @@
+/* Copyright (c) 2012 ARM LIMITED
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of ARM nor the names of its contributors may be used to
+ *     endorse or promote products derived from this software without specific
+ *     prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#include <stdint.h>
+#include <stdbool.h>
+#include "nrf.h"
+#include "system_nrf52.h"
+
+/*lint ++flb "Enter library region" */
+
+#define __SYSTEM_CLOCK_64M      (64000000UL)
+
+static bool errata_16(void);
+static bool errata_31(void);
+static bool errata_32(void);
+static bool errata_36(void);
+static bool errata_37(void);
+static bool errata_57(void);
+static bool errata_66(void);
+static bool errata_108(void);
+
+
+#if defined ( __CC_ARM )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#elif defined ( __ICCARM__ )
+    __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
+#elif defined ( __GNUC__ )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#endif
+
+void SystemCoreClockUpdate(void)
+{
+    SystemCoreClock = __SYSTEM_CLOCK_64M;
+}
+
+void SystemInit(void)
+{
+    /* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/ */
+    if (errata_16()){
+        *(volatile uint32_t *)0x4007C074 = 3131961357ul;
+    }
+
+    /* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/ */
+    if (errata_31()){
+        *(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
+    }
+
+    /* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/ */
+    if (errata_32()){
+        CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk;
+    }
+
+    /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_36()){
+        NRF_CLOCK->EVENTS_DONE = 0;
+        NRF_CLOCK->EVENTS_CTTO = 0;
+        NRF_CLOCK->CTIV = 0;
+    }
+
+    /* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_37()){
+        *(volatile uint32_t *)0x400005A0 = 0x3;
+    }
+
+    /* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_57()){
+        *(volatile uint32_t *)0x40005610 = 0x00000005;
+        *(volatile uint32_t *)0x40005688 = 0x00000001;
+        *(volatile uint32_t *)0x40005618 = 0x00000000;
+        *(volatile uint32_t *)0x40005614 = 0x0000003F;
+    }
+
+    /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_66()){
+        NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
+        NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
+        NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
+        NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
+        NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
+        NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
+        NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
+        NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
+        NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
+        NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
+        NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
+        NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
+        NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
+        NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
+        NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
+        NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
+        NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
+    }
+
+    /* Workaround for Errata 108 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_108()){
+        *(volatile uint32_t *)0x40000EE4 = *(volatile uint32_t *)0x10000258 & 0x0000004F;
+    }
+    
+    /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
+     * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
+     * operations are not used in your code. */
+    #if (__FPU_USED == 1)
+        SCB->CPACR |= (3UL << 20) | (3UL << 22);
+        __DSB();
+        __ISB();
+    #endif
+
+    /* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
+       two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
+       normal GPIOs. */
+    #if defined (CONFIG_NFCT_PINS_AS_GPIOS)
+        if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NVIC_SystemReset();
+        }
+    #endif
+
+    /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
+      defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
+      reserved for PinReset and not available as normal GPIO. */
+    #if defined (CONFIG_GPIO_AS_PINRESET)
+        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
+            ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->PSELRESET[0] = 21;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->PSELRESET[1] = 21;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NVIC_SystemReset();
+        }
+    #endif
+
+    /* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
+       Specification to see which one). */
+    #if defined (ENABLE_SWO)
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+        NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    #endif
+
+    /* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
+       Specification to see which ones). */
+    #if defined (ENABLE_TRACE)
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+        NRF_P0->PIN_CNF[14] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[15] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[16] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[20] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    #endif
+
+    SystemCoreClockUpdate();
+}
+
+
+static bool errata_16(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
+            return true;
+        }
+    }
+
+    return false;
+}
+
+static bool errata_31(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
+            return true;
+        }
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40){
+            return true;
+        }
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
+            return true;
+        }
+    }
+
+    return false;
+}
+
+static bool errata_32(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
+            return true;
+        }
+    }
+
+    return false;
+}
+
+static bool errata_36(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
+            return true;
+        }
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40){
+            return true;
+        }
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
+            return true;
+        }
+    }
+
+    return false;
+}
+
+static bool errata_37(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
+            return true;
+        }
+    }
+
+    return false;
+}
+
+static bool errata_57(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
+            return true;
+        }
+    }
+
+    return false;
+}
+
+static bool errata_66(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
+            return true;
+        }
+    }
+
+    return false;
+}
+
+
+static bool errata_108(void)
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
+            return true;
+        }
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40){
+            return true;
+        }
+        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
+            return true;
+        }
+    }
+
+    return false;
+}
+
+
+/*lint --flb "Leave library region" */

ports/nrf/device/nrf52/system_nrf52840.c

@@ -0,0 +1,209 @@
+/* Copyright (c) 2012 ARM LIMITED
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of ARM nor the names of its contributors may be used to
+ *     endorse or promote products derived from this software without specific
+ *     prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "nrf.h"
+#include "system_nrf52840.h"
+
+/*lint ++flb "Enter library region" */
+
+#define __SYSTEM_CLOCK_64M      (64000000UL)
+
+static bool errata_36(void);
+static bool errata_98(void);
+static bool errata_103(void);
+static bool errata_115(void);
+static bool errata_120(void);
+
+
+#if defined ( __CC_ARM )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#elif defined ( __ICCARM__ )
+    __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
+#elif defined ( __GNUC__ )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#endif
+
+void SystemCoreClockUpdate(void)
+{
+    SystemCoreClock = __SYSTEM_CLOCK_64M;
+}
+
+void SystemInit(void)
+{
+    /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_36()){
+        NRF_CLOCK->EVENTS_DONE = 0;
+        NRF_CLOCK->EVENTS_CTTO = 0;
+        NRF_CLOCK->CTIV = 0;
+    }
+
+    /* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_98()){
+        *(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
+    }
+
+    /* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_103()){
+        NRF_CCM->MAXPACKETSIZE = 0xFBul;
+    }
+
+    /* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_115()){
+        *(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
+    }
+
+    /* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_120()){
+        *(volatile uint32_t *)0x40029640ul = 0x200ul;
+    }
+
+    /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
+     * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
+     * operations are not used in your code. */
+    #if (__FPU_USED == 1)
+        SCB->CPACR |= (3UL << 20) | (3UL << 22);
+        __DSB();
+        __ISB();
+    #endif
+
+    /* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
+       two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
+       normal GPIOs. */
+    #if defined (CONFIG_NFCT_PINS_AS_GPIOS)
+        if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NVIC_SystemReset();
+        }
+    #endif
+
+    /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
+      defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
+      reserved for PinReset and not available as normal GPIO. */
+    #if defined (CONFIG_GPIO_AS_PINRESET)
+        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
+            ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->PSELRESET[0] = 18;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->PSELRESET[1] = 18;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NVIC_SystemReset();
+        }
+    #endif
+
+    /* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
+       Specification to see which one). */
+    #if defined (ENABLE_SWO)
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+        NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    #endif
+
+    /* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
+       Specification to see which ones). */
+    #if defined (ENABLE_TRACE)
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+        NRF_P0->PIN_CNF[7]  = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P1->PIN_CNF[0]  = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[12] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[11] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P1->PIN_CNF[9]  = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    #endif
+
+    SystemCoreClockUpdate();
+}
+
+
+static bool errata_36(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+
+    return false;
+}
+
+
+static bool errata_98(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+
+    return false;
+}
+
+
+static bool errata_103(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+
+    return false;
+}
+
+
+static bool errata_115(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+
+    return false;
+}
+
+
+static bool errata_120(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+
+    return false;
+}
+
+/*lint --flb "Leave library region" */

ports/nrf/device/nrf52/system_nrf52840.h

@@ -0,0 +1,69 @@
+/* Copyright (c) 2012 ARM LIMITED
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of ARM nor the names of its contributors may be used to
+ *     endorse or promote products derived from this software without specific
+ *     prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#ifndef SYSTEM_NRF52_H
+#define SYSTEM_NRF52_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+
+extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
+
+/**
+ * Initialize the system
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock 
+ *         retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_NRF52_H */

ports/nrf/drivers/bluetooth/ble_drv.h

@@ -0,0 +1,129 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef BLUETOOTH_LE_DRIVER_H__
+#define BLUETOOTH_LE_DRIVER_H__
+
+#if BLUETOOTH_SD
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "modubluepy.h"
+
+typedef struct {
+    uint8_t   addr[6];
+    uint8_t   addr_type;
+} ble_drv_addr_t;
+
+typedef struct {
+    uint8_t * p_peer_addr;
+    uint8_t   addr_type;
+    bool      is_scan_resp;
+    int8_t    rssi;
+    uint8_t   data_len;
+    uint8_t * p_data;
+    uint8_t   adv_type;
+} ble_drv_adv_data_t;
+
+typedef struct {
+    uint16_t uuid;
+    uint8_t  uuid_type;
+    uint16_t start_handle;
+    uint16_t end_handle;
+} ble_drv_service_data_t;
+
+typedef struct {
+    uint16_t uuid;
+    uint8_t  uuid_type;
+    uint8_t  props;
+    uint16_t decl_handle;
+    uint16_t value_handle;
+} ble_drv_char_data_t;
+
+typedef void (*ble_drv_gap_evt_callback_t)(mp_obj_t self, uint16_t event_id, uint16_t conn_handle, uint16_t length, uint8_t * data);
+typedef void (*ble_drv_gatts_evt_callback_t)(mp_obj_t self, uint16_t event_id, uint16_t attr_handle, uint16_t length, uint8_t * data);
+typedef void (*ble_drv_gattc_evt_callback_t)(mp_obj_t self, uint16_t event_id, uint16_t attr_handle, uint16_t length, uint8_t * data);
+typedef void (*ble_drv_adv_evt_callback_t)(mp_obj_t self, uint16_t event_id, ble_drv_adv_data_t * data);
+typedef void (*ble_drv_disc_add_service_callback_t)(mp_obj_t self, ble_drv_service_data_t * p_service_data);
+typedef void (*ble_drv_disc_add_char_callback_t)(mp_obj_t self, ble_drv_char_data_t * p_desc_data);
+typedef void (*ble_drv_gattc_char_data_callback_t)(mp_obj_t self, uint16_t length, uint8_t * p_data);
+
+uint32_t ble_drv_stack_enable(void);
+
+void ble_drv_stack_disable(void);
+
+uint8_t ble_drv_stack_enabled(void);
+
+void ble_drv_address_get(ble_drv_addr_t * p_addr);
+
+bool ble_drv_uuid_add_vs(uint8_t * p_uuid, uint8_t * idx);
+
+bool ble_drv_service_add(ubluepy_service_obj_t * p_service_obj);
+
+bool ble_drv_characteristic_add(ubluepy_characteristic_obj_t * p_char_obj);
+
+bool ble_drv_advertise_data(ubluepy_advertise_data_t * p_adv_params);
+
+void ble_drv_advertise_stop(void);
+
+void ble_drv_gap_event_handler_set(mp_obj_t obs, ble_drv_gap_evt_callback_t evt_handler);
+
+void ble_drv_gatts_event_handler_set(mp_obj_t obj, ble_drv_gatts_evt_callback_t evt_handler);
+
+void ble_drv_gattc_event_handler_set(mp_obj_t obj, ble_drv_gattc_evt_callback_t evt_handler);
+
+void ble_drv_attr_s_read(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data);
+
+void ble_drv_attr_c_read(uint16_t conn_handle, uint16_t handle, mp_obj_t obj, ble_drv_gattc_char_data_callback_t cb);
+
+void ble_drv_attr_s_write(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data);
+
+void ble_drv_attr_s_notify(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data);
+
+void ble_drv_attr_c_write(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data, bool w_response);
+
+void ble_drv_scan_start(void);
+
+void ble_drv_scan_stop(void);
+
+void ble_drv_adv_report_handler_set(mp_obj_t obj, ble_drv_adv_evt_callback_t evt_handler);
+
+void ble_drv_connect(uint8_t * p_addr, uint8_t addr_type);
+
+bool ble_drv_discover_services(mp_obj_t obj, uint16_t conn_handle, uint16_t start_handle, ble_drv_disc_add_service_callback_t cb);
+
+bool ble_drv_discover_characteristic(mp_obj_t obj,
+                                     uint16_t conn_handle,
+                                     uint16_t start_handle,
+                                     uint16_t end_handle,
+                                     ble_drv_disc_add_char_callback_t cb);
+
+void ble_drv_discover_descriptors(void);
+
+#endif // BLUETOOTH_SD
+
+#endif // BLUETOOTH_LE_DRIVER_H__

ports/nrf/drivers/bluetooth/ble_uart.c

@@ -0,0 +1,266 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#if BLUETOOTH_SD
+
+#include <string.h>
+#include "ble_uart.h"
+#include "ringbuffer.h"
+#include "hal/hal_time.h"
+
+#if MICROPY_PY_BLE_NUS
+
+#if BLUETOOTH_WEBBLUETOOTH_REPL
+#include "hal_time.h"
+#endif // BLUETOOTH_WEBBLUETOOTH_REPL
+
+static ubluepy_uuid_obj_t uuid_obj_service = {
+    .base.type = &ubluepy_uuid_type,
+    .type = UBLUEPY_UUID_128_BIT,
+    .value = {0x01, 0x00}
+};
+
+static ubluepy_uuid_obj_t uuid_obj_char_tx = {
+    .base.type = &ubluepy_uuid_type,
+    .type = UBLUEPY_UUID_128_BIT,
+    .value = {0x03, 0x00}
+};
+
+static ubluepy_uuid_obj_t uuid_obj_char_rx = {
+    .base.type = &ubluepy_uuid_type,
+    .type = UBLUEPY_UUID_128_BIT,
+    .value = {0x02, 0x00}
+};
+
+static ubluepy_service_obj_t ble_uart_service = {
+    .base.type = &ubluepy_service_type,
+    .p_uuid = &uuid_obj_service,
+    .type = UBLUEPY_SERVICE_PRIMARY
+};
+
+static ubluepy_characteristic_obj_t ble_uart_char_rx = {
+    .base.type = &ubluepy_characteristic_type,
+    .p_uuid = &uuid_obj_char_rx,
+    .props = UBLUEPY_PROP_WRITE | UBLUEPY_PROP_WRITE_WO_RESP,
+    .attrs = 0,
+};
+
+static ubluepy_characteristic_obj_t ble_uart_char_tx = {
+    .base.type = &ubluepy_characteristic_type,
+    .p_uuid = &uuid_obj_char_tx,
+    .props = UBLUEPY_PROP_NOTIFY,
+    .attrs = UBLUEPY_ATTR_CCCD,
+};
+
+static ubluepy_peripheral_obj_t ble_uart_peripheral = {
+    .base.type = &ubluepy_peripheral_type,
+    .conn_handle = 0xFFFF,
+};
+
+static volatile bool m_cccd_enabled;
+static volatile bool m_connected;
+
+ringBuffer_typedef(uint8_t, ringbuffer_t);
+
+static ringbuffer_t   m_rx_ring_buffer;
+static ringbuffer_t * mp_rx_ring_buffer = &m_rx_ring_buffer;
+static uint8_t        m_rx_ring_buffer_data[128];
+
+static ubluepy_advertise_data_t m_adv_data_uart_service;
+
+#if BLUETOOTH_WEBBLUETOOTH_REPL
+static ubluepy_advertise_data_t m_adv_data_eddystone_url;
+#endif // BLUETOOTH_WEBBLUETOOTH_REPL
+
+int mp_hal_stdin_rx_chr(void) {
+    while (isBufferEmpty(mp_rx_ring_buffer)) {
+        ;
+    }
+
+    uint8_t byte;
+    bufferRead(mp_rx_ring_buffer, byte);
+    return (int)byte;
+}
+
+void mp_hal_stdout_tx_strn(const char *str, size_t len) {
+    uint8_t *buf = (uint8_t *)str;
+    size_t send_len;
+
+    while (len > 0) {
+        if (len >= 20) {
+            send_len = 20; // (GATT_MTU_SIZE_DEFAULT - 3)
+        } else {
+            send_len = len;
+        }
+
+        ubluepy_characteristic_obj_t * p_char = &ble_uart_char_tx;
+
+        ble_drv_attr_s_notify(p_char->p_service->p_periph->conn_handle,
+                              p_char->handle,
+                              send_len,
+                              buf);
+
+        len -= send_len;
+        buf += send_len;
+    }
+}
+
+void mp_hal_stdout_tx_strn_cooked(const char *str, mp_uint_t len) {
+    mp_hal_stdout_tx_strn(str, len);
+}
+
+STATIC void gap_event_handler(mp_obj_t self_in, uint16_t event_id, uint16_t conn_handle, uint16_t length, uint8_t * data) {
+    ubluepy_peripheral_obj_t * self = MP_OBJ_TO_PTR(self_in);
+
+    if (event_id == 16) {                // connect event
+        self->conn_handle = conn_handle;
+        m_connected = true;
+    } else if (event_id == 17) {         // disconnect event
+        self->conn_handle = 0xFFFF;      // invalid connection handle
+        m_connected = false;
+    }
+}
+
+STATIC void gatts_event_handler(mp_obj_t self_in, uint16_t event_id, uint16_t attr_handle, uint16_t length, uint8_t * data) {
+    ubluepy_peripheral_obj_t * self = MP_OBJ_TO_PTR(self_in);
+    (void)self;
+
+    if (event_id == 80) { // gatts write
+        if (ble_uart_char_tx.cccd_handle == attr_handle) {
+            m_cccd_enabled = true;
+        } else if (ble_uart_char_rx.handle == attr_handle) {
+            for (uint16_t i = 0; i < length; i++) {
+                bufferWrite(mp_rx_ring_buffer, data[i]);
+            }
+        }
+    }
+}
+
+void ble_uart_init0(void) {
+    uint8_t base_uuid[] = {0x9E, 0xCA, 0xDC, 0x24, 0x0E, 0xE5, 0xA9, 0xE0, 0x93, 0xF3, 0xA3, 0xB5, 0x00, 0x00, 0x40, 0x6E};
+    uint8_t uuid_vs_idx;
+
+    (void)ble_drv_uuid_add_vs(base_uuid, &uuid_vs_idx);
+
+    uuid_obj_service.uuid_vs_idx = uuid_vs_idx;
+    uuid_obj_char_tx.uuid_vs_idx = uuid_vs_idx;
+    uuid_obj_char_rx.uuid_vs_idx = uuid_vs_idx;
+
+    (void)ble_drv_service_add(&ble_uart_service);
+    ble_uart_service.char_list = mp_obj_new_list(0, NULL);
+
+    // add TX characteristic
+    ble_uart_char_tx.service_handle = ble_uart_service.handle;
+    bool retval = ble_drv_characteristic_add(&ble_uart_char_tx);
+    if (retval) {
+    	ble_uart_char_tx.p_service = &ble_uart_service;
+    }
+    mp_obj_list_append(ble_uart_service.char_list, MP_OBJ_FROM_PTR(&ble_uart_char_tx));
+
+    // add RX characteristic
+    ble_uart_char_rx.service_handle = ble_uart_service.handle;
+    retval = ble_drv_characteristic_add(&ble_uart_char_rx);
+    if (retval) {
+    	ble_uart_char_rx.p_service = &ble_uart_service;
+    }
+    mp_obj_list_append(ble_uart_service.char_list, MP_OBJ_FROM_PTR(&ble_uart_char_rx));
+
+    // setup the peripheral
+    ble_uart_peripheral.service_list = mp_obj_new_list(0, NULL);
+    mp_obj_list_append(ble_uart_peripheral.service_list, MP_OBJ_FROM_PTR(&ble_uart_service));
+    ble_uart_service.p_periph = &ble_uart_peripheral;
+
+    ble_drv_gap_event_handler_set(MP_OBJ_FROM_PTR(&ble_uart_peripheral), gap_event_handler);
+    ble_drv_gatts_event_handler_set(MP_OBJ_FROM_PTR(&ble_uart_peripheral), gatts_event_handler);
+
+    ble_uart_peripheral.conn_handle = 0xFFFF;
+
+    char device_name[] = "mpus";
+
+    mp_obj_t service_list = mp_obj_new_list(0, NULL);
+    mp_obj_list_append(service_list, MP_OBJ_FROM_PTR(&ble_uart_service));
+
+    mp_obj_t * services = NULL;
+    mp_uint_t  num_services;
+    mp_obj_get_array(service_list, &num_services, &services);
+
+    m_adv_data_uart_service.p_services      = services;
+    m_adv_data_uart_service.num_of_services = num_services;
+    m_adv_data_uart_service.p_device_name   = (uint8_t *)device_name;
+    m_adv_data_uart_service.device_name_len = strlen(device_name);
+    m_adv_data_uart_service.connectable     = true;
+    m_adv_data_uart_service.p_data          = NULL;
+
+#if BLUETOOTH_WEBBLUETOOTH_REPL
+    // for now point eddystone URL to https://goo.gl/x46FES => https://glennrub.github.io/webbluetooth/micropython/repl/
+    static uint8_t eddystone_url_data[27] = {0x2, 0x1, 0x6,
+                                             0x3, 0x3, 0xaa, 0xfe,
+                                             19, 0x16, 0xaa, 0xfe, 0x10, 0xee, 0x3, 'g', 'o', 'o', '.', 'g', 'l', '/', 'x', '4', '6', 'F', 'E', 'S'};
+    // eddystone url adv data
+    m_adv_data_eddystone_url.p_data      = eddystone_url_data;
+    m_adv_data_eddystone_url.data_len    = sizeof(eddystone_url_data);
+    m_adv_data_eddystone_url.connectable = false;
+#endif
+
+    m_cccd_enabled = false;
+
+    // initialize ring buffer
+    m_rx_ring_buffer.size = sizeof(m_rx_ring_buffer_data) + 1;
+    m_rx_ring_buffer.start = 0;
+    m_rx_ring_buffer.end = 0;
+    m_rx_ring_buffer.elems = m_rx_ring_buffer_data;
+
+    m_connected = false;
+
+    ble_uart_advertise();
+}
+
+void ble_uart_advertise(void) {
+#if BLUETOOTH_WEBBLUETOOTH_REPL
+    while (!m_connected) {
+        (void)ble_drv_advertise_data(&m_adv_data_uart_service);
+        mp_hal_delay_ms(500);
+        (void)ble_drv_advertise_data(&m_adv_data_eddystone_url);
+        mp_hal_delay_ms(500);
+    }
+
+    ble_drv_advertise_stop();
+#else
+    (void)ble_drv_advertise_data(&m_adv_data_uart_service);
+#endif // BLUETOOTH_WEBBLUETOOTH_REPL
+}
+
+bool ble_uart_connected(void) {
+    return (m_connected);
+}
+
+bool ble_uart_enabled(void) {
+    return (m_cccd_enabled);
+}
+
+#endif // MICROPY_PY_BLE_NUS
+
+#endif // BLUETOOTH_SD

ports/nrf/drivers/bluetooth/ble_uart.h

@@ -0,0 +1,42 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef BLUETOOTH_LE_UART_H__
+#define BLUETOOTH_LE_UART_H__
+
+#if BLUETOOTH_SD
+
+#include "modubluepy.h"
+#include "ble_drv.h"
+
+void ble_uart_init0(void);
+void ble_uart_advertise(void);
+bool ble_uart_connected(void);
+bool ble_uart_enabled(void);
+
+#endif // BLUETOOTH_SD
+
+#endif // BLUETOOTH_LE_UART_H__

ports/nrf/drivers/bluetooth/bluetooth_common.mk

@@ -0,0 +1,55 @@
+
+SOFTDEV_HEX_NAME ?=
+SOFTDEV_HEX_PATH ?=
+
+ifeq ($(SD), s110)
+	INC += -Idrivers/bluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)_API/include
+	CFLAGS += -DBLUETOOTH_SD_DEBUG=1
+	CFLAGS += -DBLUETOOTH_SD=110
+	SOFTDEV_HEX_NAME = $(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)_softdevice.hex
+	SOFTDEV_HEX_PATH = drivers/bluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)
+
+else ifeq ($(SD), s120)
+	$(error No BLE wrapper available yet)
+else ifeq ($(SD), s130)
+	$(error No BLE wrapper available yet)
+else ifeq ($(SD), s132)
+	INC += -Idrivers/bluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)_API/include
+	INC += -Idrivers/bluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)_API/include/$(MCU_VARIANT)
+	CFLAGS += -DBLUETOOTH_SD_DEBUG=1
+	CFLAGS += -DBLUETOOTH_SD=132
+
+ifeq ($(SOFTDEV_VERSION), 2.0.1)
+	CFLAGS += -DBLE_API_VERSION=2
+else ifeq ($(SOFTDEV_VERSION), 3.0.0)
+	CFLAGS += -DBLE_API_VERSION=3
+endif
+
+	SOFTDEV_HEX_NAME = $(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)_softdevice.hex
+	SOFTDEV_HEX_PATH = drivers/bluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)
+else
+	$(error Incorrect softdevice set flag)
+endif
+
+define STACK_MISSING_ERROR
+
+
+###### ERROR: Bluetooth LE Stack not found ############
+#                                                     #
+# The build target requires a Bluetooth LE stack.     #
+# $(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION) Bluetooth LE stack not found.      #
+#                                                     #
+# Please run the download script:                     #
+#                                                     #
+#      drivers/bluetooth/download_ble_stack.sh        #
+#                                                     #
+#######################################################
+
+endef
+
+
+SOFTDEV_HEX = $(SOFTDEV_HEX_PATH)/$(SOFTDEV_HEX_NAME)
+
+ifeq ($(shell test ! -e $(SOFTDEV_HEX) && echo -n no),no)
+    $(error $(STACK_MISSING_ERROR))
+endif