From d2446cb61f618b2d0243ecafdd217e060d6c0ff0 Mon Sep 17 00:00:00 2001 From: Damien George Date: Thu, 28 Mar 2024 13:53:24 +1100 Subject: [PATCH] stm32/i2c: Fix clock enable for I2C4 on STM32F7 MCUs. This was broken by 5aec051f9f0e1be9750ca4f08478275f298087a3 Signed-off-by: Damien George --- ports/stm32/i2c.c | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/ports/stm32/i2c.c b/ports/stm32/i2c.c index 9d128acc3c..a1fde7e6ba 100644 --- a/ports/stm32/i2c.c +++ b/ports/stm32/i2c.c @@ -312,19 +312,15 @@ int i2c_init(i2c_t *i2c, mp_hal_pin_obj_t scl, mp_hal_pin_obj_t sda, uint32_t fr // Enable I2C peripheral clock volatile uint32_t tmp; (void)tmp; - switch (i2c_id) { - case 0: - case 1: - case 2: - RCC->APB1ENR |= RCC_APB1ENR_I2C1EN << i2c_id; - tmp = RCC->APB1ENR; // delay after RCC clock enable - break; - #if defined(STM32H7) - case 3: - RCC->APB4ENR |= RCC_APB4ENR_I2C4EN; - tmp = RCC->APB4ENR; // delay after RCC clock enable - break; - #endif + #if defined(STM32H7) + if (i2c_id == 3) { + RCC->APB4ENR |= RCC_APB4ENR_I2C4EN; + tmp = RCC->APB4ENR; // delay after RCC clock enable + } else + #endif + { + RCC->APB1ENR |= RCC_APB1ENR_I2C1EN << i2c_id; + tmp = RCC->APB1ENR; // delay after RCC clock enable } // Initialise I2C peripheral