drivers/memory/spiflash: Rename functions to indicate they use cache.

This patch renames the existing SPI flash API functions to reflect the fact
that the go through the cache:

    mp_spiflash_flush -> mp_spiflash_cache_flush
    mp_spiflash_read  -> mp_spiflash_cached_read
    mp_spiflash_write -> mp_spiflash_cached_write
pull/3892/head
Damien George 2018-06-07 15:36:27 +10:00
rodzic 335d26b27d
commit cc5a94044a
3 zmienionych plików z 23 dodań i 18 usunięć

Wyświetl plik

@ -221,7 +221,10 @@ STATIC int mp_spiflash_write_page(mp_spiflash_t *self, uint32_t addr, const uint
return mp_spiflash_wait_wip0(self); return mp_spiflash_wait_wip0(self);
} }
void mp_spiflash_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest) { /******************************************************************************/
// Interface functions that use the cache
void mp_spiflash_cached_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest) {
if (len == 0) { if (len == 0) {
return; return;
} }
@ -261,7 +264,7 @@ void mp_spiflash_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *d
mp_spiflash_release_bus(self); mp_spiflash_release_bus(self);
} }
STATIC void mp_spiflash_flush_internal(mp_spiflash_t *self) { STATIC void mp_spiflash_cache_flush_internal(mp_spiflash_t *self) {
#if USE_WR_DELAY #if USE_WR_DELAY
if (!(self->flags & 1)) { if (!(self->flags & 1)) {
return; return;
@ -287,13 +290,13 @@ STATIC void mp_spiflash_flush_internal(mp_spiflash_t *self) {
#endif #endif
} }
void mp_spiflash_flush(mp_spiflash_t *self) { void mp_spiflash_cache_flush(mp_spiflash_t *self) {
mp_spiflash_acquire_bus(self); mp_spiflash_acquire_bus(self);
mp_spiflash_flush_internal(self); mp_spiflash_cache_flush_internal(self);
mp_spiflash_release_bus(self); mp_spiflash_release_bus(self);
} }
STATIC int mp_spiflash_write_part(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) { STATIC int mp_spiflash_cached_write_part(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) {
// Align to 4096 sector // Align to 4096 sector
uint32_t offset = addr & 0xfff; uint32_t offset = addr & 0xfff;
uint32_t sec = addr >> 12; uint32_t sec = addr >> 12;
@ -301,7 +304,7 @@ STATIC int mp_spiflash_write_part(mp_spiflash_t *self, uint32_t addr, size_t len
// Restriction for now, so we don't need to erase multiple pages // Restriction for now, so we don't need to erase multiple pages
if (offset + len > SECTOR_SIZE) { if (offset + len > SECTOR_SIZE) {
printf("mp_spiflash_write_part: len is too large\n"); printf("mp_spiflash_cached_write_part: len is too large\n");
return -MP_EIO; return -MP_EIO;
} }
@ -310,7 +313,7 @@ STATIC int mp_spiflash_write_part(mp_spiflash_t *self, uint32_t addr, size_t len
// Acquire the sector buffer // Acquire the sector buffer
if (cache->user != self) { if (cache->user != self) {
if (cache->user != NULL) { if (cache->user != NULL) {
mp_spiflash_flush(cache->user); mp_spiflash_cache_flush(cache->user);
} }
cache->user = self; cache->user = self;
cache->block = 0xffffffff; cache->block = 0xffffffff;
@ -320,7 +323,7 @@ STATIC int mp_spiflash_write_part(mp_spiflash_t *self, uint32_t addr, size_t len
// Read sector // Read sector
#if USE_WR_DELAY #if USE_WR_DELAY
if (cache->block != 0xffffffff) { if (cache->block != 0xffffffff) {
mp_spiflash_flush_internal(self); mp_spiflash_cache_flush_internal(self);
} }
#endif #endif
mp_spiflash_read_data(self, addr, SECTOR_SIZE, cache->buf); mp_spiflash_read_data(self, addr, SECTOR_SIZE, cache->buf);
@ -372,7 +375,7 @@ STATIC int mp_spiflash_write_part(mp_spiflash_t *self, uint32_t addr, size_t len
return 0; // success return 0; // success
} }
int mp_spiflash_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) { int mp_spiflash_cached_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) {
uint32_t bis = addr / SECTOR_SIZE; uint32_t bis = addr / SECTOR_SIZE;
uint32_t bie = (addr + len - 1) / SECTOR_SIZE; uint32_t bie = (addr + len - 1) / SECTOR_SIZE;
@ -407,7 +410,7 @@ int mp_spiflash_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint
if (rest == 0) { if (rest == 0) {
rest = SECTOR_SIZE; rest = SECTOR_SIZE;
} }
int ret = mp_spiflash_write_part(self, addr, rest, src); int ret = mp_spiflash_cached_write_part(self, addr, rest, src);
if (ret != 0) { if (ret != 0) {
mp_spiflash_release_bus(self); mp_spiflash_release_bus(self);
return ret; return ret;
@ -428,7 +431,7 @@ int mp_spiflash_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint
if (rest > len) { if (rest > len) {
rest = len; rest = len;
} }
int ret = mp_spiflash_write_part(self, addr, rest, src); int ret = mp_spiflash_cached_write_part(self, addr, rest, src);
if (ret != 0) { if (ret != 0) {
mp_spiflash_release_bus(self); mp_spiflash_release_bus(self);
return ret; return ret;

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@ -68,8 +68,10 @@ typedef struct _mp_spiflash_t {
} mp_spiflash_t; } mp_spiflash_t;
void mp_spiflash_init(mp_spiflash_t *self); void mp_spiflash_init(mp_spiflash_t *self);
void mp_spiflash_flush(mp_spiflash_t *self);
void mp_spiflash_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest); // These functions use the cache (which must already be configured)
int mp_spiflash_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src); void mp_spiflash_cache_flush(mp_spiflash_t *self);
void mp_spiflash_cached_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest);
int mp_spiflash_cached_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src);
#endif // MICROPY_INCLUDED_DRIVERS_MEMORY_SPIFLASH_H #endif // MICROPY_INCLUDED_DRIVERS_MEMORY_SPIFLASH_H

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@ -42,7 +42,7 @@ int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg) {
case BDEV_IOCTL_IRQ_HANDLER: case BDEV_IOCTL_IRQ_HANDLER:
if ((bdev->spiflash.flags & 1) && HAL_GetTick() - bdev->flash_tick_counter_last_write >= 1000) { if ((bdev->spiflash.flags & 1) && HAL_GetTick() - bdev->flash_tick_counter_last_write >= 1000) {
mp_spiflash_flush(&bdev->spiflash); mp_spiflash_cache_flush(&bdev->spiflash);
led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off
} }
return 0; return 0;
@ -51,7 +51,7 @@ int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg) {
if (bdev->spiflash.flags & 1) { if (bdev->spiflash.flags & 1) {
// we must disable USB irqs to prevent MSC contention with SPI flash // we must disable USB irqs to prevent MSC contention with SPI flash
uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS);
mp_spiflash_flush(&bdev->spiflash); mp_spiflash_cache_flush(&bdev->spiflash);
led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off
restore_irq_pri(basepri); restore_irq_pri(basepri);
} }
@ -63,7 +63,7 @@ int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg) {
int spi_bdev_readblocks(spi_bdev_t *bdev, uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { int spi_bdev_readblocks(spi_bdev_t *bdev, uint8_t *dest, uint32_t block_num, uint32_t num_blocks) {
// we must disable USB irqs to prevent MSC contention with SPI flash // we must disable USB irqs to prevent MSC contention with SPI flash
uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS);
mp_spiflash_read(&bdev->spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, dest); mp_spiflash_cached_read(&bdev->spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, dest);
restore_irq_pri(basepri); restore_irq_pri(basepri);
return 0; return 0;
@ -72,7 +72,7 @@ int spi_bdev_readblocks(spi_bdev_t *bdev, uint8_t *dest, uint32_t block_num, uin
int spi_bdev_writeblocks(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { int spi_bdev_writeblocks(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_num, uint32_t num_blocks) {
// we must disable USB irqs to prevent MSC contention with SPI flash // we must disable USB irqs to prevent MSC contention with SPI flash
uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS);
int ret = mp_spiflash_write(&bdev->spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, src); int ret = mp_spiflash_cached_write(&bdev->spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, src);
if (bdev->spiflash.flags & 1) { if (bdev->spiflash.flags & 1) {
led_state(PYB_LED_RED, 1); // indicate a dirty cache with LED on led_state(PYB_LED_RED, 1); // indicate a dirty cache with LED on
bdev->flash_tick_counter_last_write = HAL_GetTick(); bdev->flash_tick_counter_last_write = HAL_GetTick();