From b3513f54d344b431c2975b2ece992ee2b6a5a7d6 Mon Sep 17 00:00:00 2001 From: Damien George Date: Fri, 22 Feb 2019 22:27:24 +1100 Subject: [PATCH] stm32/boards/STM32F7DISC: Enable lwIP and Ethernet peripheral. --- ports/stm32/boards/STM32F7DISC/mpconfigboard.h | 14 ++++++++++++++ ports/stm32/boards/STM32F7DISC/pins.csv | 10 ++++++++++ 2 files changed, 24 insertions(+) diff --git a/ports/stm32/boards/STM32F7DISC/mpconfigboard.h b/ports/stm32/boards/STM32F7DISC/mpconfigboard.h index 792206c400..ff135b8a75 100644 --- a/ports/stm32/boards/STM32F7DISC/mpconfigboard.h +++ b/ports/stm32/boards/STM32F7DISC/mpconfigboard.h @@ -1,6 +1,8 @@ #define MICROPY_HW_BOARD_NAME "F7DISC" #define MICROPY_HW_MCU_NAME "STM32F746" +#define MICROPY_PY_LWIP (1) + #define MICROPY_HW_HAS_SWITCH (1) #define MICROPY_HW_HAS_FLASH (1) #define MICROPY_HW_HAS_SDCARD (1) @@ -81,6 +83,18 @@ void STM32F7DISC_board_early_init(void); /*#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_J12)*/ #define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) +// Ethernet via RMII +#define MICROPY_HW_ETH_MDC (pin_C1) +#define MICROPY_HW_ETH_MDIO (pin_A2) +#define MICROPY_HW_ETH_RMII_REF_CLK (pin_A1) +#define MICROPY_HW_ETH_RMII_CRS_DV (pin_A7) +#define MICROPY_HW_ETH_RMII_RXD0 (pin_C4) +#define MICROPY_HW_ETH_RMII_RXD1 (pin_C5) +#define MICROPY_HW_ETH_RMII_RXER (pin_G2) +#define MICROPY_HW_ETH_RMII_TX_EN (pin_G11) +#define MICROPY_HW_ETH_RMII_TXD0 (pin_G13) +#define MICROPY_HW_ETH_RMII_TXD1 (pin_G14) + // SDRAM #define MICROPY_HW_SDRAM_SIZE (64 / 8 * 1024 * 1024) // 64 Mbit #define MICROPY_HW_SDRAM_STARTUP_TEST (1) diff --git a/ports/stm32/boards/STM32F7DISC/pins.csv b/ports/stm32/boards/STM32F7DISC/pins.csv index dfafe67f52..99fa969322 100644 --- a/ports/stm32/boards/STM32F7DISC/pins.csv +++ b/ports/stm32/boards/STM32F7DISC/pins.csv @@ -53,6 +53,16 @@ VCP_TX,PA9 VCP_RX,PB7 CAN_TX,PB13 CAN_RX,PB12 +ETH_MDC,PC1 +ETH_MDIO,PA2 +ETH_RMII_REF_CLK,PA1 +ETH_RMII_CRS_DV,PA7 +ETH_RMII_RXD0,PC4 +ETH_RMII_RXD1,PC5 +ETH_RMII_RXER,PG2 +ETH_RMII_TX_EN,PG11 +ETH_RMII_TXD0,PG13 +ETH_RMII_TXD1,PG14 SDRAM_SDCKE0,PC3 SDRAM_SDNE0,PH3 SDRAM_SDCLK,PG8